import GCC 4.1 branch from today. it includes these bugs fixed since

our last 4.1 branch import, plus a few other changes: c/27718 26242 c++/27451 c/26818 tree-optimization/26622 target/27758 middle-end/27743 middle-end/27620 tree-optimization/27549 tree-optimization/27283 target/26600 c++/26757 driver/26885 tree-optimization/27603 rtl-optimization/14261 rtl-optimization/22563 middle-end/26729 rtl-optimization/27335 target/27421 middle-end/27384 middle-end/27488 target/27158 bootstrap/26872 target/26545 tree-optimization/27136 tree-optimization/27409 middle-end/27260 tree-optimization/27151 target/26481 target/26765 target/26481 tree-optimization/27285 optimization/25985 tree-optimization/27364 c/25309 target/27387 target/27374 middle-end/26565 target/26826 tree-optimization/27236 middle-end/26869 tree-optimization/27218 rtl-optimization/26685 tree-optimization/26865 target/26961 target/21283 c/26774 c/25875 mudflap/26789
2006-06-03 05:31:50 +00:00 · 2006-06-03 05:31:50 +00:00 · 6346714276
parent 761e8f140b
commit 6346714276
22 changed files with 32721 additions and 4777 deletions
--- a/gnu/dist/gcc4/gcc/config/arm/arm.c
+++ b/gnu/dist/gcc4/gcc/config/arm/arm.c
@ -1217,6 +1217,12 @@ arm_override_options (void)
  if (arm_float_abi == ARM_FLOAT_ABI_HARD && TARGET_VFP)
    sorry ("-mfloat-abi=hard and VFP");

+  /* FPA and iWMMXt are incompatible because the insn encodings overlap.
+     VFP and iWMMXt can theoretically coexist, but it's unlikely such silicon
+     will ever exist.  GCC makes no attempt to support this combination.  */
+  if (TARGET_IWMMXT && !TARGET_SOFT_FLOAT)
+    sorry ("iWMMXt and hardware floating point");
+
  /* If soft-float is specified then don't use FPU.  */
  if (TARGET_SOFT_FLOAT)
    arm_fpu_arch = FPUTYPE_NONE;
@ -14628,6 +14634,7 @@ arm_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
 {
  static int thunk_label = 0;
  char label[256];
+  char labelpc[256];
  int mi_delta = delta;
  const char *const mi_op = mi_delta < 0 ? "sub" : "add";
  int shift = 0;
@ -14642,6 +14649,23 @@ arm_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
      fputs ("\tldr\tr12, ", file);
      assemble_name (file, label);
      fputc ('\n', file);
+      if (flag_pic)
+	{
+	  /* If we are generating PIC, the ldr instruction below loads
+	     "(target - 7) - .LTHUNKPCn" into r12.  The pc reads as
+	     the address of the add + 8, so we have:
+
+	     r12 = (target - 7) - .LTHUNKPCn + (.LTHUNKPCn + 8)
+	         = target + 1.
+
+	     Note that we have "+ 1" because some versions of GNU ld
+	     don't set the low bit of the result for R_ARM_REL32
+	     relocations against thumb function symbols.  */
+	  ASM_GENERATE_INTERNAL_LABEL (labelpc, "LTHUNKPC", labelno);
+	  assemble_name (file, labelpc);
+	  fputs (":\n", file);
+	  fputs ("\tadd\tr12, pc, r12\n", file);
+	}
    }
  while (mi_delta != 0)
    {
@ -14662,7 +14686,20 @@ arm_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
      ASM_OUTPUT_ALIGN (file, 2);
      assemble_name (file, label);
      fputs (":\n", file);
-      assemble_integer (XEXP (DECL_RTL (function), 0), 4, BITS_PER_WORD, 1);
+      if (flag_pic)
+	{
+	  /* Output ".word .LTHUNKn-7-.LTHUNKPCn".  */
+	  rtx tem = XEXP (DECL_RTL (function), 0);
+	  tem = gen_rtx_PLUS (GET_MODE (tem), tem, GEN_INT (-7));
+	  tem = gen_rtx_MINUS (GET_MODE (tem),
+			       tem,
+			       gen_rtx_SYMBOL_REF (Pmode,
+						   ggc_strdup (labelpc)));
+	  assemble_integer (tem, 4, BITS_PER_WORD, 1);
+	}
+      else
+	/* Output ".word .LTHUNKn".  */
+	assemble_integer (XEXP (DECL_RTL (function), 0), 4, BITS_PER_WORD, 1);
    }
  else
    {
--- a/gnu/dist/gcc4/gcc/config/arm/vfp.md
+++ b/gnu/dist/gcc4/gcc/config/arm/vfp.md
@ -158,9 +158,9 @@
    case 2:
      return output_move_double (operands);
    case 3:
-      return \"fmdrr%?\\t%P0, %1\\t%@ int\";
+      return \"fmdrr%?\\t%P0, %Q1, %R1\\t%@ int\";
    case 4:
-      return \"fmrrd%?\\t%0, %1\\t%@ int\";
+      return \"fmrrd%?\\t%Q0, %R0, %P1\\t%@ int\";
    case 5:
      return \"fcpyd%?\\t%P0, %P1\\t%@ int\";
    case 6:
--- a/gnu/dist/gcc4/gcc/config/bfin/bfin.c
+++ b/gnu/dist/gcc4/gcc/config/bfin/bfin.c
@ -1024,6 +1024,25 @@ legitimize_address (rtx x ATTRIBUTE_UNUSED, rtx oldx ATTRIBUTE_UNUSED,
  return NULL_RTX;
 }

+static rtx
+bfin_delegitimize_address (rtx orig_x)
+{
+  rtx x = orig_x, y;
+
+  if (GET_CODE (x) != MEM)
+    return orig_x;
+
+  x = XEXP (x, 0);
+  if (GET_CODE (x) == PLUS
+      && GET_CODE (XEXP (x, 1)) == UNSPEC
+      && XINT (XEXP (x, 1), 1) == UNSPEC_MOVE_PIC
+      && GET_CODE (XEXP (x, 0)) == REG
+      && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
+    return XVECEXP (XEXP (x, 1), 0, 0);
+
+  return orig_x;
+}
+
 /* This predicate is used to compute the length of a load/store insn.
   OP is a MEM rtx, we return nonzero if its addressing mode requires a
   32 bit instruction.  */
@ -3016,4 +3035,7 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
 #undef TARGET_DEFAULT_TARGET_FLAGS
 #define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT

+#undef TARGET_DELEGITIMIZE_ADDRESS
+#define TARGET_DELEGITIMIZE_ADDRESS bfin_delegitimize_address
+
 struct gcc_target targetm = TARGET_INITIALIZER;
--- a/gnu/dist/gcc4/gcc/config/fr30/fr30.md
+++ b/gnu/dist/gcc4/gcc/config/fr30/fr30.md
@ -290,7 +290,9 @@
 (define_split
  [(set (match_operand:SI 0 "register_operand"  "")
 	(match_operand:SI 1 "const_int_operand" ""))]
-   "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128"
+   "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128
+    && (GET_CODE (operands[0]) != SUBREG
+	|| SCALAR_INT_MODE_P (GET_MODE (XEXP (operands[0], 0))))"
   [(set:SI (match_dup 0) (match_dup 1))
    (set:SI (match_dup 0) (sign_extend:SI (match_dup 2)))]
   "{
@ -654,10 +656,10 @@
    emit_insn (gen_addsi_regs (operands[0], operands[1], operands[2]));
  else if (GET_CODE (operands[2]) != CONST_INT)
    emit_insn (gen_addsi_big_int (operands[0], operands[1], operands[2]));
-  else if (   (REGNO (operands[1]) != FRAME_POINTER_REGNUM)
-           && (REGNO (operands[1]) != ARG_POINTER_REGNUM)
-	   && (INTVAL (operands[2]) >= -16)
-	   && (INTVAL (operands[2]) <= 15))
+  else if (INTVAL (operands[2]) >= -16
+	   && INTVAL (operands[2]) <= 15
+	   && (!REGNO_PTR_FRAME_P (REGNO (operands[1]))
+	       || REGNO (operands[1]) == STACK_POINTER_REGNUM))
    emit_insn (gen_addsi_small_int (operands[0], operands[1], operands[2]));
  else
    emit_insn (gen_addsi_big_int (operands[0], operands[1], operands[2]));
@ -680,8 +682,8 @@
  [(set (match_operand:SI 0 "register_operand"              "=r,r")
 	(plus:SI (match_operand:SI 1 "register_operand"      "0,0")
 		 (match_operand:SI 2 "add_immediate_operand" "I,J")))]
-  "   (REGNO (operands[1]) != FRAME_POINTER_REGNUM)
-   && (REGNO (operands[1]) != ARG_POINTER_REGNUM)"
+  "! REGNO_PTR_FRAME_P (REGNO (operands[1]))
+   || REGNO (operands[1]) == STACK_POINTER_REGNUM"
  "@
   addn	%2, %0
   addn2	%2, %0"
--- a/gnu/dist/gcc4/gcc/config/i386/i386.c
+++ b/gnu/dist/gcc4/gcc/config/i386/i386.c
@ -2656,6 +2656,9 @@ classify_argument (enum machine_mode mode, tree type,
 		{
 		  int num;

+		  if (TREE_TYPE (field) == error_mark_node)
+		    continue;
+
 		  /* Bitfields are always classified as integer.  Handle them
 		     early, since later code would consider them to be
 		     misaligned integers.  */
@ -5567,6 +5570,18 @@ legitimate_constant_p (rtx x)
 	return false;
      break;

+    case CONST_DOUBLE:
+      if (GET_MODE (x) == TImode
+	  && x != CONST0_RTX (TImode)
+          && !TARGET_64BIT)
+	return false;
+      break;
+
+    case CONST_VECTOR:
+      if (x == CONST0_RTX (GET_MODE (x)))
+	return true;
+      return false;
+
    default:
      break;
    }
@ -5582,6 +5597,17 @@ legitimate_constant_p (rtx x)
 static bool
 ix86_cannot_force_const_mem (rtx x)
 {
+  /* We can always put integral constants and vectors in memory.  */
+  switch (GET_CODE (x))
+    {
+    case CONST_INT:
+    case CONST_DOUBLE:
+    case CONST_VECTOR:
+      return false;
+
+    default:
+      break;
+    }
  return !legitimate_constant_p (x);
 }

@ -6576,7 +6602,7 @@ output_pic_addr_const (FILE *file, rtx x, int code)
      break;

    case SYMBOL_REF:
-      assemble_name (file, XSTR (x, 0));
+      output_addr_const (file, x);
      if (!TARGET_MACHO && code == 'P' && ! SYMBOL_REF_LOCAL_P (x))
 	fputs ("@PLT", file);
      break;
--- a/gnu/dist/gcc4/gcc/config/i386/i386.md
+++ b/gnu/dist/gcc4/gcc/config/i386/i386.md
@ -12469,8 +12469,8 @@
 (define_expand "extv"
  [(set (match_operand:SI 0 "register_operand" "")
 	(sign_extract:SI (match_operand:SI 1 "register_operand" "")
-			 (match_operand:SI 2 "immediate_operand" "")
-			 (match_operand:SI 3 "immediate_operand" "")))]
+			 (match_operand:SI 2 "const8_operand" "")
+			 (match_operand:SI 3 "const8_operand" "")))]
  ""
 {
  /* Handle extractions from %ah et al.  */
@ -12486,8 +12486,8 @@
 (define_expand "extzv"
  [(set (match_operand:SI 0 "register_operand" "")
 	(zero_extract:SI (match_operand 1 "ext_register_operand" "")
-			 (match_operand:SI 2 "immediate_operand" "")
-			 (match_operand:SI 3 "immediate_operand" "")))]
+			 (match_operand:SI 2 "const8_operand" "")
+			 (match_operand:SI 3 "const8_operand" "")))]
  ""
 {
  /* Handle extractions from %ah et al.  */
@ -12502,12 +12502,12 @@

 (define_expand "insv"
  [(set (zero_extract (match_operand 0 "ext_register_operand" "")
-		      (match_operand 1 "immediate_operand" "")
-		      (match_operand 2 "immediate_operand" ""))
+		      (match_operand 1 "const8_operand" "")
+		      (match_operand 2 "const8_operand" ""))
        (match_operand 3 "register_operand" ""))]
  ""
 {
-  /* Handle extractions from %ah et al.  */
+  /* Handle insertions to %ah et al.  */
  if (INTVAL (operands[1]) != 8 || INTVAL (operands[2]) != 8)
    FAIL;

--- a/gnu/dist/gcc4/gcc/config/i386/predicates.md
+++ b/gnu/dist/gcc4/gcc/config/i386/predicates.md
@ -530,6 +530,11 @@
  (and (match_code "const_int")
       (match_test "op == const1_rtx")))

+;; Match exactly eight.
+(define_predicate "const8_operand"
+  (and (match_code "const_int")
+       (match_test "INTVAL (op) == 8")))
+
 ;; Match 2, 4, or 8.  Used for leal multiplicands.
 (define_predicate "const248_operand"
  (match_code "const_int")
--- a/gnu/dist/gcc4/gcc/config/pa/t-pa64
+++ b/gnu/dist/gcc4/gcc/config/pa/t-pa64
@ -6,19 +6,19 @@ stublib.c: $(srcdir)/config/pa/stublib.c
 	rm -f stublib.c
 	cp $(srcdir)/config/pa/stublib.c .

-rfi-stub.o: stublib.c
+rfi-stub.o: stublib.c $(GCC_PASSES)
 	$(GCC_FOR_TARGET) -c -O2 -DL_register_frame_info stublib.c \
 	  -o rfi-stub.o

-dfi-stub.o: stublib.c
+dfi-stub.o: stublib.c $(GCC_PASSES)
 	$(GCC_FOR_TARGET) -c -O2 -DL_deregister_frame_info stublib.c \
 	  -o dfi-stub.o

-cxaf-stub.o: stublib.c
+cxaf-stub.o: stublib.c $(GCC_PASSES)
 	$(GCC_FOR_TARGET) -c -O2 -DL_cxa_finalize stublib.c \
 	  -o cxaf-stub.o

-jvrc-stub.o: stublib.c
+jvrc-stub.o: stublib.c $(GCC_PASSES)
 	$(GCC_FOR_TARGET) -c -O2 -DL_Jv_RegisterClasses stublib.c \
 	  -o jvrc-stub.o

--- a/gnu/dist/gcc4/gcc/config/rs6000/aix41.h
+++ b/gnu/dist/gcc4/gcc/config/rs6000/aix41.h
@ -91,3 +91,6 @@
   .set directives.  We handle this by deferring the output of .set
   directives to the end of the compilation unit.  */
 #define TARGET_DEFERRED_OUTPUT_DEFS(DECL,TARGET) true
+
+#undef TARGET_64BIT
+#define TARGET_64BIT 0
--- a/gnu/dist/gcc4/gcc/config/rs6000/rs6000.md
+++ b/gnu/dist/gcc4/gcc/config/rs6000/rs6000.md
@ -8454,15 +8454,6 @@
 		     gen_rtx_REG (SImode, regno + i));
 }")

-(define_insn "*store_multiple_power"
-  [(match_parallel 0 "store_multiple_operation"
-		   [(set (match_operand:SI 1 "indirect_operand" "=Q")
-			 (match_operand:SI 2 "gpc_reg_operand" "r"))
-		    (clobber (match_scratch:SI 3 "=q"))])]
-  "TARGET_STRING && TARGET_POWER"
-  "{stsi|stswi} %2,%P1,%O0"
-  [(set_attr "type" "store")])
-
 (define_insn "*stmsi8"
  [(match_parallel 0 "store_multiple_operation"
    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
@ -8570,6 +8561,114 @@
  "TARGET_STRING && !TARGET_POWER && XVECLEN (operands[0], 0) == 4"
  "{stsi|stswi} %2,%1,%O0"
  [(set_attr "type" "store_ux")])
+
+(define_insn "*stmsi8_power"
+  [(match_parallel 0 "store_multiple_operation"
+    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
+	  (match_operand:SI 2 "gpc_reg_operand" "r"))
+     (clobber (match_scratch:SI 3 "=q"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+	  (match_operand:SI 4 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+	  (match_operand:SI 5 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+	  (match_operand:SI 6 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
+	  (match_operand:SI 7 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 20)))
+	  (match_operand:SI 8 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 24)))
+	  (match_operand:SI 9 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 28)))
+	  (match_operand:SI 10 "gpc_reg_operand" "r"))])]
+  "TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 9"
+  "{stsi|stswi} %2,%1,%O0"
+  [(set_attr "type" "store_ux")])
+
+(define_insn "*stmsi7_power"
+  [(match_parallel 0 "store_multiple_operation"
+    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
+	  (match_operand:SI 2 "gpc_reg_operand" "r"))
+     (clobber (match_scratch:SI 3 "=q"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+	  (match_operand:SI 4 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+	  (match_operand:SI 5 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+	  (match_operand:SI 6 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
+	  (match_operand:SI 7 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 20)))
+	  (match_operand:SI 8 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 24)))
+	  (match_operand:SI 9 "gpc_reg_operand" "r"))])]
+  "TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 8"
+  "{stsi|stswi} %2,%1,%O0"
+  [(set_attr "type" "store_ux")])
+
+(define_insn "*stmsi6_power"
+  [(match_parallel 0 "store_multiple_operation"
+    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
+	  (match_operand:SI 2 "gpc_reg_operand" "r"))
+     (clobber (match_scratch:SI 3 "=q"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+	  (match_operand:SI 4 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+	  (match_operand:SI 5 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+	  (match_operand:SI 6 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
+	  (match_operand:SI 7 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 20)))
+	  (match_operand:SI 8 "gpc_reg_operand" "r"))])]
+  "TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 7"
+  "{stsi|stswi} %2,%1,%O0"
+  [(set_attr "type" "store_ux")])
+
+(define_insn "*stmsi5_power"
+  [(match_parallel 0 "store_multiple_operation"
+    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
+	  (match_operand:SI 2 "gpc_reg_operand" "r"))
+     (clobber (match_scratch:SI 3 "=q"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+	  (match_operand:SI 4 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+	  (match_operand:SI 5 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+	  (match_operand:SI 6 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 16)))
+	  (match_operand:SI 7 "gpc_reg_operand" "r"))])]
+  "TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 6"
+  "{stsi|stswi} %2,%1,%O0"
+  [(set_attr "type" "store_ux")])
+
+(define_insn "*stmsi4_power"
+  [(match_parallel 0 "store_multiple_operation"
+    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
+	  (match_operand:SI 2 "gpc_reg_operand" "r"))
+     (clobber (match_scratch:SI 3 "=q"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+	  (match_operand:SI 4 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+	  (match_operand:SI 5 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 12)))
+	  (match_operand:SI 6 "gpc_reg_operand" "r"))])]
+  "TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 5"
+  "{stsi|stswi} %2,%1,%O0"
+  [(set_attr "type" "store_ux")])
+
+(define_insn "*stmsi3_power"
+  [(match_parallel 0 "store_multiple_operation"
+    [(set (mem:SI (match_operand:SI 1 "gpc_reg_operand" "b"))
+	  (match_operand:SI 2 "gpc_reg_operand" "r"))
+     (clobber (match_scratch:SI 3 "=q"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 4)))
+	  (match_operand:SI 4 "gpc_reg_operand" "r"))
+     (set (mem:SI (plus:SI (match_dup 1) (const_int 8)))
+	  (match_operand:SI 5 "gpc_reg_operand" "r"))])]
+  "TARGET_STRING && TARGET_POWER && XVECLEN (operands[0], 0) == 4"
+  "{stsi|stswi} %2,%1,%O0"
+  [(set_attr "type" "store_ux")])

 (define_expand "setmemsi"
  [(parallel [(set (match_operand:BLK 0 "" "")
--- a/gnu/dist/gcc4/gcc/config/s390/s390.c
+++ b/gnu/dist/gcc4/gcc/config/s390/s390.c
@ -2053,8 +2053,10 @@ s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
 	    || s390_single_part (GEN_INT (value), DImode, SImode, 0) == 1;
 	  
 	case 'n':
-	  return value == -1
-	    || s390_single_part (GEN_INT (value), DImode, SImode, -1) == 1;
+	  return 
+	    (value == -1
+	     || s390_single_part (GEN_INT (value), DImode, SImode, -1) == 1)
+	    && value != -((HOST_WIDE_INT)1 << 32);
 	  
 	default:
 	  gcc_unreachable ();
--- a/gnu/dist/gcc4/gcc/config/s390/s390.md
+++ b/gnu/dist/gcc4/gcc/config/s390/s390.md
@ -50,7 +50,7 @@
 ;;    O -- Multiple letter constraint followed by 1 parameter.
 ;;         s:  Signed extended immediate value (-2G .. 2G-1).
 ;;         p:  Positive extended immediate value (0 .. 4G-1).
-;;         n:  Negative extended immediate value (-4G .. -1).
+;;         n:  Negative extended immediate value (-4G+1 .. -1).
 ;;         These constraints do not accept any operand if the machine does
 ;;         not provide the extended-immediate facility.
 ;;    P -- Any integer constant that can be loaded without literal pool.
--- a/gnu/dist/gcc4/gcc/po/de.po
+++ b/gnu/dist/gcc4/gcc/po/de.po
--- a/gnu/dist/gcc4/gcc/po/sv.po
+++ b/gnu/dist/gcc4/gcc/po/sv.po
--- a/gnu/dist/gcc4/gcc/po/tr.po
+++ b/gnu/dist/gcc4/gcc/po/tr.po
--- a/gnu/dist/gcc4/gcc/po/zh_TW.po
+++ b/gnu/dist/gcc4/gcc/po/zh_TW.po
--- a/gnu/dist/gcc4/libcpp/ChangeLog
+++ b/gnu/dist/gcc4/libcpp/ChangeLog
@ -1,3 +1,7 @@
+2006-05-24  Release Manager
+
+	* GCC 4.1.1 released.
+
 2006-02-28  Release Manager

 	* GCC 4.1.0 released.
--- a/gnu/dist/gcc4/libcpp/po/ChangeLog
+++ b/gnu/dist/gcc4/libcpp/po/ChangeLog
@ -1,3 +1,15 @@
+2006-05-24  Release Manager
+
+	* GCC 4.1.1 released.
+
+2006-05-24  Mark Mitchell  <mark@codesourcery.com>
+
+	* cpplib.pot: Regenerated.
+
+2006-04-21  Joseph S. Myers  <joseph@codesourcery.com>
+
+	* de.po: Update.
+
 2006-03-31  Joseph S. Myers  <joseph@codesourcery.com>

 	* sv.po: Update.
--- a/gnu/dist/gcc4/libcpp/po/cpplib.pot
+++ b/gnu/dist/gcc4/libcpp/po/cpplib.pot
@ -8,7 +8,7 @@ msgid ""
 msgstr ""
 "Project-Id-Version: PACKAGE VERSION\n"
 "Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n"
-"POT-Creation-Date: 2006-02-28 00:12-0800\n"
+"POT-Creation-Date: 2006-05-24 16:28-0700\n"
 "PO-Revision-Date: YEAR-MO-DA HO:MI+ZONE\n"
 "Last-Translator: FULL NAME <EMAIL@ADDRESS>\n"
 "Language-Team: LANGUAGE <LL@li.org>\n"
--- a/gnu/dist/gcc4/libcpp/po/de.po
+++ b/gnu/dist/gcc4/libcpp/po/de.po
@ -1,17 +1,17 @@
 # German translation of gcc messages.
 # Copyright © 2002, 2003, 2004, 2005 Free Software Foundation, Inc.
 # Karl Eichwalder <ke@suse.de>, 2002, 2003.
-# Roland Stigge <stigge@antcom.de>, 2003, 2004, 2005.
+# Roland Stigge <stigge@antcom.de>, 2003, 2004, 2005, 2006.
 # This file is distributed under the same license as the gcc package.
 #
 msgid ""
 msgstr ""
-"Project-Id-Version: cpplib 4.0.0\n"
+"Project-Id-Version: cpplib 4.1.0\n"
 "Report-Msgid-Bugs-To: http://gcc.gnu.org/bugs.html\n"
 "POT-Creation-Date: 2006-02-28 00:12-0800\n"
-"PO-Revision-Date: 2005-04-25 17:45+0100\n"
+"PO-Revision-Date: 2006-03-08 11:30+0100\n"
 "Last-Translator: Roland Stigge <stigge@antcom.de>\n"
-"Language-Team: German <de@li.org>\n"
+"Language-Team: German <translation-team-de@lists.sourceforge.net>\n"
 "MIME-Version: 1.0\n"
 "Content-Type: text/plain; charset=UTF-8\n"
 "Content-Transfer-Encoding: 8bit\n"
@ -47,7 +47,7 @@ msgstr "Zeichen 0x%lx ist kein Unibyte im Ausführungs-Zeichensatz"
 #: charset.c:889
 #, c-format
 msgid "Character %x might not be NFKC"
-msgstr ""
+msgstr "Zeichen %x ist nicht in NFKC"

 #: charset.c:949
 msgid "universal character names are only valid in C++ and C99"
@ -60,7 +60,7 @@ msgstr "die Bedeutung von '\\%c' ist in traditionellem C anders"

 #: charset.c:961
 msgid "In _cpp_valid_ucn but not a UCN"
-msgstr ""
+msgstr "In _cpp_valid_ucn, aber kein UCN"

 #: charset.c:986
 #, c-format
@ -125,9 +125,9 @@ msgid "unknown escape sequence '\\%c'"
 msgstr "unbekannte Fluchtsequenz '\\%c'"

 #: charset.c:1286
-#, fuzzy, c-format
+#, c-format
 msgid "unknown escape sequence: '\\%s'"
-msgstr "unbekannte Fluchtsequenz '\\%c'"
+msgstr "unbekannte Fluchtsequenz: '\\%s'"

 #: charset.c:1293
 msgid "converting escape sequence to execution character set"
@ -148,7 +148,7 @@ msgstr "Leere Zeichenkonstante"
 #: charset.c:1612
 #, c-format
 msgid "failure to convert %s to %s"
-msgstr "Fehler beim Konvertieren von %s in %s"
+msgstr "Fehler beim Konvertieren von %s nach %s"

 #: directives.c:220 directives.c:246
 #, c-format
@ -162,7 +162,7 @@ msgstr "#%s ist eine Erweiterung des GCC"

 #: directives.c:359
 msgid "suggest not using #elif in traditional C"
-msgstr "empfehle, in traditionellem C nicht #elif zu verwenden"
+msgstr "es wird empfohlen, in traditionellem C nicht #elif zu verwenden"

 #: directives.c:362
 #, c-format
@ -172,7 +172,7 @@ msgstr "traditionelles C ignoriert #%s mit eingerücktem #"
 #: directives.c:366
 #, c-format
 msgid "suggest hiding #%s from traditional C with an indented #"
-msgstr "empfehle, #%s vor traditionellem C mit # zu verbergen"
+msgstr "es wird empfohlen, #%s vor traditionellem C mit # zu verbergen"

 #: directives.c:392
 msgid "embedding a directive within macro arguments is not portable"
@ -208,7 +208,7 @@ msgstr "Makronamen müssen Bezeichner sein"
 #: directives.c:586
 #, c-format
 msgid "undefining \"%s\""
-msgstr "un-definiere »%s«"
+msgstr "»%s« wird un-definiert"

 #: directives.c:641
 msgid "missing terminating > character"
@ -235,7 +235,7 @@ msgstr "#include_next in erster Quelldatei"
 #: directives.c:813
 #, c-format
 msgid "invalid flag \"%s\" in line directive"
-msgstr "ungültiges Flag »%s« in line-Direktive"
+msgstr "ungültiges Kennzeichen »%s« in line-Direktive"

 #: directives.c:865
 #, c-format
@ -257,9 +257,9 @@ msgid "\"%s\" after # is not a positive integer"
 msgstr "»%s« hinter # ist keine positive Ganzzahl"

 #: directives.c:1023
-#, fuzzy, c-format
+#, c-format
 msgid "invalid #%s directive"
-msgstr "ungültige #ident-Direktive"
+msgstr "ungültige #%s-Direktive"

 #: directives.c:1112
 #, c-format
@ -282,7 +282,7 @@ msgstr "#pragma once in Hauptdatei"

 #: directives.c:1385
 msgid "invalid #pragma GCC poison directive"
-msgstr "ungültige #pragma GCC Direktive"
+msgstr "ungültige #pragma GCC Poison Direktive"

 #: directives.c:1394
 #, c-format
@ -393,7 +393,7 @@ msgstr "ungültige Ziffer »%c« in Oktal-Konstante"

 #: expr.c:218
 msgid "use of C99 hexadecimal floating constant"
-msgstr "Verwendung von C99 hexadezimaler Gleitkommakonstante"
+msgstr "Verwendung von hexadezimaler C99-Gleitkommakonstante"

 #: expr.c:227
 msgid "exponent has no digits"
@ -541,7 +541,7 @@ msgstr "Kommaoperator in Operand von #if"

 #: expr.c:1491
 msgid "division by zero in #if"
-msgstr "Division durch null in #if"
+msgstr "Division durch Null in #if"

 #: files.c:402
 msgid "NULL directory in find_file"
@ -645,14 +645,14 @@ msgid "null character(s) ignored"
 msgstr "Null-Zeichen ignoriert"

 #: lex.c:448
-#, fuzzy, c-format
+#, c-format
 msgid "`%.*s' is not in NFKC"
-msgstr "»%s« ist kein Template"
+msgstr "»%.*s« ist nicht in NFKC"

 #: lex.c:451
-#, fuzzy, c-format
+#, c-format
 msgid "`%.*s' is not in NFC"
-msgstr "»%s« ist kein Template"
+msgstr "»%.*s« ist nicht in NFC"

 #: lex.c:539
 #, c-format
@ -704,7 +704,7 @@ msgid ""
 "                 from %s:%u"
 msgstr ""
 ",\n"
-"                    von %s:%u"
+"                 von %s:%u"

 #: macro.c:85
 #, c-format
@ -722,7 +722,7 @@ msgstr "Datum und Zeit konnten nicht bestimmt werden"

 #: macro.c:387
 msgid "invalid string literal, ignoring final '\\'"
-msgstr "ungültiges Zeichenkettenliteral, ignoriere abschließendes '\\'"
+msgstr "ungültiges Zeichenkettenliteral, abschließendes '\\' wird ignoriert"

 #: macro.c:470
 #, c-format
--- a/gnu/dist/gcc4/libiberty/ChangeLog
+++ b/gnu/dist/gcc4/libiberty/ChangeLog
@ -1,3 +1,7 @@
+2006-05-24  Release Manager
+
+	* GCC 4.1.1 released.
+
 2006-02-28  Release Manager

 	* GCC 4.1.0 released.
--- a/gnu/dist/gcc4/libobjc/ChangeLog
+++ b/gnu/dist/gcc4/libobjc/ChangeLog
@ -1,3 +1,7 @@
+2006-05-24  Release Manager
+
+	* GCC 4.1.1 released.
+
 2006-02-28  Release Manager

 	* GCC 4.1.0 released.