Reorder the NVMM headers, to make a clear(er) distinction between MI and
MD. Also use #defines for the exit reasons rather than an union. No ABI
change, and no API change except 'cap->u.{}' renamed to 'cap->arch'.
This commit is contained in:
maxv
parent
4402b4d24a
commit
6296b43f91
@ -1,4 +1,4 @@
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/* $NetBSD: nvmm.h,v 1.8 2019/04/10 18:49:04 maxv Exp $ */
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/* $NetBSD: nvmm.h,v 1.9 2019/04/27 15:45:21 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -37,9 +37,6 @@
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#include <dev/nvmm/nvmm.h>
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#include <dev/nvmm/nvmm_ioctl.h>
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#ifdef __x86_64__
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#include <dev/nvmm/x86/nvmm_x86.h>
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#endif
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struct nvmm_machine {
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nvmm_machid_t machid;
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@ -1,4 +1,4 @@
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/* $NetBSD: nvmm.h,v 1.6 2019/04/24 18:19:28 maxv Exp $ */
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/* $NetBSD: nvmm.h,v 1.7 2019/04/27 15:45:21 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -44,78 +44,24 @@ typedef uint64_t gvaddr_t;
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typedef uint32_t nvmm_machid_t;
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typedef uint32_t nvmm_cpuid_t;
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enum nvmm_exit_reason {
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NVMM_EXIT_NONE = 0x0000000000000000,
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#ifdef __x86_64__
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#include <dev/nvmm/x86/nvmm_x86.h>
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#endif
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/* General. */
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NVMM_EXIT_MEMORY = 0x0000000000000001,
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NVMM_EXIT_IO = 0x0000000000000002,
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NVMM_EXIT_MSR = 0x0000000000000003,
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NVMM_EXIT_INT_READY = 0x0000000000000004,
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NVMM_EXIT_NMI_READY = 0x0000000000000005,
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NVMM_EXIT_HALTED = 0x0000000000000006,
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NVMM_EXIT_SHUTDOWN = 0x0000000000000007,
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/* Instructions (x86). */
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NVMM_EXIT_MONITOR = 0x0000000000001000,
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NVMM_EXIT_MWAIT = 0x0000000000001001,
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NVMM_EXIT_MWAIT_COND = 0x0000000000001002,
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NVMM_EXIT_INVALID = 0xFFFFFFFFFFFFFFFF
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};
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struct nvmm_exit_memory {
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int prot;
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gpaddr_t gpa;
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uint8_t inst_len;
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uint8_t inst_bytes[15];
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};
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enum nvmm_exit_io_type {
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NVMM_EXIT_IO_IN,
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NVMM_EXIT_IO_OUT
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};
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struct nvmm_exit_io {
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enum nvmm_exit_io_type type;
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uint16_t port;
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int seg;
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uint8_t address_size;
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uint8_t operand_size;
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bool rep;
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bool str;
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uint64_t npc;
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};
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enum nvmm_exit_msr_type {
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NVMM_EXIT_MSR_RDMSR,
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NVMM_EXIT_MSR_WRMSR
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};
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struct nvmm_exit_msr {
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enum nvmm_exit_msr_type type;
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uint64_t msr;
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uint64_t val;
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uint64_t npc;
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};
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struct nvmm_exit_insn {
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uint64_t npc;
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};
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struct nvmm_exit_invalid {
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uint64_t hwcode;
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};
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#define NVMM_EXIT_NONE 0x0000000000000000ULL
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#define NVMM_EXIT_MEMORY 0x0000000000000001ULL
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#define NVMM_EXIT_IO 0x0000000000000002ULL
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#define NVMM_EXIT_MSR 0x0000000000000003ULL /* x86 only? */
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#define NVMM_EXIT_INT_READY 0x0000000000000004ULL
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#define NVMM_EXIT_NMI_READY 0x0000000000000005ULL
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#define NVMM_EXIT_HALTED 0x0000000000000006ULL
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#define NVMM_EXIT_SHUTDOWN 0x0000000000000007ULL
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/* Range 0x1000-0x10000 is MD. */
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#define NVMM_EXIT_INVALID 0xFFFFFFFFFFFFFFFFULL
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struct nvmm_exit {
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enum nvmm_exit_reason reason;
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union {
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struct nvmm_exit_memory mem;
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struct nvmm_exit_io io;
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struct nvmm_exit_msr msr;
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struct nvmm_exit_insn insn;
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struct nvmm_exit_invalid inv;
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} u;
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uint64_t reason;
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union nvmm_exit_md u;
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uint64_t exitstate[8];
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};
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@ -145,14 +91,7 @@ struct nvmm_capability {
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uint64_t max_machines;
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uint64_t max_vcpus;
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uint64_t max_ram;
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union {
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struct {
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uint64_t xcr0_mask;
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uint64_t mxcsr_mask;
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uint64_t conf_cpuid_maxops;
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} x86;
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uint64_t rsvd[8];
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} u;
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struct nvmm_cap_md arch;
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};
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: nvmm_x86.h,v 1.11 2019/04/06 11:49:53 maxv Exp $ */
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/* $NetBSD: nvmm_x86.h,v 1.12 2019/04/27 15:45:21 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -32,6 +32,76 @@
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#ifndef _NVMM_X86_H_
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#define _NVMM_X86_H_
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/* --------------------------------------------------------------------- */
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#ifndef ASM_NVMM
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struct nvmm_exit_memory {
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int prot;
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gpaddr_t gpa;
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uint8_t inst_len;
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uint8_t inst_bytes[15];
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};
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enum nvmm_exit_io_type {
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NVMM_EXIT_IO_IN,
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NVMM_EXIT_IO_OUT
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};
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struct nvmm_exit_io {
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enum nvmm_exit_io_type type;
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uint16_t port;
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int seg;
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uint8_t address_size;
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uint8_t operand_size;
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bool rep;
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bool str;
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uint64_t npc;
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};
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enum nvmm_exit_msr_type {
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NVMM_EXIT_MSR_RDMSR,
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NVMM_EXIT_MSR_WRMSR
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};
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struct nvmm_exit_msr {
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enum nvmm_exit_msr_type type;
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uint64_t msr;
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uint64_t val;
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uint64_t npc;
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};
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struct nvmm_exit_insn {
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uint64_t npc;
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};
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struct nvmm_exit_invalid {
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uint64_t hwcode;
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};
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union nvmm_exit_md {
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struct nvmm_exit_memory mem;
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struct nvmm_exit_io io;
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struct nvmm_exit_msr msr;
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struct nvmm_exit_insn insn;
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struct nvmm_exit_invalid inv;
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};
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#define NVMM_EXIT_MONITOR 0x0000000000001000ULL
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#define NVMM_EXIT_MWAIT 0x0000000000001001ULL
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#define NVMM_EXIT_MWAIT_COND 0x0000000000001002ULL
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struct nvmm_cap_md {
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uint64_t xcr0_mask;
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uint64_t mxcsr_mask;
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uint64_t conf_cpuid_maxops;
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uint64_t rsvd[5];
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};
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#endif
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/* --------------------------------------------------------------------- */
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/* Segments. */
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#define NVMM_X64_SEG_ES 0
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#define NVMM_X64_SEG_CS 1
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@ -1,4 +1,4 @@
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/* $NetBSD: nvmm_x86_svm.c,v 1.41 2019/04/27 09:06:18 maxv Exp $ */
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/* $NetBSD: nvmm_x86_svm.c,v 1.42 2019/04/27 15:45:21 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.41 2019/04/27 09:06:18 maxv Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_svm.c,v 1.42 2019/04/27 15:45:21 maxv Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -2288,9 +2288,9 @@ svm_fini(void)
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static void
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svm_capability(struct nvmm_capability *cap)
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{
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cap->u.x86.xcr0_mask = svm_xcr0_mask;
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cap->u.x86.mxcsr_mask = x86_fpu_mxcsr_mask;
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cap->u.x86.conf_cpuid_maxops = SVM_NCPUIDS;
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cap->arch.xcr0_mask = svm_xcr0_mask;
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cap->arch.mxcsr_mask = x86_fpu_mxcsr_mask;
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cap->arch.conf_cpuid_maxops = SVM_NCPUIDS;
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}
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const struct nvmm_impl nvmm_x86_svm = {
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@ -1,4 +1,4 @@
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/* $NetBSD: nvmm_x86_vmx.c,v 1.29 2019/04/27 09:06:18 maxv Exp $ */
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/* $NetBSD: nvmm_x86_vmx.c,v 1.30 2019/04/27 15:45:21 maxv Exp $ */
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/*
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* Copyright (c) 2018 The NetBSD Foundation, Inc.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.29 2019/04/27 09:06:18 maxv Exp $");
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__KERNEL_RCSID(0, "$NetBSD: nvmm_x86_vmx.c,v 1.30 2019/04/27 15:45:21 maxv Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -3083,9 +3083,9 @@ vmx_fini(void)
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static void
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vmx_capability(struct nvmm_capability *cap)
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{
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cap->u.x86.xcr0_mask = vmx_xcr0_mask;
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cap->u.x86.mxcsr_mask = x86_fpu_mxcsr_mask;
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cap->u.x86.conf_cpuid_maxops = VMX_NCPUIDS;
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cap->arch.xcr0_mask = vmx_xcr0_mask;
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cap->arch.mxcsr_mask = x86_fpu_mxcsr_mask;
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cap->arch.conf_cpuid_maxops = VMX_NCPUIDS;
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}
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const struct nvmm_impl nvmm_x86_vmx = {
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