Add am7930 audio driver.
This commit is contained in:
augustss
parent
734bcf16ec
commit
621ef4d785
@ -1,4 +1,4 @@
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/* $NetBSD: conf.c,v 1.38 2000/02/19 09:43:40 nisimura Exp $ */
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/* $NetBSD: conf.c,v 1.39 2000/05/02 06:43:43 augustss Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -58,7 +58,8 @@ bdev_decl(sd);
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bdev_decl(st);
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bdev_decl(sw);
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bdev_decl(vnd);
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#include "audio.h"
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cdev_decl(audio);
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#include "rz.h"
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#include "tz.h"
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bdev_decl(rz);
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@ -285,6 +286,7 @@ struct cdevsw cdevsw[] =
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cdev_disk_init(NRAID,raid), /* 96: RAIDframe disk driver */
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cdev_disk_init(NMD,md), /* 97: memory disk driver */
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cdev_fbm_init(NPX,px), /* 98: PixelStamp board driver */
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cdev_audio_init(NAUDIO,audio), /* 99 generic audio I/O */
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};
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int nchrdev = sizeof(cdevsw) / sizeof(cdevsw[0]);
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@ -422,6 +424,7 @@ static int chrtoblktbl[] = {
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/* 96 */ 32, /* RAIDframe */
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/* 97 */ 17, /* memory disk */
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/* 98 */ NODEV,
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/* 99 */ NODEV,
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};
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/*
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@ -1,4 +1,4 @@
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/* $NetBSD: dec_maxine.c,v 1.31 2000/04/11 06:50:38 nisimura Exp $ */
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/* $NetBSD: dec_maxine.c,v 1.32 2000/05/02 06:43:43 augustss Exp $ */
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/*
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* Copyright (c) 1998 Jonathan Stone. All rights reserved.
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@ -73,7 +73,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: dec_maxine.c,v 1.31 2000/04/11 06:50:38 nisimura Exp $");
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__KERNEL_RCSID(0, "$NetBSD: dec_maxine.c,v 1.32 2000/05/02 06:43:43 augustss Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -326,13 +326,13 @@ dec_maxine_intr(status, cause, pc, ipending)
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CHECKINTR(SYS_DEV_LANCE, IOASIC_INTR_LANCE);
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CHECKINTR(SYS_DEV_SCSI, IOASIC_INTR_SCSI);
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/* CHECKINTR(SYS_DEV_OPT2, XINE_INTR_VINT); */
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/* CHECKINTR(SYS_DEV_ISDN, IOASIC_INTR_ISDN); */
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CHECKINTR(SYS_DEV_ISDN, (IOASIC_INTR_ISDN_DS_TXLOAD | IOASIC_INTR_ISDN_DS_RXLOAD));
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/* CHECKINTR(SYS_DEV_FDC, IOASIC_INTR_FDC); */
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CHECKINTR(SYS_DEV_OPT1, XINE_INTR_TC_1);
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CHECKINTR(SYS_DEV_OPT0, XINE_INTR_TC_0);
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#define ERRORS (IOASIC_INTR_ISDN_OVRUN|IOASIC_INTR_ISDN_READ_E|IOASIC_INTR_SCSI_OVRUN|IOASIC_INTR_SCSI_READ_E|IOASIC_INTR_LANCE_READ_E)
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#define PTRLOAD (IOASIC_INTR_ISDN_PTR_LOAD|IOASIC_INTR_SCSI_PTR_LOAD)
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#define ERRORS (IOASIC_INTR_ISDN|IOASIC_INTR_ISDN_OVRUN|IOASIC_INTR_ISDN_READ_E|IOASIC_INTR_SCSI_OVRUN|IOASIC_INTR_SCSI_READ_E|IOASIC_INTR_LANCE_READ_E)
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#define PTRLOAD (IOASIC_INTR_ISDN_DS_TXLOAD|IOASIC_INTR_ISDN_DS_RXLOAD|IOASIC_INTR_SCSI_PTR_LOAD)
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#if 0
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if (can_serve & IOASIC_INTR_SCSI_PTR_LOAD) {
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802
sys/dev/tc/bba.c
Normal file
802
sys/dev/tc/bba.c
Normal file
@ -0,0 +1,802 @@
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/* $NetBSD: bba.c,v 1.1 2000/05/02 06:43:05 augustss Exp $ */
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/*
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/* maxine/alpha baseboard audio (bba) */
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#include "audio.h"
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#if NAUDIO > 0
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <vm/vm.h> /* for PAGE_SIZE */
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#include <sys/audioio.h>
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#include <dev/audio_if.h>
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#include <dev/ic/am7930reg.h>
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#include <dev/ic/am7930var.h>
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#include <dev/tc/tcvar.h>
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#include <dev/tc/ioasicreg.h>
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#include <dev/tc/ioasicvar.h>
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#ifdef pmax
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#include <pmax/pmax/maxine.h>
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#define IOASIC_CSR_ISDN_ENABLE XINE_CSR_ISDN_ENABLE
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#define IOASIC_INTR_ISDN_TXLOAD IOASIC_INTR_ISDN_DS_TXLOAD
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#define IOASIC_INTR_ISDN_RXLOAD IOASIC_INTR_ISDN_DS_RXLOAD
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#ifdef IOASIC_INTR_ISDN_OVRUN
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#undef IOASIC_INTR_ISDN_OVRUN
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#endif
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#define IOASIC_INTR_ISDN_OVRUN IOASIC_INTR_ISDN_DS_OVRUN
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#endif
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#ifdef AUDIO_DEBUG
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#define DPRINTF(x) if (am7930debug) printf x
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#else
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#define DPRINTF(x)
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#endif /* AUDIO_DEBUG */
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#define BBA_MAX_DMA_SEGMENTS 16
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struct bba_mem {
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bus_addr_t addr;
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bus_size_t size;
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caddr_t kva;
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struct bba_mem *next;
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};
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struct bba_dma_state {
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bus_dmamap_t dmam; /* dma map */
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int active;
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int curseg; /* current segment in dma buffer */
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void (*intr)__P((void *)); /* higher-level audio handler */
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void *intr_arg;
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};
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struct bba_softc {
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struct am7930_softc sc_am7930; /* glue to MI code */
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bus_space_tag_t sc_bst; /* IOASIC bus tag/handle */
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bus_space_handle_t sc_bsh;
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bus_dma_tag_t sc_dmat;
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bus_space_handle_t sc_codec_bsh; /* codec bus space handle */
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struct bba_mem *sc_mem_head; /* list of buffers */
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struct bba_dma_state sc_tx_dma_state;
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struct bba_dma_state sc_rx_dma_state;
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};
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int bba_match __P((struct device *, struct cfdata *, void *));
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void bba_attach __P((struct device *, struct device *, void *));
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struct cfattach bba_ca = {
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sizeof(struct bba_softc), bba_match, bba_attach
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};
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/*
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* Define our interface into the am7930 MI driver.
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*/
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u_int8_t bba_codec_iread __P((struct am7930_softc *, int));
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u_int16_t bba_codec_iread16 __P((struct am7930_softc *, int));
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void bba_codec_iwrite __P((struct am7930_softc *, int, u_int8_t));
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void bba_codec_iwrite16 __P((struct am7930_softc *, int, u_int16_t));
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void bba_onopen __P((struct am7930_softc *sc));
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void bba_onclose __P((struct am7930_softc *sc));
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void bba_output_conv __P((void *, u_int8_t *, int));
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void bba_input_conv __P((void *, u_int8_t *, int));
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struct am7930_glue bba_glue = {
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bba_codec_iread,
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bba_codec_iwrite,
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bba_codec_iread16,
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bba_codec_iwrite16,
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bba_onopen,
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bba_onclose,
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4,
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bba_input_conv,
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bba_output_conv,
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};
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/*
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* Define our interface to the higher level audio driver.
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*/
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int bba_round_blocksize __P((void *, int));
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int bba_halt_output __P((void *));
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int bba_halt_input __P((void *));
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int bba_getdev __P((void *, struct audio_device *));
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void *bba_allocm __P((void *, int, size_t, int, int));
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void bba_freem __P((void *, void *, int));
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size_t bba_round_buffersize __P((void *, int, size_t));
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int bba_trigger_output __P((void *, void *, void *, int,
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void (*)(void *), void *, struct audio_params *));
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int bba_trigger_input __P((void *, void *, void *, int,
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void (*)(void *), void *, struct audio_params *));
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struct audio_hw_if sa_hw_if = {
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am7930_open,
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am7930_close,
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0,
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am7930_query_encoding,
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am7930_set_params,
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bba_round_blocksize, /* md */
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am7930_commit_settings,
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0,
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0,
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0,
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0,
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bba_halt_output, /* md */
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bba_halt_input, /* md */
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0,
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bba_getdev,
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0,
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am7930_set_port,
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am7930_get_port,
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am7930_query_devinfo,
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bba_allocm, /* md */
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bba_freem, /* md */
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bba_round_buffersize, /* md */
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0,
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am7930_get_props,
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bba_trigger_output, /* md */
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bba_trigger_input /* md */
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};
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struct audio_device bba_device = {
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"am7930",
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"x",
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"bba"
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};
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int bba_intr __P((void *));
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void bba_reset __P((struct bba_softc *, int));
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void bba_codec_dwrite __P((struct am7930_softc *, int, u_int8_t));
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u_int8_t bba_codec_dread __P((struct am7930_softc *, int));
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int bba_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct ioasicdev_attach_args *ia = aux;
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if (strcmp(ia->iada_modname, "isdn") != 0 &&
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strcmp(ia->iada_modname, "AMD79c30") != 0)
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return 0;
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return 1;
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}
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void
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bba_attach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct ioasicdev_attach_args *ia = aux;
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struct bba_softc *sc = (struct bba_softc *)self;
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struct am7930_softc *asc = &sc->sc_am7930;
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sc->sc_bst = ((struct ioasic_softc *)parent)->sc_bst;
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sc->sc_bsh = ((struct ioasic_softc *)parent)->sc_bsh;
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sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat;
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/* get the bus space handle for codec */
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if (bus_space_subregion(sc->sc_bst, sc->sc_bsh,
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ia->iada_offset, 0, &sc->sc_codec_bsh)) {
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printf("%s: unable to map device\n", asc->sc_dev.dv_xname);
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return;
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}
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printf("\n");
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bba_reset(sc,1);
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/*
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* Set up glue for MI code early; we use some of it here.
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*/
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asc->sc_glue = &bba_glue;
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/*
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* MI initialisation. We will be doing DMA.
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*/
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am7930_init(asc, AUDIOAMD_DMA_MODE);
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ioasic_intr_establish(parent, ia->iada_cookie, TC_IPL_NONE,
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bba_intr, sc);
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audio_attach_mi(&sa_hw_if, asc, &asc->sc_dev);
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}
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void
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bba_onopen(sc)
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struct am7930_softc *sc;
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{
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bba_reset((struct bba_softc *)sc, 0);
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}
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void
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bba_onclose(sc)
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struct am7930_softc *sc;
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{
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bba_halt_input((struct bba_softc *)sc);
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bba_halt_output((struct bba_softc *)sc);
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}
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void
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bba_reset(sc, reset)
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struct bba_softc *sc;
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int reset;
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{
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u_int32_t ssr;
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/* disable any DMA and reset the codec */
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ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
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ssr &= ~(IOASIC_CSR_DMAEN_ISDN_T | IOASIC_CSR_DMAEN_ISDN_R);
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if (reset)
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ssr &= ~IOASIC_CSR_ISDN_ENABLE;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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DELAY(10); /* 400ns required for codec to reset */
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/* initialise DMA pointers */
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
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/* take out of reset state */
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if (reset) {
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ssr |= IOASIC_CSR_ISDN_ENABLE;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
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}
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}
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void *
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bba_allocm(addr, direction, size, pool, flags)
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void *addr;
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int direction;
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size_t size;
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int pool, flags;
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{
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struct am7930_softc *asc = addr;
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struct bba_softc *sc = addr;
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bus_dma_segment_t seg;
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int rseg;
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caddr_t kva;
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struct bba_mem *m;
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int state = 0;
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DPRINTF(("bba_allocm: size = %d\n",size));
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if (bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg,
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1, &rseg, BUS_DMA_NOWAIT)) {
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printf("%s: can't allocate DMA buffer\n",
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asc->sc_dev.dv_xname);
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goto bad;
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}
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state |= 1;
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if (bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
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&kva, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
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printf("%s: can't map DMA buffer\n", asc->sc_dev.dv_xname);
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goto bad;
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}
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state |= 2;
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m = malloc(sizeof(struct bba_mem), pool, flags);
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if (m == NULL)
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goto bad;
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m->addr = seg.ds_addr;
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m->size = seg.ds_len;
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m->kva = kva;
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m->next = sc->sc_mem_head;
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sc->sc_mem_head = m;
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return (void *)kva;
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bad:
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if (state & 2)
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bus_dmamem_unmap(sc->sc_dmat, kva, size);
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if (state & 1)
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bus_dmamem_free(sc->sc_dmat, &seg, 1);
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return NULL;
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}
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void
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bba_freem(addr, ptr, pool)
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void *addr;
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void *ptr;
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int pool;
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{
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struct bba_softc *sc = addr;
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struct bba_mem **mp, *m;
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bus_dma_segment_t seg;
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caddr_t kva = (caddr_t)addr;
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for (mp = &sc->sc_mem_head; *mp && (*mp)->kva != kva;
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mp = &(*mp)->next)
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/* nothing */ ;
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m = *mp;
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if (m != NULL) {
|
||||
printf("bba_freem: freeing unallocted memory\n");
|
||||
return;
|
||||
}
|
||||
*mp = m->next;
|
||||
bus_dmamem_unmap(sc->sc_dmat, kva, m->size);
|
||||
|
||||
seg.ds_addr = m->addr;
|
||||
seg.ds_len = m->size;
|
||||
bus_dmamem_free(sc->sc_dmat, &seg, 1);
|
||||
free(m, pool);
|
||||
}
|
||||
|
||||
|
||||
size_t
|
||||
bba_round_buffersize(addr, direction, size)
|
||||
void *addr;
|
||||
int direction;
|
||||
size_t size;
|
||||
{
|
||||
DPRINTF(("bba_round_buffersize: size=%d\n", size));
|
||||
|
||||
#define BBA_BUFFERSIZE (BBA_MAX_DMA_SEGMENTS * PAGE_SIZE)
|
||||
return (size > BBA_BUFFERSIZE ? BBA_BUFFERSIZE : round_page(size));
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
bba_halt_output(addr)
|
||||
void *addr;
|
||||
{
|
||||
struct bba_softc *sc = addr;
|
||||
struct bba_dma_state *d = &sc->sc_tx_dma_state;
|
||||
u_int32_t ssr;
|
||||
|
||||
/* disable any DMA */
|
||||
ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
|
||||
ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR, -1);
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR, -1);
|
||||
|
||||
if (d->active) {
|
||||
bus_dmamap_unload(sc->sc_dmat, d->dmam);
|
||||
bus_dmamap_destroy(sc->sc_dmat, d->dmam);
|
||||
d->active = 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
bba_halt_input(addr)
|
||||
void *addr;
|
||||
{
|
||||
struct bba_softc *sc = addr;
|
||||
struct bba_dma_state *d = &sc->sc_rx_dma_state;
|
||||
u_int32_t ssr;
|
||||
|
||||
/* disable any DMA */
|
||||
ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
|
||||
ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR, -1);
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR, -1);
|
||||
|
||||
if (d->active) {
|
||||
bus_dmamap_unload(sc->sc_dmat, d->dmam);
|
||||
bus_dmamap_destroy(sc->sc_dmat, d->dmam);
|
||||
d->active = 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
bba_getdev(addr, retp)
|
||||
void *addr;
|
||||
struct audio_device *retp;
|
||||
{
|
||||
*retp = bba_device;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
bba_trigger_output(addr, start, end, blksize, intr, arg, param)
|
||||
void *addr;
|
||||
void *start, *end;
|
||||
int blksize;
|
||||
void (*intr) __P((void *));
|
||||
void *arg;
|
||||
struct audio_params *param;
|
||||
{
|
||||
struct bba_softc *sc = addr;
|
||||
struct bba_dma_state *d = &sc->sc_tx_dma_state;
|
||||
u_int32_t ssr;
|
||||
tc_addr_t phys, nphys;
|
||||
int state = 0;
|
||||
|
||||
DPRINTF(("bba_trigger_output: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
|
||||
addr, start, end, blksize, intr, arg));
|
||||
|
||||
if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
|
||||
BBA_MAX_DMA_SEGMENTS, PAGE_SIZE, 0, BUS_DMA_NOWAIT, &d->dmam)) {
|
||||
printf("bba_trigger_output: can't create DMA map\n");
|
||||
goto bad;
|
||||
}
|
||||
state |= 1;
|
||||
|
||||
if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
|
||||
(char *)end - (char *)start, NULL, BUS_DMA_NOWAIT)) {
|
||||
printf("bba_trigger_output: can't load DMA map\n");
|
||||
goto bad;
|
||||
}
|
||||
state |= 2;
|
||||
|
||||
/* disable any DMA */
|
||||
ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
|
||||
ssr &= ~IOASIC_CSR_DMAEN_ISDN_T;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
|
||||
d->intr = intr;
|
||||
d->intr_arg = arg;
|
||||
d->curseg = 1;
|
||||
|
||||
/* get physical address of buffer start */
|
||||
phys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
|
||||
nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg+1].ds_addr;
|
||||
|
||||
/* setup DMA pointer */
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_DMAPTR,
|
||||
IOASIC_DMA_ADDR(phys));
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_X_NEXTPTR,
|
||||
IOASIC_DMA_ADDR(nphys));
|
||||
|
||||
/* kick off DMA */
|
||||
ssr |= IOASIC_CSR_DMAEN_ISDN_T;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
|
||||
wbflush();
|
||||
|
||||
d->active = 1;
|
||||
|
||||
return 0;
|
||||
|
||||
bad:
|
||||
if (state & 2)
|
||||
bus_dmamap_unload(sc->sc_dmat, d->dmam);
|
||||
if (state & 1)
|
||||
bus_dmamap_destroy(sc->sc_dmat, d->dmam);
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
bba_trigger_input(addr, start, end, blksize, intr, arg, param)
|
||||
void *addr;
|
||||
void *start, *end;
|
||||
int blksize;
|
||||
void (*intr) __P((void *));
|
||||
void *arg;
|
||||
struct audio_params *param;
|
||||
{
|
||||
struct bba_softc *sc = (struct bba_softc *)addr;
|
||||
struct bba_dma_state *d = &sc->sc_rx_dma_state;
|
||||
tc_addr_t phys, nphys;
|
||||
u_int32_t ssr;
|
||||
int state = 0;
|
||||
|
||||
DPRINTF(("bba_trigger_input: sc=%p start=%p end=%p blksize=%d intr=%p(%p)\n",
|
||||
addr, start, end, blksize, intr, arg));
|
||||
|
||||
if (bus_dmamap_create(sc->sc_dmat, (char *)end - (char *)start,
|
||||
BBA_MAX_DMA_SEGMENTS, PAGE_SIZE, 0, BUS_DMA_NOWAIT, &d->dmam)) {
|
||||
printf("bba_trigger_input: can't create DMA map\n");
|
||||
goto bad;
|
||||
}
|
||||
state |= 1;
|
||||
|
||||
if (bus_dmamap_load(sc->sc_dmat, d->dmam, start,
|
||||
(char *)end - (char *)start, NULL, BUS_DMA_NOWAIT)) {
|
||||
printf("bba_trigger_input: can't load DMA map\n");
|
||||
goto bad;
|
||||
}
|
||||
state |= 2;
|
||||
|
||||
/* disable any DMA */
|
||||
ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
|
||||
ssr &= ~IOASIC_CSR_DMAEN_ISDN_R;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
|
||||
d->intr = intr;
|
||||
d->intr_arg = arg;
|
||||
d->curseg = 1;
|
||||
|
||||
/* get physical address of buffer start */
|
||||
phys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
|
||||
nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg+1].ds_addr;
|
||||
|
||||
/* setup DMA pointer */
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_DMAPTR,
|
||||
IOASIC_DMA_ADDR(phys));
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_ISDN_R_NEXTPTR,
|
||||
IOASIC_DMA_ADDR(nphys));
|
||||
|
||||
/* kick off DMA */
|
||||
ssr |= IOASIC_CSR_DMAEN_ISDN_R;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
|
||||
wbflush();
|
||||
|
||||
d->active = 1;
|
||||
|
||||
return 0;
|
||||
|
||||
bad:
|
||||
if (state & 2)
|
||||
bus_dmamap_unload(sc->sc_dmat, d->dmam);
|
||||
if (state & 1)
|
||||
bus_dmamap_destroy(sc->sc_dmat, d->dmam);
|
||||
return 1;
|
||||
}
|
||||
|
||||
int
|
||||
bba_intr(addr)
|
||||
void *addr;
|
||||
{
|
||||
struct bba_softc *sc = addr;
|
||||
struct bba_dma_state *d;
|
||||
tc_addr_t nphys;
|
||||
int s, mask;
|
||||
|
||||
s = splaudio();
|
||||
|
||||
mask = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_INTR);
|
||||
|
||||
if (mask & IOASIC_INTR_ISDN_TXLOAD) {
|
||||
d = &sc->sc_tx_dma_state;
|
||||
d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
|
||||
nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh,
|
||||
IOASIC_ISDN_X_NEXTPTR, IOASIC_DMA_ADDR(nphys));
|
||||
if (d->intr != NULL)
|
||||
(*d->intr)(d->intr_arg);
|
||||
}
|
||||
if (mask & IOASIC_INTR_ISDN_RXLOAD) {
|
||||
d = &sc->sc_rx_dma_state;
|
||||
d->curseg = (d->curseg+1) % d->dmam->dm_nsegs;
|
||||
nphys = (tc_addr_t)d->dmam->dm_segs[d->curseg].ds_addr;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh,
|
||||
IOASIC_ISDN_R_NEXTPTR, IOASIC_DMA_ADDR(nphys));
|
||||
if (d->intr != NULL)
|
||||
(*d->intr)(d->intr_arg);
|
||||
}
|
||||
|
||||
splx(s);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
bba_input_conv(v, p, cc)
|
||||
void *v;
|
||||
u_int8_t *p;
|
||||
int cc;
|
||||
{
|
||||
u_int8_t *q = p;
|
||||
|
||||
DPRINTF(("bba_input_conv(): v=%p p=%p cc=%d\n", v, p, cc));
|
||||
|
||||
/*
|
||||
* p points start of buffer
|
||||
* cc is the number of bytes in the destination buffer
|
||||
*/
|
||||
|
||||
while (--cc >= 0) {
|
||||
*p = ((*(u_int32_t *)q)>>16)&0xff;
|
||||
q += 4;
|
||||
p++;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
bba_output_conv(v, p, cc)
|
||||
void *v;
|
||||
u_int8_t *p;
|
||||
int cc;
|
||||
{
|
||||
u_int8_t *q = p;
|
||||
|
||||
DPRINTF(("bba_output_conv(): v=%p p=%p cc=%d\n", v, p, cc));
|
||||
|
||||
/*
|
||||
* p points start of buffer
|
||||
* cc is the number of bytes in the source buffer
|
||||
*/
|
||||
|
||||
p += cc;
|
||||
q += cc * 4;
|
||||
while (--cc >= 0) {
|
||||
q -= 4;
|
||||
p -= 1;
|
||||
*(u_int32_t *)q = (*p<<16);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
bba_round_blocksize(addr, blk)
|
||||
void *addr;
|
||||
int blk;
|
||||
{
|
||||
return (PAGE_SIZE);
|
||||
}
|
||||
|
||||
|
||||
/* indirect write */
|
||||
void
|
||||
bba_codec_iwrite(sc, reg, val)
|
||||
struct am7930_softc *sc;
|
||||
int reg;
|
||||
u_int8_t val;
|
||||
{
|
||||
DPRINTF(("bba_codec_iwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
|
||||
|
||||
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val);
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
bba_codec_iwrite16(sc, reg, val)
|
||||
struct am7930_softc *sc;
|
||||
int reg;
|
||||
u_int16_t val;
|
||||
{
|
||||
DPRINTF(("bba_codec_iwrite16(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
|
||||
|
||||
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
||||
#if 0
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val);
|
||||
#else
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val);
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
|
||||
#endif
|
||||
}
|
||||
|
||||
|
||||
u_int16_t
|
||||
bba_codec_iread16(sc, reg)
|
||||
struct am7930_softc *sc;
|
||||
int reg;
|
||||
{
|
||||
u_int16_t val;
|
||||
DPRINTF(("bba_codec_iread16(): sc=%p, reg=%d\n",sc,reg));
|
||||
|
||||
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
||||
#if 0
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val>>8);
|
||||
bba_codec_dwrite(sc, AM7930_DREG_DR, val);
|
||||
#else
|
||||
val = bba_codec_dread(sc, AM7930_DREG_DR) << 8;
|
||||
val |= bba_codec_dread(sc, AM7930_DREG_DR);
|
||||
#endif
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
/* indirect read */
|
||||
u_int8_t
|
||||
bba_codec_iread(sc, reg)
|
||||
struct am7930_softc *sc;
|
||||
int reg;
|
||||
{
|
||||
u_int8_t val;
|
||||
|
||||
DPRINTF(("bba_codec_iread(): sc=%p, reg=%d\n",sc,reg));
|
||||
|
||||
bba_codec_dwrite(sc, AM7930_DREG_CR, reg);
|
||||
val = bba_codec_dread(sc, AM7930_DREG_DR);
|
||||
|
||||
DPRINTF(("read 0x%x (%d)\n", val, val));
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
|
||||
#define TIMETOWASTE 50
|
||||
|
||||
/* direct write */
|
||||
void
|
||||
bba_codec_dwrite(asc, reg, val)
|
||||
struct am7930_softc *asc;
|
||||
int reg;
|
||||
u_int8_t val;
|
||||
{
|
||||
struct bba_softc *sc = (struct bba_softc *)asc;
|
||||
int i;
|
||||
|
||||
DPRINTF(("bba_codec_dwrite(): sc=%p, reg=%d, val=%d\n",sc,reg,val));
|
||||
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_codec_bsh, (reg<<6), val);
|
||||
|
||||
for (i=0; i<TIMETOWASTE; i++) {};
|
||||
}
|
||||
|
||||
/* direct read */
|
||||
u_int8_t
|
||||
bba_codec_dread(asc, reg)
|
||||
struct am7930_softc *asc;
|
||||
int reg;
|
||||
{
|
||||
struct bba_softc *sc = (struct bba_softc *)asc;
|
||||
u_int8_t val;
|
||||
int i;
|
||||
|
||||
DPRINTF(("bba_codec_dread(): sc=%p, reg=%d\n",sc,reg));
|
||||
|
||||
val = bus_space_read_1(sc->sc_bst, sc->sc_codec_bsh, (reg<<6));
|
||||
|
||||
for (i=0; i<TIMETOWASTE; i++) {};
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
#endif /* NAUDIO > 0 */
|
||||
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.tc,v 1.17 1999/09/09 06:33:38 nisimura Exp $
|
||||
# $NetBSD: files.tc,v 1.18 2000/05/02 06:43:05 augustss Exp $
|
||||
#
|
||||
# Config file and device description for machine-independent
|
||||
# TurboChannel code. Included by ports that need it.
|
||||
@ -24,10 +24,10 @@ attach le at tc with le_tc: le24, le_dec_subr
|
||||
file dev/tc/if_le_ioasic.c le_ioasic
|
||||
file dev/tc/if_le_tc.c le_tc
|
||||
|
||||
# ioasic audio
|
||||
attach audioamd at ioasic with am7930_ioasic
|
||||
file dev/tc/am7930_ioasic.c am7930_ioasic
|
||||
|
||||
# baseboard audio
|
||||
device bba: audio,am7930
|
||||
attach bba at ioasic
|
||||
file dev/tc/bba.c bba
|
||||
|
||||
# DEC DEFTA TC FDDI Controller
|
||||
device fta: pdq, fddi, ifnet, arp
|
||||
|
||||
Loading…
Reference in New Issue
Block a user