Merge isa_machdep.c from netwinder and cats into footbridge/isa (where it
joins other machdep files) Saves maintaining multiple copies of the same thing, the only differences were: IRQ line used on the footbridge (made that a define in include/isa_machdep.h) name of a dma_ranges variable contained arch name, so just made it generic.
This commit is contained in:
parent
2991c538da
commit
603917a2c7
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@ -1,4 +1,4 @@
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/* $NetBSD: isa_machdep.c,v 1.6 2002/07/31 17:34:25 thorpej Exp $ */
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/* $NetBSD: isa_machdep.c,v 1.1 2002/10/12 11:53:38 chris Exp $ */
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/*-
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/*-
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* Copyright (c) 1996-1998 The NetBSD Foundation, Inc.
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* Copyright (c) 1996-1998 The NetBSD Foundation, Inc.
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@ -91,6 +91,7 @@
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#include <machine/intr.h>
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#include <machine/intr.h>
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#include <machine/pio.h>
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#include <machine/pio.h>
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#include <machine/bootconfig.h>
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#include <machine/bootconfig.h>
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#include <machine/isa_machdep.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isavar.h>
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@ -501,28 +502,33 @@ isa_intr_init(void)
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static void *isa_ih;
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static void *isa_ih;
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isa_icu_init();
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isa_icu_init();
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isa_ih = intr_claim(IRQ_IN_L2, IPL_BIO, "isabus",
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/* something break the build in an informative way */
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#ifndef ISA_FOOTBRIDGE_IRQ
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#warning Before using isa with footbridge you must define ISA_FOOTBRIDGE_IRQ
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#endif
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isa_ih = intr_claim(ISA_FOOTBRIDGE_IRQ, IPL_BIO, "isabus",
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isa_irqdispatch, NULL);
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isa_irqdispatch, NULL);
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}
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}
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/* Static array of ISA DMA segments. We only have one on CATS */
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/* Static array of ISA DMA segments. We only have one on CATS */
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#if NISADMA > 0
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#if NISADMA > 0
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struct arm32_dma_range cats_isa_dma_ranges[1];
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struct arm32_dma_range machdep_isa_dma_ranges[1];
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#endif
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#endif
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void
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void
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isa_cats_init(iobase, membase)
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isa_footbridge_init(iobase, membase)
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u_int iobase, membase;
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u_int iobase, membase;
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{
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{
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#if NISADMA > 0
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#if NISADMA > 0
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extern struct arm32_dma_range *footbridge_isa_dma_ranges;
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extern struct arm32_dma_range *footbridge_isa_dma_ranges;
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extern int footbridge_isa_dma_nranges;
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extern int footbridge_isa_dma_nranges;
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cats_isa_dma_ranges[0].dr_sysbase = bootconfig.dram[0].address;
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machdep_isa_dma_ranges[0].dr_sysbase = bootconfig.dram[0].address;
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cats_isa_dma_ranges[0].dr_busbase = bootconfig.dram[0].address;
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machdep_isa_dma_ranges[0].dr_busbase = bootconfig.dram[0].address;
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cats_isa_dma_ranges[0].dr_len = (16 * 1024 * 1024);
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machdep_isa_dma_ranges[0].dr_len = (16 * 1024 * 1024);
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footbridge_isa_dma_ranges = cats_isa_dma_ranges;
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footbridge_isa_dma_ranges = machdep_isa_dma_ranges;
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footbridge_isa_dma_nranges = 1;
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footbridge_isa_dma_nranges = 1;
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#endif
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: cats_machdep.c,v 1.35 2002/09/27 15:35:55 provos Exp $ */
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/* $NetBSD: cats_machdep.c,v 1.36 2002/10/12 11:53:39 chris Exp $ */
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/*
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/*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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* Copyright (c) 1997,1998 Mark Brinicombe.
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@ -906,7 +906,7 @@ consinit(void)
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#if NISA > 0
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#if NISA > 0
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/* Initialise the ISA subsystem early ... */
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/* Initialise the ISA subsystem early ... */
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isa_cats_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
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isa_footbridge_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
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#endif
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#endif
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footbridge_pci_bs_tag_init();
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footbridge_pci_bs_tag_init();
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@ -1,4 +1,4 @@
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# $NetBSD: files.cats,v 1.21 2002/09/06 13:18:43 gehenna Exp $
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# $NetBSD: files.cats,v 1.22 2002/10/12 11:53:40 chris Exp $
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#
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#
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# CATS-specific configuration info
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# CATS-specific configuration info
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#
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#
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@ -72,7 +72,7 @@ file arch/arm/footbridge/isa/isa_io.c isa
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file arch/arm/footbridge/isa/isa_io_asm.S isa
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file arch/arm/footbridge/isa/isa_io_asm.S isa
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# CATS boards have an EBSA285 based core with an ISA bus
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# CATS boards have an EBSA285 based core with an ISA bus
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file arch/cats/isa/isa_machdep.c isa
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file arch/arm/footbridge/isa/isa_machdep.c isa
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device sysbeep
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device sysbeep
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attach sysbeep at pcppi with sysbeep_isa
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attach sysbeep at pcppi with sysbeep_isa
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@ -1,8 +1,12 @@
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/* $NetBSD: isa_machdep.h,v 1.4 2002/01/07 22:58:08 chris Exp $ */
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/* $NetBSD: isa_machdep.h,v 1.5 2002/10/12 11:53:40 chris Exp $ */
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#ifndef _CATS_ISA_MACHDEP_H_
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#ifndef _CATS_ISA_MACHDEP_H_
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#define _CATS_ISA_MACHDEP_H_
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#define _CATS_ISA_MACHDEP_H_
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void isa_cats_init __P((u_int, u_int));
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#include <arm/isa_machdep.h>
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#include <arm/isa_machdep.h>
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#endif
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#ifdef _KERNEL
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#define ISA_FOOTBRIDGE_IRQ IRQ_IN_L2
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void isa_footbridge_init(u_int, u_int);
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#endif /* _KERNEL */
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#endif /* _CATS_ISA_MACHDEP_H_ */
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@ -1,4 +1,4 @@
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# $NetBSD: files.netwinder,v 1.25 2002/09/06 13:18:43 gehenna Exp $
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# $NetBSD: files.netwinder,v 1.26 2002/10/12 11:53:41 chris Exp $
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#
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#
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# First try for arm-specific configuration info
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# First try for arm-specific configuration info
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#
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#
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file arch/arm/arm32/conf.c
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file arch/arm/arm32/conf.c
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# ISA support.
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# ISA support.
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file arch/netwinder/isa/isa_machdep.c isa
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file arch/arm/footbridge/isa/isa_machdep.c isa
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file arch/arm/footbridge/isa/isa_io.c isa
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file arch/arm/footbridge/isa/isa_io.c isa
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file arch/arm/footbridge/isa/isa_io_asm.S isa
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file arch/arm/footbridge/isa/isa_io_asm.S isa
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@ -1,4 +1,4 @@
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/* $NetBSD: isa_machdep.h,v 1.4 2002/10/09 00:33:39 thorpej Exp $ */
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/* $NetBSD: isa_machdep.h,v 1.5 2002/10/12 11:53:42 chris Exp $ */
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#ifndef _NETWINDER_ISA_MACHDEP_H_
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#ifndef _NETWINDER_ISA_MACHDEP_H_
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#define _NETWINDER_ISA_MACHDEP_H_
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#define _NETWINDER_ISA_MACHDEP_H_
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@ -6,7 +6,8 @@
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#include <arm/isa_machdep.h>
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#include <arm/isa_machdep.h>
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#ifdef _KERNEL
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#ifdef _KERNEL
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void isa_netwinder_init(u_int, u_int);
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#define ISA_FOOTBRIDGE_IRQ IRQ_IN_L3
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void isa_footbridge_init(u_int, u_int);
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#endif /* _KERNEL */
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#endif /* _KERNEL */
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#endif /* _NETWINDER_ISA_MACHDEP_H_ */
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#endif /* _NETWINDER_ISA_MACHDEP_H_ */
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@ -1,597 +0,0 @@
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/* $NetBSD: isa_machdep.c,v 1.6 2002/10/09 00:33:39 thorpej Exp $ */
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/*-
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* Copyright (c) 1996-1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Mark Brinicombe, Charles M. Hannum and by Jason R. Thorpe of the
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* Numerical Aerospace Simulation Facility, NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
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||||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
|
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
|
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1991 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* William Jolitz.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
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* are met:
|
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
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||||||
* notice, this list of conditions and the following disclaimer in the
|
|
||||||
* documentation and/or other materials provided with the distribution.
|
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* 3. All advertising materials mentioning features or use of this software
|
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* must display the following acknowledgement:
|
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* This product includes software developed by the University of
|
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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||||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)isa.c 7.2 (Berkeley) 5/13/91
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*/
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#include "opt_irqstats.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#define _ARM32_BUS_DMA_PRIVATE
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <machine/pio.h>
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#include <machine/bootconfig.h>
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#include <dev/isa/isareg.h>
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#include <dev/isa/isavar.h>
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#include <dev/isa/isadmareg.h>
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#include <dev/isa/isadmavar.h>
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#include <arm/footbridge/isa/icu.h>
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#include <arm/footbridge/dc21285reg.h>
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#include <arm/footbridge/dc21285mem.h>
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#include <uvm/uvm_extern.h>
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#include "isadma.h"
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struct arm32_isa_chipset isa_chipset_tag;
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void isa_strayintr __P((int));
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void intr_calculatemasks __P((void));
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int fakeintr __P((void *));
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int isa_irqdispatch __P((void *arg));
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u_int imask[IPL_LEVELS];
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unsigned imen;
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#ifdef IRQSTATS
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u_int isa_intr_count[ICU_LEN];
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#endif /* IRQSTATS */
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#define AUTO_EOI_1
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#define AUTO_EOI_2
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/*
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* Fill in default interrupt table (in case of spuruious interrupt
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* during configuration of kernel, setup interrupt control unit
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*/
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static void
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isa_icu_init(void)
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{
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/* initialize 8259's */
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outb(IO_ICU1, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU1+1, ICU_OFFSET); /* starting at this vector index */
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outb(IO_ICU1+1, 1 << IRQ_SLAVE); /* slave on line 2 */
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#ifdef AUTO_EOI_1
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outb(IO_ICU1+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU1+1, 1); /* 8086 mode */
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#endif
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outb(IO_ICU1+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU1, 0x68); /* special mask mode (if available) */
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outb(IO_ICU1, 0x0a); /* Read IRR by default. */
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#ifdef REORDER_IRQ
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outb(IO_ICU1, 0xc0 | (3 - 1)); /* pri order 3-7, 0-2 (com2 first) */
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#endif
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outb(IO_ICU2, 0x11); /* reset; program device, four bytes */
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outb(IO_ICU2+1, ICU_OFFSET+8); /* staring at this vector index */
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outb(IO_ICU2+1, IRQ_SLAVE);
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#ifdef AUTO_EOI_2
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outb(IO_ICU2+1, 2 | 1); /* auto EOI, 8086 mode */
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#else
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outb(IO_ICU2+1, 1); /* 8086 mode */
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#endif
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outb(IO_ICU2+1, 0xff); /* leave interrupts masked */
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outb(IO_ICU2, 0x68); /* special mask mode (if available) */
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outb(IO_ICU2, 0x0a); /* Read IRR by default. */
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}
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/*
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* Caught a stray interrupt, notify
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*/
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void
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isa_strayintr(irq)
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int irq;
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{
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static u_long strays;
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/*
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* Stray interrupts on irq 7 occur when an interrupt line is raised
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* and then lowered before the CPU acknowledges it. This generally
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* means either the device is screwed or something is cli'ing too
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* long and it's timing out.
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*/
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if (++strays <= 5)
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log(LOG_ERR, "stray interrupt %d%s\n", irq,
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strays >= 5 ? "; stopped logging" : "");
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}
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int intrtype[ICU_LEN], intrmask[ICU_LEN], intrlevel[ICU_LEN];
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struct irqhandler *intrhand[ICU_LEN];
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/*
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* Recalculate the interrupt masks from scratch.
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* We could code special registry and deregistry versions of this function that
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* would be faster, but the code would be nastier, and we don't expect this to
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* happen very much anyway.
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*/
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void
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intr_calculatemasks()
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|
||||||
{
|
|
||||||
int irq, level;
|
|
||||||
struct irqhandler *q;
|
|
||||||
|
|
||||||
/* First, figure out which levels each IRQ uses. */
|
|
||||||
for (irq = 0; irq < ICU_LEN; irq++) {
|
|
||||||
int levels = 0;
|
|
||||||
for (q = intrhand[irq]; q; q = q->ih_next)
|
|
||||||
levels |= 1 << q->ih_level;
|
|
||||||
intrlevel[irq] = levels;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Then figure out which IRQs use each level. */
|
|
||||||
for (level = 0; level < IPL_LEVELS; level++) {
|
|
||||||
int irqs = 0;
|
|
||||||
for (irq = 0; irq < ICU_LEN; irq++)
|
|
||||||
if (intrlevel[irq] & (1 << level))
|
|
||||||
irqs |= 1 << irq;
|
|
||||||
imask[level] = irqs;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* IPL_NONE is used for hardware interrupts that are never blocked,
|
|
||||||
* and do not block anything else.
|
|
||||||
*/
|
|
||||||
imask[IPL_NONE] = 0;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Enforce a hierarchy that gives slow devices a better chance at not
|
|
||||||
* dropping data.
|
|
||||||
*/
|
|
||||||
imask[IPL_BIO] |= imask[IPL_NONE];
|
|
||||||
imask[IPL_NET] |= imask[IPL_BIO];
|
|
||||||
imask[IPL_TTY] |= imask[IPL_NET];
|
|
||||||
/*
|
|
||||||
* There are tty, network and disk drivers that use free() at interrupt
|
|
||||||
* time, so imp > (tty | net | bio).
|
|
||||||
*/
|
|
||||||
imask[IPL_IMP] |= imask[IPL_TTY];
|
|
||||||
imask[IPL_AUDIO] |= imask[IPL_IMP];
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Since run queues may be manipulated by both the statclock and tty,
|
|
||||||
* network, and disk drivers, clock > imp.
|
|
||||||
*/
|
|
||||||
imask[IPL_CLOCK] |= imask[IPL_AUDIO];
|
|
||||||
imask[IPL_CLOCK] |= imask[IPL_IMP];
|
|
||||||
|
|
||||||
/*
|
|
||||||
* IPL_HIGH must block everything that can manipulate a run queue.
|
|
||||||
*/
|
|
||||||
imask[IPL_HIGH] |= imask[IPL_CLOCK];
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We need serial drivers to run at the absolute highest priority to
|
|
||||||
* avoid overruns, so serial > high.
|
|
||||||
*/
|
|
||||||
imask[IPL_SERIAL] |= imask[IPL_HIGH];
|
|
||||||
|
|
||||||
/* And eventually calculate the complete masks. */
|
|
||||||
for (irq = 0; irq < ICU_LEN; irq++) {
|
|
||||||
int irqs = 1 << irq;
|
|
||||||
for (q = intrhand[irq]; q; q = q->ih_next)
|
|
||||||
irqs |= imask[q->ih_level];
|
|
||||||
intrmask[irq] = irqs;
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Lastly, determine which IRQs are actually in use. */
|
|
||||||
{
|
|
||||||
int irqs = 0;
|
|
||||||
for (irq = 0; irq < ICU_LEN; irq++)
|
|
||||||
if (intrhand[irq])
|
|
||||||
irqs |= 1 << irq;
|
|
||||||
if (irqs >= 0x100) /* any IRQs >= 8 in use */
|
|
||||||
irqs |= 1 << IRQ_SLAVE;
|
|
||||||
imen = ~irqs;
|
|
||||||
SET_ICUS();
|
|
||||||
}
|
|
||||||
#if 0
|
|
||||||
printf("type\tmask\tlevel\thand\n");
|
|
||||||
for (irq = 0; irq < ICU_LEN; irq++) {
|
|
||||||
printf("%x\t%04x\t%x\t%p\n", intrtype[irq], intrmask[irq],
|
|
||||||
intrlevel[irq], intrhand[irq]);
|
|
||||||
}
|
|
||||||
for (level = 0; level < IPL_LEVELS; ++level)
|
|
||||||
printf("%d: %08x\n", level, imask[level]);
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
int
|
|
||||||
fakeintr(arg)
|
|
||||||
void *arg;
|
|
||||||
{
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != 2)
|
|
||||||
|
|
||||||
int
|
|
||||||
isa_intr_alloc(ic, mask, type, irq)
|
|
||||||
isa_chipset_tag_t ic;
|
|
||||||
int mask;
|
|
||||||
int type;
|
|
||||||
int *irq;
|
|
||||||
{
|
|
||||||
int i, tmp, bestirq, count;
|
|
||||||
struct irqhandler **p, *q;
|
|
||||||
|
|
||||||
if (type == IST_NONE)
|
|
||||||
panic("intr_alloc: bogus type");
|
|
||||||
|
|
||||||
bestirq = -1;
|
|
||||||
count = -1;
|
|
||||||
|
|
||||||
/* some interrupts should never be dynamically allocated */
|
|
||||||
mask &= 0xdef8;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* XXX some interrupts will be used later (6 for fdc, 12 for pms).
|
|
||||||
* the right answer is to do "breadth-first" searching of devices.
|
|
||||||
*/
|
|
||||||
mask &= 0xefbf;
|
|
||||||
|
|
||||||
for (i = 0; i < ICU_LEN; i++) {
|
|
||||||
if (LEGAL_IRQ(i) == 0 || (mask & (1<<i)) == 0)
|
|
||||||
continue;
|
|
||||||
|
|
||||||
switch(intrtype[i]) {
|
|
||||||
case IST_NONE:
|
|
||||||
/*
|
|
||||||
* if nothing's using the irq, just return it
|
|
||||||
*/
|
|
||||||
*irq = i;
|
|
||||||
return (0);
|
|
||||||
|
|
||||||
case IST_EDGE:
|
|
||||||
case IST_LEVEL:
|
|
||||||
if (type != intrtype[i])
|
|
||||||
continue;
|
|
||||||
/*
|
|
||||||
* if the irq is shareable, count the number of other
|
|
||||||
* handlers, and if it's smaller than the last irq like
|
|
||||||
* this, remember it
|
|
||||||
*
|
|
||||||
* XXX We should probably also consider the
|
|
||||||
* interrupt level and stick IPL_TTY with other
|
|
||||||
* IPL_TTY, etc.
|
|
||||||
*/
|
|
||||||
for (p = &intrhand[i], tmp = 0; (q = *p) != NULL;
|
|
||||||
p = &q->ih_next, tmp++)
|
|
||||||
;
|
|
||||||
if ((bestirq == -1) || (count > tmp)) {
|
|
||||||
bestirq = i;
|
|
||||||
count = tmp;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case IST_PULSE:
|
|
||||||
/* this just isn't shareable */
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (bestirq == -1)
|
|
||||||
return (1);
|
|
||||||
|
|
||||||
*irq = bestirq;
|
|
||||||
|
|
||||||
return (0);
|
|
||||||
}
|
|
||||||
|
|
||||||
const struct evcnt *
|
|
||||||
isa_intr_evcnt(isa_chipset_tag_t ic, int irq)
|
|
||||||
{
|
|
||||||
|
|
||||||
/* XXX for now, no evcnt parent reported */
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Set up an interrupt handler to start being called.
|
|
||||||
* XXX PRONE TO RACE CONDITIONS, UGLY, 'INTERESTING' INSERTION ALGORITHM.
|
|
||||||
*/
|
|
||||||
void *
|
|
||||||
isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
|
|
||||||
isa_chipset_tag_t ic;
|
|
||||||
int irq;
|
|
||||||
int type;
|
|
||||||
int level;
|
|
||||||
int (*ih_fun) __P((void *));
|
|
||||||
void *ih_arg;
|
|
||||||
{
|
|
||||||
struct irqhandler **p, *q, *ih;
|
|
||||||
static struct irqhandler fakehand = {fakeintr};
|
|
||||||
|
|
||||||
/* printf("isa_intr_establish(%d, %d, %d)\n", irq, type, level);*/
|
|
||||||
|
|
||||||
/* no point in sleeping unless someone can free memory. */
|
|
||||||
ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK);
|
|
||||||
if (ih == NULL)
|
|
||||||
panic("isa_intr_establish: can't malloc handler info");
|
|
||||||
|
|
||||||
if (!LEGAL_IRQ(irq) || type == IST_NONE)
|
|
||||||
panic("intr_establish: bogus irq or type");
|
|
||||||
|
|
||||||
switch (intrtype[irq]) {
|
|
||||||
case IST_NONE:
|
|
||||||
intrtype[irq] = type;
|
|
||||||
/* printf("Setting irq %d to type %d - ", irq, type);*/
|
|
||||||
if (irq < 8) {
|
|
||||||
outb(0x4d0, (inb(0x4d0) & ~(1 << irq))
|
|
||||||
| ((type == IST_LEVEL) ? (1 << irq) : 0));
|
|
||||||
/* printf("%02x\n", inb(0x4d0));*/
|
|
||||||
} else {
|
|
||||||
outb(0x4d1, (inb(0x4d1) & ~(1 << irq))
|
|
||||||
| ((type == IST_LEVEL) ? (1 << irq) : 0));
|
|
||||||
/* printf("%02x\n", inb(0x4d1));*/
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case IST_EDGE:
|
|
||||||
case IST_LEVEL:
|
|
||||||
if (type == intrtype[irq])
|
|
||||||
break;
|
|
||||||
case IST_PULSE:
|
|
||||||
if (type != IST_NONE)
|
|
||||||
panic("intr_establish: can't share %s with %s",
|
|
||||||
isa_intr_typename(intrtype[irq]),
|
|
||||||
isa_intr_typename(type));
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Figure out where to put the handler.
|
|
||||||
* This is O(N^2), but we want to preserve the order, and N is
|
|
||||||
* generally small.
|
|
||||||
*/
|
|
||||||
for (p = &intrhand[irq]; (q = *p) != NULL; p = &q->ih_next)
|
|
||||||
;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Actually install a fake handler momentarily, since we might be doing
|
|
||||||
* this with interrupts enabled and don't want the real routine called
|
|
||||||
* until masking is set up.
|
|
||||||
*/
|
|
||||||
fakehand.ih_level = level;
|
|
||||||
*p = &fakehand;
|
|
||||||
|
|
||||||
intr_calculatemasks();
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Poke the real handler in now.
|
|
||||||
*/
|
|
||||||
ih->ih_func = ih_fun;
|
|
||||||
ih->ih_arg = ih_arg;
|
|
||||||
/* ih->ih_count = 0;*/
|
|
||||||
ih->ih_next = NULL;
|
|
||||||
ih->ih_level = level;
|
|
||||||
ih->ih_num = irq;
|
|
||||||
*p = ih;
|
|
||||||
|
|
||||||
return (ih);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Deregister an interrupt handler.
|
|
||||||
*/
|
|
||||||
void
|
|
||||||
isa_intr_disestablish(ic, arg)
|
|
||||||
isa_chipset_tag_t ic;
|
|
||||||
void *arg;
|
|
||||||
{
|
|
||||||
struct irqhandler *ih = arg;
|
|
||||||
int irq = ih->ih_num;
|
|
||||||
struct irqhandler **p, *q;
|
|
||||||
|
|
||||||
if (!LEGAL_IRQ(irq))
|
|
||||||
panic("intr_disestablish: bogus irq");
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Remove the handler from the chain.
|
|
||||||
* This is O(n^2), too.
|
|
||||||
*/
|
|
||||||
for (p = &intrhand[irq]; (q = *p) != NULL && q != ih; p = &q->ih_next)
|
|
||||||
;
|
|
||||||
if (q)
|
|
||||||
*p = q->ih_next;
|
|
||||||
else
|
|
||||||
panic("intr_disestablish: handler not registered");
|
|
||||||
free(ih, M_DEVBUF);
|
|
||||||
|
|
||||||
intr_calculatemasks();
|
|
||||||
|
|
||||||
if (intrhand[irq] == NULL)
|
|
||||||
intrtype[irq] = IST_NONE;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* isa_intr_init()
|
|
||||||
*
|
|
||||||
* Initialise the ISA ICU and attach an ISA interrupt handler to the
|
|
||||||
* ISA interrupt line on the footbridge.
|
|
||||||
*/
|
|
||||||
void
|
|
||||||
isa_intr_init(void)
|
|
||||||
{
|
|
||||||
static void *isa_ih;
|
|
||||||
|
|
||||||
isa_icu_init();
|
|
||||||
isa_ih = intr_claim(IRQ_IN_L3, IPL_BIO, "isabus",
|
|
||||||
isa_irqdispatch, NULL);
|
|
||||||
}
|
|
||||||
|
|
||||||
/* Static array of ISA DMA segments. We only have one on CATS */
|
|
||||||
#if NISADMA > 0
|
|
||||||
struct arm32_dma_range netwinder_isa_dma_ranges[1];
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void
|
|
||||||
isa_netwinder_init(iobase, membase)
|
|
||||||
u_int iobase, membase;
|
|
||||||
{
|
|
||||||
#if NISADMA > 0
|
|
||||||
extern struct arm32_dma_range *footbridge_isa_dma_ranges;
|
|
||||||
extern int footbridge_isa_dma_nranges;
|
|
||||||
|
|
||||||
netwinder_isa_dma_ranges[0].dr_sysbase = bootconfig.dram[0].address;
|
|
||||||
netwinder_isa_dma_ranges[0].dr_busbase = bootconfig.dram[0].address;
|
|
||||||
netwinder_isa_dma_ranges[0].dr_len = (16 * 1024 * 1024);
|
|
||||||
|
|
||||||
footbridge_isa_dma_ranges = netwinder_isa_dma_ranges;
|
|
||||||
footbridge_isa_dma_nranges = 1;
|
|
||||||
#endif
|
|
||||||
|
|
||||||
isa_io_init(iobase, membase);
|
|
||||||
}
|
|
||||||
|
|
||||||
void
|
|
||||||
isa_attach_hook(parent, self, iba)
|
|
||||||
struct device *parent, *self;
|
|
||||||
struct isabus_attach_args *iba;
|
|
||||||
{
|
|
||||||
/*
|
|
||||||
* Since we can only have one ISA bus, we just use a single
|
|
||||||
* statically allocated ISA chipset structure. Pass it up
|
|
||||||
* now.
|
|
||||||
*/
|
|
||||||
iba->iba_ic = &isa_chipset_tag;
|
|
||||||
#if NISADMA > 0
|
|
||||||
isa_dma_init();
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
int
|
|
||||||
isa_irqdispatch(arg)
|
|
||||||
void *arg;
|
|
||||||
{
|
|
||||||
int irq;
|
|
||||||
struct irqhandler *p;
|
|
||||||
u_int iack;
|
|
||||||
int res;
|
|
||||||
|
|
||||||
iack = *((u_int *)(DC21285_PCI_IACK_VBASE));
|
|
||||||
iack &= 0xff;
|
|
||||||
if (iack < 0x20 || iack > 0x2f) {
|
|
||||||
printf("isa_irqdispatch: %x\n", iack);
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
irq = iack & 0x0f;
|
|
||||||
#ifdef IRQSTATS
|
|
||||||
++isa_intr_count[irq];
|
|
||||||
#endif /* IRQSTATS */
|
|
||||||
p = intrhand[irq];
|
|
||||||
while (p) {
|
|
||||||
#ifdef IRQSTATS
|
|
||||||
/* ++p->ih_count;*/
|
|
||||||
#endif /* IRQSTATS */
|
|
||||||
res = p->ih_func(p->ih_arg);
|
|
||||||
p = p->ih_next;
|
|
||||||
}
|
|
||||||
return(0);
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
void
|
|
||||||
isa_fillw(val, addr, len)
|
|
||||||
u_int val;
|
|
||||||
void *addr;
|
|
||||||
size_t len;
|
|
||||||
{
|
|
||||||
if ((u_int)addr >= isa_mem_data_vaddr()
|
|
||||||
&& (u_int)addr < isa_mem_data_vaddr() + 0x100000) {
|
|
||||||
bus_size_t offset = ((u_int)addr) & 0xfffff;
|
|
||||||
bus_space_set_region_2(&isa_mem_bs_tag,
|
|
||||||
(bus_space_handle_t)isa_mem_bs_tag.bs_cookie, offset,
|
|
||||||
val, len);
|
|
||||||
} else {
|
|
||||||
u_short *ptr = addr;
|
|
||||||
|
|
||||||
while (len > 0) {
|
|
||||||
*ptr++ = val;
|
|
||||||
--len;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
|
@ -1,4 +1,4 @@
|
||||||
/* $NetBSD: netwinder_machdep.c,v 1.39 2002/10/09 00:33:39 thorpej Exp $ */
|
/* $NetBSD: netwinder_machdep.c,v 1.40 2002/10/12 11:53:43 chris Exp $ */
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 1997,1998 Mark Brinicombe.
|
* Copyright (c) 1997,1998 Mark Brinicombe.
|
||||||
|
@ -883,7 +883,7 @@ consinit(void)
|
||||||
|
|
||||||
#if NISA > 0
|
#if NISA > 0
|
||||||
/* Initialise the ISA subsystem early ... */
|
/* Initialise the ISA subsystem early ... */
|
||||||
isa_netwinder_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
|
isa_footbridge_init(DC21285_PCI_IO_VBASE, DC21285_PCI_ISA_MEM_VBASE);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
footbridge_pci_bs_tag_init();
|
footbridge_pci_bs_tag_init();
|
||||||
|
|
Loading…
Reference in New Issue