fixed naming bug :( ... I should be more carefull

This commit is contained in:
reinoud 2001-02-18 12:42:31 +00:00
parent 7665787d5e
commit 5fa30a864f
2 changed files with 14 additions and 15 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: cpufunc.c,v 1.11 2001/02/18 12:21:02 reinoud Exp $ */
/* $NetBSD: cpufunc.c,v 1.12 2001/02/18 12:42:31 reinoud Exp $ */
/*
* arm8 support code Copyright (c) 1997 ARM Limited
@ -339,8 +339,7 @@ struct cpu_functions sa110_cpufuncs = {
struct cpu_functions cpufuncs;
u_int cputype;
u_int cpu_reset_needs_wb_drain; /* flag used in locore.s */
u_int cpu_reset_needs_v4_MMU_disable; /* flag used in locore.s */
/*
* Cannot panic here as we may not have a console yet ...
@ -356,26 +355,26 @@ set_cpufuncs()
#ifdef CPU_ARM6
case ID_ARM610:
cpufuncs = arm6_cpufuncs;
cpu_reset_needs_wb_drain = 0;
cpu_reset_needs_v4_MMU_disable = 0;
break;
#endif /* CPU_ARM6 */
#ifdef CPU_ARM7
case ID_ARM700:
case ID_ARM710:
cpufuncs = arm7_cpufuncs;
cpu_reset_needs_wb_drain = 0;
cpu_reset_needs_v4_MMU_disable = 0;
break;
#endif /* CPU_ARM7 */
#ifdef CPU_ARM8
case ID_ARM810:
cpufuncs = arm8_cpufuncs;
cpu_reset_needs_wb_drain = 0; /* XXX correct? */
cpu_reset_needs_v4_MMU_disable = 0; /* XXX correct? */
break;
#endif /* CPU_ARM8 */
#ifdef CPU_SA110
case ID_SA110:
cpufuncs = sa110_cpufuncs;
cpu_reset_needs_wb_drain = 1; /* SA needs it */
cpu_reset_needs_v4_MMU_disable = 1; /* SA needs it */
break;
#endif /* CPU_SA110 */
default:

View File

@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.36 2001/02/18 12:21:02 reinoud Exp $ */
/* $NetBSD: locore.S,v 1.37 2001/02/18 12:42:31 reinoud Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@ -188,10 +188,10 @@ ENTRY_NP(cpu_reset)
Lboot_cache_purged:
/*
* load the needs_wb_drain flag to determine if its nessisary
* load the cpu_reset_needs_v4_MMU_disable flag to determine if its nessisary
*/
ldr r1, Lcpu_reset_needs_wb_drain
ldr r1, Lcpu_reset_needs_v4_MMU_disable
ldr r1, [r1]
cmp r1, #0
@ -201,7 +201,7 @@ Lboot_cache_purged:
*/
mov r0, #(CPU_CONTROL_32BP_ENABLE | CPU_CONTROL_32BD_ENABLE)
mcr 15, 0, r0, c1, c0, 0
mcrne 15, 0, r0, c8, c7, 0 /* only when wb drain is asked for */
mcrne 15, 0, r0, c8, c7, 0 /* only when v4 MMU disable is asked for */
mov pc, r4
/*
@ -213,13 +213,13 @@ Lcpu_reset_address:
.word _C_LABEL(cpu_reset_address)
/*
* cpu_reset_needs_wb_drain contains a flag that signals if the wb
* drain instruction needs executing... it is an illegal instruction
* cpu_reset_needs_v4_MMU_disable contains a flag that signals if the
* v4 MMU disable instruction needs executing... it is an illegal instruction
* on f.e. ARM6/7 that locks up the computer in an endless illegal
* instruction / data-abort / reset loop.
*/
Lcpu_reset_needs_wb_drain:
.word _C_LABEL(cpu_reset_needs_wb_drain)
Lcpu_reset_needs_v4_MMU_disable:
.word _C_LABEL(cpu_reset_needs_v4_MMU_disable)
#endif /* OFW */