parent
cf241ff9b0
commit
5f6b90ba37
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: igphyreg.h,v 1.8 2015/10/26 02:31:31 msaitoh Exp $ */
|
||||
/* $NetBSD: igphyreg.h,v 1.9 2016/10/28 05:50:18 msaitoh Exp $ */
|
||||
|
||||
/*******************************************************************************
|
||||
|
||||
|
@ -165,9 +165,8 @@
|
|||
* IGP3 regs
|
||||
*/
|
||||
#define IGP3_PAGE_SHIFT 5
|
||||
#define IGP3_MAX_REG_ADDRESS 0x1f /* 5 bit address bus (0-0x1f) */
|
||||
#define IGP3_REG(page, reg) \
|
||||
(((page) << IGP3_PAGE_SHIFT) | ((reg) & IGP3_MAX_REG_ADDRESS))
|
||||
(((page) << IGP3_PAGE_SHIFT) | ((reg) & MII_MAXREGADDR))
|
||||
|
||||
#define IGP3_VR_CTRL IGP3_REG(776, 18)
|
||||
#define IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK 0x0300
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ikphyreg.h,v 1.2 2010/11/29 23:04:42 jym Exp $ */
|
||||
/* $NetBSD: ikphyreg.h,v 1.3 2016/10/28 05:50:18 msaitoh Exp $ */
|
||||
/*******************************************************************************
|
||||
Copyright (c) 2001-2005, Intel Corporation
|
||||
All rights reserved.
|
||||
|
@ -41,10 +41,9 @@ POSSIBILITY OF SUCH DAMAGE.
|
|||
*/
|
||||
#define GG82563_PAGE_SHIFT 5
|
||||
#define GG82563_REG(page, reg) \
|
||||
(((page) << GG82563_PAGE_SHIFT) | ((reg) & GG82563_MAX_REG_ADDRESS))
|
||||
(((page) << GG82563_PAGE_SHIFT) | ((reg) & MII_ADDRMASK))
|
||||
#define GG82563_MIN_ALT_REG 30
|
||||
|
||||
#define GG82563_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
|
||||
#define GG82563_MAX_MULTI_PAGE_REG 0xF /* Registers equal on all pages */
|
||||
|
||||
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: inbmphyreg.h,v 1.6 2016/10/19 08:22:57 msaitoh Exp $ */
|
||||
/* $NetBSD: inbmphyreg.h,v 1.7 2016/10/28 05:50:18 msaitoh Exp $ */
|
||||
/*******************************************************************************
|
||||
Copyright (c) 2001-2005, Intel Corporation
|
||||
All rights reserved.
|
||||
|
@ -44,16 +44,15 @@ POSSIBILITY OF SUCH DAMAGE.
|
|||
*/
|
||||
#define BME1000_PAGE_SHIFT 5
|
||||
#define BME1000_REG(page, reg) \
|
||||
(((page) << BME1000_PAGE_SHIFT) | ((reg) & BME1000_MAX_REG_ADDRESS))
|
||||
(((page) << BME1000_PAGE_SHIFT) | ((reg) & MII_ADDRMASK))
|
||||
|
||||
#define BME1000_MAX_REG_ADDRESS 0x1f /* 5 bit address bus (0-0x1f) */
|
||||
#define BME1000_MAX_MULTI_PAGE_REG 0xf /* Registers equal on all pages */
|
||||
|
||||
#define BM_PHY_REG_PAGE(offset) \
|
||||
((uint16_t)(((offset) >> BME1000_PAGE_SHIFT) & 0xffff))
|
||||
#define BM_PHY_REG_NUM(offset) \
|
||||
((uint16_t)((offset) & BME1000_MAX_REG_ADDRESS) \
|
||||
| (((offset) >> (21 - BME1000_PAGE_SHIFT)) & ~BME1000_MAX_REG_ADDRESS))
|
||||
#define BM_PHY_REG_NUM(offset) \
|
||||
((uint16_t)((offset) & MII_ADDRMASK) \
|
||||
| (((offset) >> (21 - BME1000_PAGE_SHIFT)) & ~MII_ADDRMASK))
|
||||
|
||||
/* BME1000 Specific Registers */
|
||||
#define BME1000_PHY_SPEC_CTRL BME1000_REG(0, 16) /* PHY Specific Control */
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: if_wm.c,v 1.431 2016/10/28 05:29:11 knakahara Exp $ */
|
||||
/* $NetBSD: if_wm.c,v 1.432 2016/10/28 05:50:18 msaitoh Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
|
||||
|
@ -84,7 +84,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.431 2016/10/28 05:29:11 knakahara Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.432 2016/10/28 05:50:18 msaitoh Exp $");
|
||||
|
||||
#ifdef _KERNEL_OPT
|
||||
#include "opt_net_mpsafe.h"
|
||||
|
@ -8685,7 +8685,7 @@ wm_gmii_i80003_readreg(device_t self, int phy, int reg)
|
|||
return 0;
|
||||
}
|
||||
|
||||
if ((reg & GG82563_MAX_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
|
||||
if ((reg & MII_ADDRMASK) < GG82563_MIN_ALT_REG) {
|
||||
wm_gmii_mdic_writereg(self, phy, GG82563_PHY_PAGE_SELECT,
|
||||
reg >> GG82563_PAGE_SHIFT);
|
||||
} else {
|
||||
|
@ -8694,7 +8694,7 @@ wm_gmii_i80003_readreg(device_t self, int phy, int reg)
|
|||
}
|
||||
/* Wait more 200us for a bug of the ready bit in the MDIC register */
|
||||
delay(200);
|
||||
rv = wm_gmii_mdic_readreg(self, phy, reg & GG82563_MAX_REG_ADDRESS);
|
||||
rv = wm_gmii_mdic_readreg(self, phy, reg & MII_ADDRMASK);
|
||||
delay(200);
|
||||
sc->phy.release(sc);
|
||||
|
||||
|
@ -8722,7 +8722,7 @@ wm_gmii_i80003_writereg(device_t self, int phy, int reg, int val)
|
|||
return;
|
||||
}
|
||||
|
||||
if ((reg & GG82563_MAX_REG_ADDRESS) < GG82563_MIN_ALT_REG) {
|
||||
if ((reg & MII_ADDRMASK) < GG82563_MIN_ALT_REG) {
|
||||
wm_gmii_mdic_writereg(self, phy, GG82563_PHY_PAGE_SELECT,
|
||||
reg >> GG82563_PAGE_SHIFT);
|
||||
} else {
|
||||
|
@ -8731,7 +8731,7 @@ wm_gmii_i80003_writereg(device_t self, int phy, int reg, int val)
|
|||
}
|
||||
/* Wait more 200us for a bug of the ready bit in the MDIC register */
|
||||
delay(200);
|
||||
wm_gmii_mdic_writereg(self, phy, reg & GG82563_MAX_REG_ADDRESS, val);
|
||||
wm_gmii_mdic_writereg(self, phy, reg & MII_ADDRMASK, val);
|
||||
delay(200);
|
||||
|
||||
sc->phy.release(sc);
|
||||
|
@ -8766,7 +8766,7 @@ wm_gmii_bm_readreg(device_t self, int phy, int reg)
|
|||
reg >> GG82563_PAGE_SHIFT);
|
||||
}
|
||||
|
||||
rv = wm_gmii_mdic_readreg(self, phy, reg & GG82563_MAX_REG_ADDRESS);
|
||||
rv = wm_gmii_mdic_readreg(self, phy, reg & MII_ADDRMASK);
|
||||
sc->phy.release(sc);
|
||||
return rv;
|
||||
}
|
||||
|
@ -8799,7 +8799,7 @@ wm_gmii_bm_writereg(device_t self, int phy, int reg, int val)
|
|||
reg >> GG82563_PAGE_SHIFT);
|
||||
}
|
||||
|
||||
wm_gmii_mdic_writereg(self, phy, reg & GG82563_MAX_REG_ADDRESS, val);
|
||||
wm_gmii_mdic_writereg(self, phy, reg & MII_ADDRMASK, val);
|
||||
sc->phy.release(sc);
|
||||
}
|
||||
|
||||
|
@ -8906,7 +8906,7 @@ wm_gmii_hv_readreg_locked(device_t self, int phy, int reg)
|
|||
page << BME1000_PAGE_SHIFT);
|
||||
}
|
||||
|
||||
rv = wm_gmii_mdic_readreg(self, phy, regnum & IGPHY_MAXREGADDR);
|
||||
rv = wm_gmii_mdic_readreg(self, phy, regnum & MII_ADDRMASK);
|
||||
return rv;
|
||||
}
|
||||
|
||||
|
@ -8971,7 +8971,7 @@ wm_gmii_hv_writereg_locked(device_t self, int phy, int reg, int val)
|
|||
page << BME1000_PAGE_SHIFT);
|
||||
}
|
||||
|
||||
wm_gmii_mdic_writereg(self, phy, regnum & IGPHY_MAXREGADDR, val);
|
||||
wm_gmii_mdic_writereg(self, phy, regnum & MII_ADDRMASK, val);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -12277,7 +12277,6 @@ wm_hv_phy_workaround_ich8lan(struct wm_softc *sc)
|
|||
*/
|
||||
child = LIST_FIRST(&sc->sc_mii.mii_phys);
|
||||
if ((child != NULL) && (child->mii_mpd_rev < 2)) {
|
||||
printf("XXX 82578 rev < 2\n");
|
||||
PHY_RESET(child);
|
||||
sc->sc_mii.mii_writereg(sc->sc_dev, 2, MII_BMCR,
|
||||
0x3140);
|
||||
|
|
Loading…
Reference in New Issue