Add experimental support GENERIC.MP.
This commit is contained in:
kiyohara
parent
7f4276712d
commit
5e233c258e
@ -1,4 +1,4 @@
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/* $NetBSD: cpu.c,v 1.11 2011/07/01 20:34:52 dyoung Exp $ */
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/* $NetBSD: cpu.c,v 1.12 2012/10/20 14:53:37 kiyohara Exp $ */
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/*-
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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@ -30,21 +30,29 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.11 2011/07/01 20:34:52 dyoung Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.12 2012/10/20 14:53:37 kiyohara Exp $");
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#include "opt_multiprocessor.h"
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <sys/bus.h>
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#include <machine/cpu.h>
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#include <powerpc/oea/hid.h>
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#include <powerpc/oea/spr.h>
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#include <powerpc/spr.h>
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#include <uvm/uvm.h>
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int cpumatch(device_t, cfdata_t, void *);
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void cpuattach(device_t, device_t, void *);
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CFATTACH_DECL_NEW(cpu, 0,
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cpumatch, cpuattach, NULL, NULL);
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CFATTACH_DECL_NEW(cpu, 0, cpumatch, cpuattach, NULL, NULL);
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extern struct cfdriver cpu_cd;
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@ -52,16 +60,126 @@ int
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cpumatch(device_t parent, cfdata_t cfdata, void *aux)
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{
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struct confargs *ca = aux;
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if (strcmp(ca->ca_name, cpu_cd.cd_name) != 0)
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return (0);
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if (cpu_info[0].ci_dev != NULL)
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return (0);
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return (1);
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return 0;
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return 1;
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}
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void
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cpuattach(device_t parent, device_t self, void *aux)
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{
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(void) cpu_attach_common(self, 0);
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struct confargs *ca = aux;
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struct cpu_info *ci;
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int id = ca->ca_node;
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ci = cpu_attach_common(self, id);
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if (ci == NULL)
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return;
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#ifdef MULTIPROCESSOR
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if (id > 0)
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cpu_spinup(self, ci);
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#endif
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}
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#ifdef MULTIPROCESSOR
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extern volatile u_int cpu_spinstart_ack, cpu_spinstart_cpunum;
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int
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md_setup_trampoline(volatile struct cpu_hatch_data *h, struct cpu_info *ci)
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{
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int blocks, i;
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extern void cache_flush_invalidate_all(int blocks);
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/*
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* Our CPU(603e) supports control protocol for cache only MEI
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* (Modified/Exclusive/Invalid). Flush dirty caches myself.
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*/
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h->hatch_running = -1;
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cpu_spinstart_ack = -1;
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/* Flush-invalidate all blocks */
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blocks = curcpu()->ci_ci.dcache_size / curcpu()->ci_ci.dcache_line_size;
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cache_flush_invalidate_all(blocks);
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cpu_spinstart_cpunum = ci->ci_cpuid;
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__asm volatile("dcbf 0,%0"::"r"(&cpu_spinstart_cpunum):"memory");
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for (i = 0; i < 100000000; i++) {
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if (cpu_spinstart_ack != -1)
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break;
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__asm volatile("dcbi 0,%0"::"r"(&cpu_spinstart_ack):"memory");
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__asm volatile("sync; isync");
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}
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return 1;
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}
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void
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md_presync_timebase(volatile struct cpu_hatch_data *h)
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{
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uint64_t tb;
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/* Sync timebase. */
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tb = mftb();
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tb += 1000000; /* 30ms @ 33MHz */
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h->hatch_tbu = tb >> 32;
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h->hatch_tbl = tb & 0xffffffff;
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while (tb > mftb())
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;
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h->hatch_running = 0;
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delay(500000);
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}
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void
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md_start_timebase(volatile struct cpu_hatch_data *h)
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{
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/* Nothing */
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}
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void
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md_sync_timebase(volatile struct cpu_hatch_data *h)
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{
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u_int tbu, tbl;
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do {
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__asm volatile("dcbi 0,%0"::"r"(&h->hatch_running):"memory");
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__asm volatile("sync; isync");
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__asm volatile("dcbst 0,%0"::"r"(&h->hatch_running):"memory");
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__asm volatile("sync; isync");
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} while (h->hatch_running == -1);
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__asm volatile("dcbi 0,%0"::"r"(&h->hatch_tbu):"memory");
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__asm volatile("dcbi 0,%0"::"r"(&h->hatch_tbl):"memory");
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__asm volatile("sync; isync");
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__asm volatile("dcbst 0,%0"::"r"(&h->hatch_tbu):"memory");
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__asm volatile("dcbst 0,%0"::"r"(&h->hatch_tbl):"memory");
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__asm volatile("sync; isync");
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/* Sync timebase. */
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tbu = h->hatch_tbu;
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tbl = h->hatch_tbl;
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__asm volatile ("sync; isync");
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__asm volatile ("mttbl %0" :: "r"(0));
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__asm volatile ("mttbu %0" :: "r"(tbu));
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__asm volatile ("mttbl %0" :: "r"(tbl));
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}
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void
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md_setup_interrupts(void)
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{
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CLEAR_BEBOX_REG(CPU1_INT_MASK, BEBOX_INTR_MASK);
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/* XXXXXX: We can handle interrupts on CPU0 only now. */
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}
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#endif /* MULTIPROCESSOR */
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86
sys/arch/bebox/bebox/ipi_bebox.c
Normal file
86
sys/arch/bebox/bebox/ipi_bebox.c
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@ -0,0 +1,86 @@
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/* $NetBSD: ipi_bebox.c,v 1.1 2012/10/20 14:53:37 kiyohara Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Tim Rightnour
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ipi_bebox.c,v 1.1 2012/10/20 14:53:37 kiyohara Exp $");
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#include <sys/atomic.h>
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#include <sys/cpu.h>
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#include <powerpc/pic/picvar.h>
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#include <powerpc/pic/ipivar.h>
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static void bebox_send_ipi(cpuid_t, uint32_t);
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static void bebox_establish_ipi(int, int, void *);
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void
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setup_bebox_ipi(void)
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{
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ipiops.ppc_send_ipi = bebox_send_ipi;
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ipiops.ppc_establish_ipi = bebox_establish_ipi;
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ipiops.ppc_ipi_vector = IPI_VECTOR;
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}
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static void
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bebox_send_ipi(cpuid_t target, uint32_t mesg)
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{
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struct cpu_info * const ci = curcpu();
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int i;
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switch (target) {
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case IPI_DST_ALL:
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case IPI_DST_NOTME:
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for (i = 0; i < ncpu; i++) {
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struct cpu_info * const dst_ci = cpu_lookup(i);
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if (target == IPI_DST_ALL || dst_ci != ci) {
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atomic_or_32(&dst_ci->ci_pending_ipis, mesg);
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}
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}
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break;
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default:
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{
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struct cpu_info * const dst_ci = cpu_lookup(target);
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atomic_or_32(&dst_ci->ci_pending_ipis, mesg);
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break;
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}
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}
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}
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static void
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bebox_establish_ipi(int type, int level, void *ih_args)
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{
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/* XXXXX: nothing? */
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.S,v 1.27 2012/10/20 12:45:22 kiyohara Exp $ */
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/* $NetBSD: locore.S,v 1.28 2012/10/20 14:53:37 kiyohara Exp $ */
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/* $OpenBSD: locore.S,v 1.4 1997/01/26 09:06:38 rahnds Exp $ */
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/*
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@ -178,6 +178,23 @@ __start_cpu0:
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loop: b loop /* XXX not reached */
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.globl _C_LABEL(cache_flush_invalidate_all)
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_C_LABEL(cache_flush_invalidate_all):
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mtctr 3
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li 4,0x0
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loop1: lwz 5,0(4)
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addi 4,4,32
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bdnz loop1
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mtctr 3
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li 4,0x0
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loop2: dcbf 0,4
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addi 4,4,32
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bdnz loop2
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blr
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.globl _C_LABEL(debug_led)
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_C_LABEL(debug_led):
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lis 4, 0x8000
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@ -1,4 +1,4 @@
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/* $NetBSD: pic_bebox.c,v 1.9 2012/10/20 12:37:49 kiyohara Exp $ */
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/* $NetBSD: pic_bebox.c,v 1.10 2012/10/20 14:56:31 kiyohara Exp $ */
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/*-
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* Copyright (c) 2007 The NetBSD Foundation, Inc.
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@ -30,7 +30,9 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pic_bebox.c,v 1.9 2012/10/20 12:37:49 kiyohara Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pic_bebox.c,v 1.10 2012/10/20 14:56:31 kiyohara Exp $");
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#include "opt_multiprocessor.h"
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#include <sys/param.h>
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#include <sys/malloc.h>
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@ -68,6 +70,11 @@ setup_bebox_intr(void)
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pic->pic_establish_irq = dummy_pic_establish_intr;
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strcpy(pic->pic_name, "bebox");
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pic_add(pic);
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#ifdef MULTIPROCESSOR
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setup_bebox_ipi();
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#endif
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return(pic);
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}
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7
sys/arch/bebox/conf/GENERIC.MP
Normal file
7
sys/arch/bebox/conf/GENERIC.MP
Normal file
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# $NetBSD: GENERIC.MP,v 1.1 2012/10/20 14:53:37 kiyohara Exp $
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include "arch/bebox/conf/GENERIC"
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# SMP options
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options MULTIPROCESSOR
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options CACHE_PROTO_MEI # require PPC 603e
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@ -1,4 +1,4 @@
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# $NetBSD: files.bebox,v 1.56 2011/06/22 18:06:32 matt Exp $
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# $NetBSD: files.bebox,v 1.57 2012/10/20 14:53:37 kiyohara Exp $
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#
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# First try for bebox specific configuration info
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#
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@ -7,6 +7,7 @@ maxpartitions 8
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maxusers 2 8 64
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include "arch/powerpc/pic/files.pic"
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include "arch/powerpc/pic/files.ipi"
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file arch/bebox/bebox/autoconf.c
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file arch/bebox/bebox/machdep.c
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@ -16,6 +17,7 @@ file arch/powerpc/powerpc/bus_dma.c
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file arch/powerpc/powerpc/bus_space.c
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file arch/powerpc/powerpc/procfs_machdep.c procfs
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file arch/bebox/bebox/pic_bebox.c
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file arch/bebox/bebox/ipi_bebox.c multiprocessor
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# General files
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file dev/cons.c
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@ -1,4 +1,4 @@
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/* $NetBSD: cpu.h,v 1.13 2011/06/20 06:35:39 matt Exp $ */
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/* $NetBSD: cpu.h,v 1.14 2012/10/20 14:53:37 kiyohara Exp $ */
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/*
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* Copyright (C) 1995-1997 Wolfgang Solfrank.
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@ -38,6 +38,24 @@
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extern char bootpath[];
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#endif
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#ifdef MULTIPROCESSOR
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#define MD_TLBSYNC() bebox_tlbisync()
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#endif
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#include <machine/bebox.h>
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#include <powerpc/cpu.h>
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static __inline void
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bebox_tlbisync(void)
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{
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int cpuid = curcpu()->ci_index;
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/* Assert #TLBISYNC for other CPU */
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CLEAR_BEBOX_REG(CPU_CONTROL, TLBISYNC_FROM(cpuid));
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/* Deassert #TLBISYNC */
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SET_BEBOX_REG(CPU_CONTROL, TLBISYNC_FROM(cpuid));
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}
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#endif /* _BEBOX_CPU_H_ */
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@ -1,4 +1,4 @@
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/* $NetBSD: intr.h,v 1.32 2012/10/20 12:13:46 kiyohara Exp $ */
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/* $NetBSD: intr.h,v 1.33 2012/10/20 14:53:37 kiyohara Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -41,6 +41,8 @@
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#define IRQ_SLAVE 2
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#define LEGAL_HWIRQ_P(x) ((u_int)(x) < ICU_LEN && (x) != IRQ_SLAVE)
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void setup_bebox_ipi(void);
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#endif /* !_LOCORE */
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#endif /* !_BEBOX_INTR_H_ */
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