From 5e073f480721df3cee2e0f07199ce0a594ce0f97 Mon Sep 17 00:00:00 2001
From: is <is@NetBSD.org>
Date: Fri, 26 Feb 1999 19:03:39 +0000
Subject: [PATCH] MIPS part of fix for PR 6152, sligtly changed from M.Hitch's
 version

---
 sys/arch/mips/include/pmap.h |  5 +++-
 sys/arch/mips/mips/pmap.c    | 46 ++++++++++++++++++++++++++++++++++--
 2 files changed, 48 insertions(+), 3 deletions(-)

diff --git a/sys/arch/mips/include/pmap.h b/sys/arch/mips/include/pmap.h
index aea254ce62bd..b2f6c6e6f77b 100644
--- a/sys/arch/mips/include/pmap.h
+++ b/sys/arch/mips/include/pmap.h
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.h,v 1.24 1999/01/18 02:11:07 castor Exp $	*/
+/*	$NetBSD: pmap.h,v 1.25 1999/02/26 19:03:39 is Exp $	*/
 
 /* 
  * Copyright (c) 1987 Carnegie-Mellon University
@@ -123,6 +123,9 @@ void	pmap_bootstrap __P((void));
 
 void	pmap_set_modified __P((paddr_t));
 
+void	pmap_procwr __P((struct proc *, vaddr_t, size_t));
+#define	PMAP_NEED_PROCWR
+
 /*
  * pmap_prefer()  helps reduce virtual-coherency exceptions in
  * the virtually-indexed cache on mips3 CPUs.
diff --git a/sys/arch/mips/mips/pmap.c b/sys/arch/mips/mips/pmap.c
index 3e227afcbb20..8d911993558d 100644
--- a/sys/arch/mips/mips/pmap.c
+++ b/sys/arch/mips/mips/pmap.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: pmap.c,v 1.50 1999/01/16 08:51:04 nisimura Exp $	*/
+/*	$NetBSD: pmap.c,v 1.51 1999/02/26 19:03:40 is Exp $	*/
 
 /*-
  * Copyright (c) 1998 The NetBSD Foundation, Inc.
@@ -78,7 +78,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.50 1999/01/16 08:51:04 nisimura Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.51 1999/02/26 19:03:40 is Exp $");
 
 /*
  *	Manages physical address maps.
@@ -1013,6 +1013,48 @@ pmap_protect(pmap, sva, eva, prot)
 	}
 }
 
+void
+pmap_procwr(p, va, len)
+	struct proc	*p;
+	vaddr_t		va;
+	size_t		len;
+{
+	pmap_t pmap;
+
+	pmap = p->p_vmspace->vm_map.pmap;
+
+	if (CPUISMIPS3) {
+#if 0
+		printf("pmap_procwr: va %lx len %lx\n", va, len);
+#endif
+		mips3_FlushDCache(va, len);
+		mips3_FlushICache(MIPS_PHYS_TO_KSEG0(va &
+		    (mips_L1ICacheSize - 1)), len);
+	} else {
+		pt_entry_t *pte;
+		unsigned entry;
+
+#if 0
+printf("pmap_procwr: va %lx", va);
+#endif
+		if (!(pte = pmap_segmap(pmap, va)))
+			return;
+		pte += (va >> PGSHIFT) & (NPTEPG - 1);
+		entry = pte->pt_entry;
+		if (!mips_pg_v(entry))
+			return;
+#if 0
+printf(" flush %lx", pfn_to_vad(entry) + (va & PGOFSET));
+#endif
+		mips1_FlushICache(MIPS_PHYS_TO_KSEG0(mips1_pfn_to_vad(entry)
+		    + (va & PGOFSET)),
+		    len);
+#if 0
+printf("\n");
+#endif
+	}
+}
+
 /*
  *	Return RO protection of page.
  */