Revert rev 1.31 of bha.c (and associtated changes in the headers and
config glue files). Fixes PR kern/9841. Tested by Tracy J. Di Marco White with a bt948 and 6 disks.
This commit is contained in:
simonb
parent
78907e0169
commit
5d4fa9b0ce
2580
sys/dev/ic/bha.c
2580
sys/dev/ic/bha.c
File diff suppressed because it is too large
Load Diff
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@ -1,4 +1,4 @@
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/* $NetBSD: bhareg.h,v 1.14 1999/12/23 00:15:12 wrstuden Exp $ */
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/* $NetBSD: bhareg.h,v 1.15 2000/10/03 14:07:37 simonb Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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@ -92,48 +92,29 @@ typedef u_int8_t physlen[4];
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#define BHA_NOP 0x00 /* No operation */
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#define BHA_MBX_INIT 0x01 /* Mbx initialization */
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#define BHA_START_SCSI 0x02 /* start scsi command */
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#define BHA_EXECUTE_BIOS_CMD 0x03 /* execute BIOS command */
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#define BHA_INQUIRE_REVISION 0x04 /* Adapter Inquiry */
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#define BHA_MBO_INTR_EN 0x05 /* Enable MBO available interrupt */
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#if 0
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#define BHA_SEL_TIMEOUT_SET 0x06 /* set selection time-out */
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#define BHA_BUS_ON_TIME_SET 0x07 /* set bus-on time */
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#define BHA_BUS_OFF_TIME_SET 0x08 /* set bus-off time */
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#define BHA_BUS_SPEED_SET 0x09 /* set bus transfer speed */
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#define BHA_SPEED_SET 0x09 /* set transfer speed */
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#endif
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#define BHA_INQUIRE_DEVICES 0x0a /* return installed devices 0-7 */
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#define BHA_INQUIRE_CONFIG 0x0b /* return configuration data */
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#define BHA_TARGET_EN 0x0c /* enable target mode */
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#define BHA_INQUIRE_SETUP 0x0d /* return setup data */
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#define BHA_WRITE_LRAM 0x1a /* write adapter local RAM */
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#define BHA_READ_LRAM 0x1b /* read adapter local RAM */
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#define BHA_WRITE_CHIP_FIFO 0x1c /* write bus master chip FIFO */
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#define BHA_READ_CHIP_FIFO 0x1d /* read bus master chip FIFO */
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#define BHA_ECHO 0x1f /* Echo command byte */
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#define BHA_ADAPTER_DIAGNOSTICS 0x20 /* host adapter diagnostics */
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#define BHA_SET_ADAPTER_OPTIONS 0x21 /* set adapter options */
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#define BHA_ECHO 0x1e /* Echo command data */
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#define BHA_INQUIRE_DEVICES_2 0x23 /* return installed devices 8-15 */
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#define BHA_INQUIRE_TARG_DEVS 0x24 /* inquire target devices */
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#define BHA_DISABLE_HAC_INTR 0x25 /* disable host adapter interrupt */
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#define BHA_MBX_INIT_EXTENDED 0x81 /* Mbx initialization */
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#define BHA_EXECUTE_SCSI_CMD 0x83 /* execute SCSI command */
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#define BHA_INQUIRE_REVISION_3 0x84 /* Get 3rd firmware version byte */
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#define BHA_INQUIRE_REVISION_4 0x85 /* Get 4th firmware version byte */
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#define BHA_INQUIRE_PCI_INFO 0x86 /* get PCI host adapter information */
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#define BHA_INQUIRE_MODEL 0x8b /* Get hardware ID and revision */
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#define BHA_INQUIRE_PERIOD 0x8c /* Get synchronous period */
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#define BHA_INQUIRE_EXTENDED 0x8d /* Adapter Setup Inquiry */
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#define BHA_ROUND_ROBIN 0x8f /* Enable/Disable(default)
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round robin */
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#define BHA_STORE_LRAM 0x90 /* store host adapter local RAM */
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#define BHA_FETCH_LRAM 0x91 /* fetch host adapter local RAM */
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#define BHA_SAVE_TO_EEPROM 0x92 /* store local RAM data in EEPROM */
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#define BHA_UPLOAD_AUTOSCSI 0x94 /* upload AutoSCSI code */
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#define BHA_ROUND_ROBIN 0x8f /* Enable/Disable(default) round robin */
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#define BHA_MODIFY_IOPORT 0x95 /* change or disable I/O port */
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#define BHA_SET_CCB_FORMAT 0x96 /* set CCB format (legacy/wide lun) */
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#define BHA_WRITE_INQUIRY_BUF 0x9a /* write inquiry buffer */
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#define BHA_READ_INQUIRY_BUF 0x9b /* read inquiry buffer */
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#define BHA_FLASH_UP_DOWNLOAD 0xa7 /* flash upload/downlod */
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#define BHA_READ_SCAM_DATA 0xa8 /* read SCAM data */
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#define BHA_WRITE_SCAM_DATA 0xa9 /* write SCAM data */
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/*
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* BHA_INTR bits
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@ -146,16 +127,14 @@ typedef u_int8_t physlen[4];
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struct bha_mbx_out {
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physaddr ccb_addr;
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u_int8_t reserved[3];
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u_int8_t cmd;
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u_char dummy[3];
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u_char cmd;
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};
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struct bha_mbx_in {
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physaddr ccb_addr;
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u_int8_t host_stat;
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u_int8_t target_stat;
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u_int8_t reserved;
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u_int8_t comp_stat;
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u_char dummy[3];
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u_char stat;
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};
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/*
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@ -166,7 +145,7 @@ struct bha_mbx_in {
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#define BHA_MBO_ABORT 0x2 /* MBO abort entry */
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/*
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* mbi.comp_stat values
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* mbi.stat values
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*/
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#define BHA_MBI_FREE 0x0 /* MBI entry is free */
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#define BHA_MBI_OK 0x1 /* completed without error */
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@ -185,7 +164,7 @@ WARNING...THIS WON'T WORK(won't fit on 1 page)
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#endif /* BIG_DMA */
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struct bha_scat_gath {
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physlen seg_len;
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physlen seg_len;
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physaddr seg_addr;
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};
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@ -207,13 +186,13 @@ struct bha_ccb {
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u_int8_t scsi_cmd_length;
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u_int8_t req_sense_length;
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/*------------------------------------longword boundary */
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physlen data_length;
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physlen data_length;
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/*------------------------------------longword boundary */
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physaddr data_addr;
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physaddr data_addr;
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/*------------------------------------longword boundary */
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u_int8_t reserved1[2];
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u_int8_t host_stat;
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u_int8_t target_stat;
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u_char dummy1[2];
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u_char host_stat;
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u_char target_stat;
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/*------------------------------------longword boundary */
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u_int8_t target;
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#if BYTE_ORDER == LITTLE_ENDIAN
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@ -229,20 +208,18 @@ struct bha_ccb {
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u_int8_t reserved2[1];
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u_int8_t link_id;
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/*------------------------------------longword boundary */
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physaddr link_addr;
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physaddr link_addr;
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/*------------------------------------longword boundary */
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physaddr sense_ptr;
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physaddr sense_ptr;
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/*-----end of HW fields-----------------------longword boundary */
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struct scsipi_sense_data scsi_sense;
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/*------------------------------------longword boundary */
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struct bha_scat_gath scat_gath[BHA_NSEG];
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/*------------------------------------longword boundary */
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TAILQ_ENTRY(bha_ccb) chain;
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struct bha_ccb *nexthash;
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bus_addr_t hashkey;
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struct bha_ccb *nexthash;
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u_long hashkey;
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struct scsipi_xfer *xs; /* the scsipi_xfer for this cmd */
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int flags;
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#define CCB_ALLOC 0x01
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#define CCB_ABORT 0x02
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@ -263,41 +240,25 @@ struct bha_ccb {
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*/
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#define BHA_INITIATOR_CCB 0x00 /* SCSI Initiator CCB */
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#define BHA_TARGET_CCB 0x01 /* SCSI Target CCB */
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#define BHA_INIT_SCAT_GATH_CCB 0x02 /* SCSI Initiator with S/G */
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#define BHA_INIT_RESID_CCB 0x03 /* SCSI Initiator w/ residual */
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#define BHA_INIT_RESID_SG_CCB 0x04 /* SCSI Initiator w/ residual and S/G */
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#define BHA_INIT_SCAT_GATH_CCB 0x02 /* SCSI Initiator with scattter gather */
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#define BHA_RESET_CCB 0x81 /* SCSI Bus reset */
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/*
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* bha_ccb.host_stat values
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*/
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#define BHA_OK 0x00 /* cmd ok */
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#define BHA_LINK_OK 0x0a /* Link cmd ok */
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#define BHA_LINK_IT 0x0b /* Link cmd ok + int */
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#define BHA_DATA_UNDRN 0x0c /* data underrun error */
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#define BHA_SEL_TIMEOUT 0x11 /* Selection time out */
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#define BHA_OVER_UNDER 0x12 /* Data over/under run */
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#define BHA_BUS_FREE 0x13 /* Bus dropped at unexpected time */
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#define BHA_INV_BUS 0x14 /* Invalid bus phase/sequence */
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#define BHA_BAD_MBO 0x15 /* Incorrect MBO cmd */
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#define BHA_BAD_CCB 0x16 /* Incorrect ccb opcode */
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#define BHA_BAD_LINK 0x17 /* Not same values of LUN for links */
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#define BHA_INV_TARGET 0x18 /* Invalid target direction */
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#define BHA_CCB_DUP 0x19 /* Duplicate CCB received */
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#define BHA_INV_CCB 0x1a /* Invalid CCB or segment list */
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#define BHA_AUTOSENSE_FAILED 0x1b /* auto REQUEST SENSE failed */
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#define BHA_TAGGED_MSG_REJ 0x1c /* tagged queueing message rejected */
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#define BHA_UNSUP_MSG_RECVD 0x1d /* unsupported message received */
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#define BHA_HARDWARE_FAILURE 0x20 /* host adapter hardware failure */
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#define BHA_TARG_IGNORED_ATN 0x21 /* target ignored ATN signal */
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#define BHA_HA_SCSI_BUS_RESET 0x22 /* host adapter asserted RST */
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#define BHA_OTHER_SCSI_BUS_RESET 0x23 /* other device asserted RST */
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#define BHA_BAD_RECONNECT 0x24 /* target reconnected improperly */
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#define BHA_HA_BUS_DEVICE_RESET 0x25 /* host adapter performed BDR */
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#define BHA_ABORT_QUEUE 0x26 /* abort queue generated */
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#define BHA_SOFTWARE_FAILURE 0x27 /* host adapter software failure */
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#define BHA_HARDWARE_WATCHDOG 0x30 /* host adapter watchdog timer fired */
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#define BHA_SCSI_PARITY_ERROR 0x34 /* SCSI parity error detected */
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#define BHA_OK 0x00 /* cmd ok */
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#define BHA_LINK_OK 0x0a /* Link cmd ok */
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#define BHA_LINK_IT 0x0b /* Link cmd ok + int */
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#define BHA_SEL_TIMEOUT 0x11 /* Selection time out */
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#define BHA_OVER_UNDER 0x12 /* Data over/under run */
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#define BHA_BUS_FREE 0x13 /* Bus dropped at unexpected time */
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#define BHA_INV_BUS 0x14 /* Invalid bus phase/sequence */
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#define BHA_BAD_MBO 0x15 /* Incorrect MBO cmd */
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#define BHA_BAD_CCB 0x16 /* Incorrect ccb opcode */
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#define BHA_BAD_LINK 0x17 /* Not same values of LUN for links */
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#define BHA_INV_TARGET 0x18 /* Invalid target direction */
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#define BHA_CCB_DUP 0x19 /* Duplicate CCB received */
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#define BHA_INV_CCB 0x1a /* Invalid CCB or segment list */
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struct bha_extended_inquire {
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struct {
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u_char bios_address; /* Address of adapter BIOS */
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u_short sg_limit;
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u_char mbox_count;
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u_char mbox_baseaddr[4]; /* packed/unaligned u_int32_t */
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u_char mbox_baseaddr[4]; /* packed/unaligned uint_32_t */
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u_char intrflags;
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#define BHA_INTR_FASTEISA 0x04
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#define BHA_INTR_LEVEL 0x40 /* bit 6: level-sensitive interrupt */
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#define BHA_INTR_LEVEL 0x40 /* bit 6: level-sensitive interrupt */
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u_char firmware_level[3]; /* last 3 digits of firmware rev */
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u_char scsi_flags; /* supported SCSI features */
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#define BHA_SCSI_WIDE 0x01 /* host adapter is wide */
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#define BHA_SCSI_DIFFERENTIAL 0x02 /* host adapter is differential */
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#define BHA_SCSI_SCAM 0x04 /* host adapter supports SCAM */
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#define BHA_SCSI_ULTRA 0x08 /* host adapter supports Ultra */
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#define BHA_SCSI_TERMINATION 0x10 /* host adapter supports smart
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termination */
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u_char scsi_flags; /* supported SCSI features */
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#define BHA_SCSI_WIDE 0x01
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#define BHA_SCSI_DIFFERENTIAL 0x02
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#define BHA_SCSI_AUTOCONF 0x04
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#define BHA_SCSI_ULTRA 0x08
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#define BHA_SCSI_TERMINATION 0x10
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} reply;
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};
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@ -428,22 +387,15 @@ struct bha_setup_reply {
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u_int8_t num_mbx;
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u_int8_t mbx[3]; /*XXX */
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/* doesn't make sense with 32bit addresses */
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struct bha_sync sync_low[8];
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u_int8_t low_disc_info;
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struct bha_sync sync[8];
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u_char disc_sts;
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};
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/* additional reply data supplied by wide controlers */
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struct bus_setup_reply_wide {
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u_int8_t signature;
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u_int8_t letter_d;
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u_int8_t ha_type;
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u_int8_t low_wide_allowed;
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u_int8_t low_wide_active;
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struct bha_sync sync_high[8];
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u_int8_t high_disc_info;
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u_int8_t reserved;
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u_int8_t high_wide_allowed;
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u_int8_t high_wide_active;
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u_char pad[5]; /* ??? */
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struct bha_sync sync[8];
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u_char disc_sts;
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};
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struct bha_setup {
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@ -1,7 +1,7 @@
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/* $NetBSD: bhavar.h,v 1.18 2000/04/19 02:39:12 enami Exp $ */
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/* $NetBSD: bhavar.h,v 1.19 2000/10/03 14:07:37 simonb Exp $ */
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/*-
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* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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@ -39,55 +39,35 @@
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#include <sys/queue.h>
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/* XXX adjust hash for large numbers of CCBs */
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/*
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* Mail box defs etc.
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* these could be bigger but we need the bha_softc to fit on a single page..
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*/
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#define BHA_MBX_SIZE 32 /* mail box size (MAX 255 MBxs) */
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/* don't need that many really */
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#define BHA_CCB_MAX 32 /* store up to 32 CCBs at one time */
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#define CCB_HASH_SIZE 32 /* hash table size for phystokv */
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#define CCB_HASH_SHIFT 9
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#define CCB_HASH(x) ((((long)(x))>>CCB_HASH_SHIFT) & (CCB_HASH_SIZE - 1))
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/*
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* A CCB allocation group. Each group is a page size. We can find
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* the allocation group for a CCB by truncating the CCB address to
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* a page boundary, and the offset from the group's DMA mapping
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* by taking the offset of the CCB into the page.
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*/
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#define BHA_CCBS_PER_GROUP ((PAGE_SIZE - sizeof(bus_dmamap_t)) / \
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sizeof(struct bha_ccb))
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struct bha_ccb_group {
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bus_dmamap_t bcg_dmamap;
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struct bha_ccb bcg_ccbs[1]; /* determined at run-time */
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#define bha_nextmbx(wmb, mbx, mbio) \
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if ((wmb) == &(mbx)->mbio[BHA_MBX_SIZE - 1]) \
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(wmb) = &(mbx)->mbio[0]; \
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else \
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(wmb)++;
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struct bha_mbx {
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struct bha_mbx_out mbo[BHA_MBX_SIZE];
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struct bha_mbx_in mbi[BHA_MBX_SIZE];
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struct bha_mbx_out *cmbo; /* Collection Mail Box out */
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struct bha_mbx_out *tmbo; /* Target Mail Box out */
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struct bha_mbx_in *tmbi; /* Target Mail Box in */
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};
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#define BHA_CCB_GROUP(ccb) \
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(struct bha_ccb_group *)(trunc_page((vaddr_t)ccb))
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#define BHA_CCB_OFFSET(ccb) ((vaddr_t)(ccb) & PAGE_MASK)
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#define BHA_CCB_SYNC(sc, ccb, ops) \
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do { \
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struct bha_ccb_group *bcg = BHA_CCB_GROUP((ccb)); \
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\
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bus_dmamap_sync((sc)->sc_dmat, bcg->bcg_dmamap, \
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BHA_CCB_OFFSET(ccb), sizeof(struct bha_ccb), (ops)); \
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} while (0)
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/*
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* Offset in the DMA mapping for mailboxes.
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* Since all mailboxes are allocated on a single DMA'able memory
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* due to the hardware limitation, an offset of any mailboxes can be
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* calculated using same expression.
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*/
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#define BHA_MBX_OFFSET(sc, mbx) ((u_long)(mbx) - (u_long)(sc)->sc_mbo)
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#define BHA_MBI_SYNC(sc, mbi, ops) \
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do { \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap_mbox, \
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BHA_MBX_OFFSET((sc), (mbi)), sizeof(struct bha_mbx_in), (ops)); \
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} while (0)
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#define BHA_MBO_SYNC(sc, mbo, ops) \
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do { \
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bus_dmamap_sync((sc)->sc_dmat, (sc)->sc_dmamap_mbox, \
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BHA_MBX_OFFSET((sc), (mbo)), sizeof(struct bha_mbx_out), (ops)); \
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} while (0)
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struct bha_control {
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struct bha_mbx bc_mbx; /* all our mailboxes */
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struct bha_ccb bc_ccbs[BHA_CCB_MAX]; /* all our control blocks */
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};
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struct bha_softc {
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struct device sc_dev;
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@ -95,50 +75,17 @@ struct bha_softc {
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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bus_dma_tag_t sc_dmat;
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bus_dmamap_t sc_dmamap_mbox; /* maps the mailboxes */
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bus_dmamap_t sc_dmamap_control; /* maps the control structures */
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int sc_dmaflags; /* bus-specific dma map flags */
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void *sc_ih;
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int sc_scsi_id; /* host adapter SCSI ID */
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struct bha_control *sc_control; /* control structures */
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int sc_flags;
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#define BHAF_WIDE 0x01 /* device is wide */
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#define BHAF_DIFFERENTIAL 0x02 /* device is differential */
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#define BHAF_ULTRA 0x04 /* device is ultra-scsi */
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#define BHAF_TAGGED_QUEUEING 0x08 /* device supports tagged queueing */
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#define BHAF_WIDE_LUN 0x10 /* device supported wide lun CCBs */
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#define BHAF_STRICT_ROUND_ROBIN 0x20 /* device supports strict RR mode */
|
||||
|
||||
int sc_max_dmaseg; /* maximum number of DMA segments */
|
||||
int sc_hw_ccbs; /* maximum number of CCBs (HW) */
|
||||
int sc_max_ccbs; /* maximum number of CCBs (SW) */
|
||||
int sc_cur_ccbs; /* current number of CCBs */
|
||||
int sc_mbox_count; /* maximum number of mailboxes */
|
||||
|
||||
int sc_disc_mask; /* mask of targets allowing discnnct */
|
||||
int sc_ultra_mask; /* mask of targets allowing ultra */
|
||||
int sc_fast_mask; /* mask of targets allowing fast */
|
||||
int sc_sync_mask; /* mask of targets allowing sync */
|
||||
int sc_wide_mask; /* mask of targets allowing wide */
|
||||
int sc_tag_mask; /* mask of targets allowing t/q'ing */
|
||||
|
||||
/*
|
||||
* In and Out mailboxes.
|
||||
*/
|
||||
struct bha_mbx_out *sc_mbo;
|
||||
struct bha_mbx_in *sc_mbi;
|
||||
|
||||
struct bha_mbx_out *sc_cmbo; /* Collection Mail Box out */
|
||||
struct bha_mbx_out *sc_tmbo; /* Target Mail Box out */
|
||||
|
||||
int sc_mbofull; /* number of full Mail Box Out */
|
||||
|
||||
struct bha_mbx_in *sc_tmbi; /* Target Mail Box in */
|
||||
#define wmbx (&sc->sc_control->bc_mbx)
|
||||
|
||||
struct bha_ccb *sc_ccbhash[CCB_HASH_SIZE];
|
||||
TAILQ_HEAD(, bha_ccb) sc_free_ccb,
|
||||
sc_waiting_ccb,
|
||||
sc_allocating_ccbs;
|
||||
TAILQ_HEAD(, bha_ccb) sc_free_ccb, sc_waiting_ccb;
|
||||
int sc_mbofull;
|
||||
struct scsipi_link sc_link; /* prototype for devs */
|
||||
struct scsipi_adapter sc_adapter;
|
||||
|
||||
|
|
@ -148,14 +95,36 @@ struct bha_softc {
|
|||
sc_firmware[6];
|
||||
};
|
||||
|
||||
/*
|
||||
* Offset of a Mail Box In from the beginning of the control DMA mapping.
|
||||
*/
|
||||
#define BHA_MBI_OFF(m) (offsetof(struct bha_control, bc_mbx.mbi[0]) + \
|
||||
(((u_long)(m)) - ((u_long)&wmbx->mbi[0])))
|
||||
|
||||
/*
|
||||
* Offset of a Mail Box Out from the beginning of the control DMA mapping.
|
||||
*/
|
||||
#define BHA_MBO_OFF(m) (offsetof(struct bha_control, bc_mbx.mbo[0]) + \
|
||||
(((u_long)(m)) - ((u_long)&wmbx->mbo[0])))
|
||||
|
||||
/*
|
||||
* Offset of a CCB from the beginning of the control DMA mapping.
|
||||
*/
|
||||
#define BHA_CCB_OFF(c) (offsetof(struct bha_control, bc_ccbs[0]) + \
|
||||
(((u_long)(c)) - ((u_long)&sc->sc_control->bc_ccbs[0])))
|
||||
|
||||
struct bha_probe_data {
|
||||
int sc_irq, sc_drq;
|
||||
int sc_scsi_dev; /* adapters scsi id */
|
||||
int sc_iswide; /* adapter is wide */
|
||||
};
|
||||
|
||||
#define ISWIDE(sc) (sc->sc_link.scsipi_scsi.max_target >= 8)
|
||||
|
||||
int bha_find __P((bus_space_tag_t, bus_space_handle_t,
|
||||
struct bha_probe_data *));
|
||||
void bha_attach __P((struct bha_softc *, struct bha_probe_data *));
|
||||
int bha_info __P((struct bha_softc *));
|
||||
int bha_intr __P((void *));
|
||||
|
||||
int bha_disable_isacompat __P((struct bha_softc *));
|
||||
void bha_inquire_setup_information __P((struct bha_softc *));
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bha_isa.c,v 1.15 1999/10/01 18:17:12 thorpej Exp $ */
|
||||
/* $NetBSD: bha_isa.c,v 1.16 2000/10/03 14:07:37 simonb Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1998 The NetBSD Foundation, Inc.
|
||||
|
|
@ -149,7 +149,7 @@ bha_isa_attach(parent, self, aux)
|
|||
* we can do 32-bit DMA (earlier revisions are buggy
|
||||
* in this regard).
|
||||
*/
|
||||
(void) bha_info(sc);
|
||||
bha_inquire_setup_information(sc);
|
||||
if (strcmp(sc->sc_firmware, "3.37") < 0)
|
||||
printf("%s: buggy VLB controller, disabling 32-bit DMA\n",
|
||||
sc->sc_dev.dv_xname);
|
||||
|
|
|
|||
Loading…
Reference in New Issue