Add GPU gating clock
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200097fdf5
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5c16178e92
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@ -1,4 +1,4 @@
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/* $NetBSD: tegra124_car.c,v 1.8 2017/01/12 01:12:08 maya Exp $ */
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/* $NetBSD: tegra124_car.c,v 1.9 2017/04/14 09:50:56 jmcneill Exp $ */
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/*-
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* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
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@ -27,7 +27,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tegra124_car.c,v 1.8 2017/01/12 01:12:08 maya Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tegra124_car.c,v 1.9 2017/04/14 09:50:56 jmcneill Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -636,6 +636,7 @@ static struct tegra_clk tegra124_car_clocks[] = {
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CAR_PLLP_OUTC_REG, CAR_PLLP_OUTC_OUT5_CLKEN),
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CLK_GATE_U("xusb_host", "xusb_host_src", CAR_DEV_U_XUSB_HOST),
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CLK_GATE_W("xusb_ss", "xusb_ss_src", CAR_DEV_W_XUSB_SS),
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CLK_GATE_X("gpu", "pll_ref", CAR_DEV_X_GPU),
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};
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struct tegra124_car_rst {
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