Don't use ARM32_NEW_VM_LAYOUT or initarm_common() for now. It's not
quite ready for prime-time on evbarm.
This commit is contained in:
scw
parent
fd46661ecf
commit
5c0b008779
@ -1,4 +1,4 @@
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# $NetBSD: files.iq80321,v 1.4 2003/04/18 12:01:32 scw Exp $
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# $NetBSD: files.iq80321,v 1.5 2003/04/19 08:18:12 scw Exp $
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#
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# Intel IQ80321 evaluation board configuration info
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#
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@ -6,8 +6,9 @@
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# Use the generic ARM soft interrupt code.
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file arch/arm/arm/softintr.c
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# Use the shared initarm_common() code
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file arch/evbarm/evbarm/initarm_common.c
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# Use the shared initarm_common() code.
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# XXX: Not yet ready for prime-time
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#file arch/evbarm/evbarm/initarm_common.c
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file arch/evbarm/iq80321/iq80321_7seg.c
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file arch/evbarm/iq80321/iq80321_machdep.c
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@ -1,10 +1,10 @@
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# $NetBSD: mk.iq80321,v 1.2 2003/04/18 12:01:32 scw Exp $
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# $NetBSD: mk.iq80321,v 1.3 2003/04/19 08:18:12 scw Exp $
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SYSTEM_FIRST_OBJ= iq80321_start.o
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SYSTEM_FIRST_SFILE= ${THISARM}/iq80321/iq80321_start.S
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KERNEL_BASE_PHYS=0x00020000
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KERNEL_BASE_VIRT=0xc0020000
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KERNEL_BASE_PHYS=0x00200000
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KERNEL_BASE_VIRT=0xc0200000
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SYSTEM_LD_TAIL_EXTRA+=; \
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echo ${OBJCOPY} -S -O srec $@ $@.srec; \
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@ -1,4 +1,4 @@
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# $NetBSD: std.iq80321,v 1.7 2003/04/18 12:01:32 scw Exp $
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# $NetBSD: std.iq80321,v 1.8 2003/04/19 08:18:12 scw Exp $
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#
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# standard NetBSD/evbarm for IQ80321 options
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@ -16,7 +16,7 @@ options ARM32
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# New pmap options are standard on this board
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options ARM32_PMAP_NEW
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options ARM32_NEW_VM_LAYOUT
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#options ARM32_NEW_VM_LAYOUT # Not yet ready for prime-time
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makeoptions BOARDTYPE="iq80321"
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makeoptions BOARDMKFRAG="${THISARM}/conf/mk.iq80321"
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@ -1,10 +1,10 @@
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/* $NetBSD: iq80321_machdep.c,v 1.14 2003/04/18 12:01:32 scw Exp $ */
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/* $NetBSD: iq80321_machdep.c,v 1.15 2003/04/19 08:18:13 scw Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe and Steve C. Woodford for Wasabi Systems, Inc.
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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@ -81,9 +81,12 @@
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#include <sys/kernel.h>
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#include <sys/exec.h>
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#include <sys/proc.h>
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#include <sys/msgbuf.h>
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#include <sys/reboot.h>
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#include <sys/termios.h>
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#include <uvm/uvm_extern.h>
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#include <dev/cons.h>
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#include <machine/db_machdep.h>
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@ -94,18 +97,19 @@
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <arm/undefined.h>
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#include <arm/arm32/machdep.h>
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#include <arm/xscale/i80321reg.h>
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#include <arm/xscale/i80321var.h>
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#include <dev/pci/ppbreg.h>
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#include <evbarm/iq80321/iq80321reg.h>
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#include <evbarm/iq80321/iq80321var.h>
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#include <evbarm/iq80321/obiovar.h>
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#include <evbarm/evbarm/initarmvar.h>
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#include "opt_ipkdb.h"
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/*
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@ -119,10 +123,67 @@
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u_int cpu_reset_address = 0x00000000;
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/* Define various stack sizes in pages */
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#define IRQ_STACK_SIZE 1
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#define ABT_STACK_SIZE 1
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#ifdef IPKDB
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#define UND_STACK_SIZE 2
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#else
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#define UND_STACK_SIZE 1
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#endif
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BootConfig bootconfig; /* Boot config storage */
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char *boot_args = NULL;
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char *boot_file = NULL;
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vm_offset_t physical_start;
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vm_offset_t physical_freestart;
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vm_offset_t physical_freeend;
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vm_offset_t physical_end;
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u_int free_pages;
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vm_offset_t pagetables_start;
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int physmem = 0;
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/*int debug_flags;*/
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#ifndef PMAP_STATIC_L1S
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int max_processes = 64; /* Default number */
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#endif /* !PMAP_STATIC_L1S */
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/* Physical and virtual addresses for some global pages */
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pv_addr_t systempage;
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pv_addr_t irqstack;
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pv_addr_t undstack;
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pv_addr_t abtstack;
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pv_addr_t kernelstack;
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pv_addr_t minidataclean;
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vm_offset_t msgbufphys;
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extern u_int data_abort_handler_address;
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extern u_int prefetch_abort_handler_address;
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extern u_int undefined_handler_address;
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#ifdef PMAP_DEBUG
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extern int pmap_debug_level;
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#endif
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#define KERNEL_PT_SYS 0 /* L2 table for mapping zero page */
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#define KERNEL_PT_KERNEL 1 /* L2 table for mapping kernel */
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#define KERNEL_PT_KERNEL_NUM 2
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/* L2 table for mapping i80321 */
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#define KERNEL_PT_IOPXS (KERNEL_PT_KERNEL + KERNEL_PT_KERNEL_NUM)
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/* L2 tables for mapping kernel VM */
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#define KERNEL_PT_VMDATA (KERNEL_PT_IOPXS + 1)
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#define KERNEL_PT_VMDATA_NUM 4 /* start with 16MB of KVM */
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#define NUM_KERNEL_PTS (KERNEL_PT_VMDATA + KERNEL_PT_VMDATA_NUM)
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pv_addr_t kernel_pt_table[NUM_KERNEL_PTS];
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struct user *proc0paddr;
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/* Prototypes */
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void consinit(void);
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@ -230,44 +291,37 @@ cpu_reboot(int howto, char *bootstr)
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}
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/*
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* Mapping table for core on-board devices.
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* Mapping table for core kernel memory. This memory is mapped at init
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* time with section mappings.
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*/
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static const struct initarm_iospace iq80321_ioconf[] = {
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{
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IQ80321_OBIO_BASE,
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IQ80321_OBIO_BASE,
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IQ80321_OBIO_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE
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},
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{
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IQ80321_IOW_VBASE,
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VERDE_OUT_XLATE_IO_WIN0_BASE,
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VERDE_OUT_XLATE_IO_WIN_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE
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},
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{
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IQ80321_80321_VBASE,
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VERDE_PMMR_BASE,
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VERDE_PMMR_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE
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}
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};
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#define IQ80321_NIO (sizeof(iq80321_ioconf)/sizeof(struct initarm_iospace))
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struct l1_sec_map {
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vaddr_t va;
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vaddr_t pa;
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vsize_t size;
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vm_prot_t prot;
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int cache;
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} l1_sec_table[] = {
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/*
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* Map the on-board devices VA == PA so that we can access them
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* with the MMU on or off.
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*/
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{
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IQ80321_OBIO_BASE,
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IQ80321_OBIO_BASE,
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IQ80321_OBIO_SIZE,
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VM_PROT_READ|VM_PROT_WRITE,
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PTE_NOCACHE,
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},
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static struct initarm_config iq80321_bootconf = {
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&bootconfig,
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0, /* PA which maps to KERNEL_BASE (see initarm()) */
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ARM_VECTORS_HIGH, /* Where we'd like the vector page */
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IQ80321_IOPXS_VBASE, /* KVA of fixed onboard devices */
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IQ80321_IOPXS_VSIZE, /* Size of the above mapping (5MB) */
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IQ80321_NIO, /* # of fixed I/O mappings */
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iq80321_ioconf /* List of fixed I/O mappings */
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{
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0,
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0,
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0,
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0,
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0,
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}
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};
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static void
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iq80321_hardclock_hook(void)
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{
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@ -294,9 +348,16 @@ u_int
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initarm(void *arg)
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{
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extern vaddr_t xscale_cache_clean_addr;
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#ifdef DIAGNOSTIC
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extern vsize_t xscale_minidata_clean_size;
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#endif
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int loop;
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int loop1;
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u_int l1pagetable;
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pv_addr_t kernel_l1pt;
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pv_addr_t kernel_ptpt;
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paddr_t memstart;
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psize_t memsize;
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vaddr_t kstack;
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/*
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* Clear out the 7-segment display. Whee, the first visual
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@ -345,7 +406,314 @@ initarm(void *arg)
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bootconfig.dramblocks = 1;
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bootconfig.dram[0].address = memstart;
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bootconfig.dram[0].pages = memsize / PAGE_SIZE;
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iq80321_bootconf.ic_kernel_base_pa = memstart;
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/*
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* Set up the variables that define the availablilty of
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* physical memory. For now, we're going to set
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* physical_freestart to 0xa0200000 (where the kernel
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* was loaded), and allocate the memory we need downwards.
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* If we get too close to the L1 table that we set up, we
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* will panic. We will update physical_freestart and
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* physical_freeend later to reflect what pmap_bootstrap()
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* wants to see.
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*
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* XXX pmap_bootstrap() needs an enema.
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*/
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physical_start = bootconfig.dram[0].address;
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physical_end = physical_start + (bootconfig.dram[0].pages * PAGE_SIZE);
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physical_freestart = 0xa0009000UL;
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physical_freeend = 0xa0200000UL;
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physmem = (physical_end - physical_start) / PAGE_SIZE;
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/* Tell the user about the memory */
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printf("physmemory: %d pages at 0x%08lx -> 0x%08lx\n", physmem,
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physical_start, physical_end - 1);
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/*
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* Okay, the kernel starts 2MB in from the bottom of physical
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* memory. We are going to allocate our bootstrap pages downwards
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* from there.
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*
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* We need to allocate some fixed page tables to get the kernel
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* going. We allocate one page directory and a number of page
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* tables and store the physical addresses in the kernel_pt_table
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* array.
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*
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* The kernel page directory must be on a 16K boundary. The page
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* tables must be on 4K bounaries. What we do is allocate the
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* page directory on the first 16K boundary that we encounter, and
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* the page tables on 4K boundaries otherwise. Since we allocate
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* at least 3 L2 page tables, we are guaranteed to encounter at
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* least one 16K aligned region.
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*/
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#ifdef VERBOSE_INIT_ARM
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printf("Allocating page tables\n");
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#endif
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free_pages = (physical_freeend - physical_freestart) / PAGE_SIZE;
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#ifdef VERBOSE_INIT_ARM
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printf("freestart = 0x%08lx, free_pages = %d (0x%08x)\n",
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physical_freestart, free_pages, free_pages);
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#endif
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/* Define a macro to simplify memory allocation */
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#define valloc_pages(var, np) \
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alloc_pages((var).pv_pa, (np)); \
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(var).pv_va = KERNEL_BASE + (var).pv_pa - physical_start;
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#define alloc_pages(var, np) \
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physical_freeend -= ((np) * PAGE_SIZE); \
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if (physical_freeend < physical_freestart) \
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panic("initarm: out of memory"); \
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(var) = physical_freeend; \
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free_pages -= (np); \
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memset((char *)(var), 0, ((np) * PAGE_SIZE));
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loop1 = 0;
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kernel_l1pt.pv_pa = 0;
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for (loop = 0; loop <= NUM_KERNEL_PTS; ++loop) {
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/* Are we 16KB aligned for an L1 ? */
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if (((physical_freeend - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) == 0
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&& kernel_l1pt.pv_pa == 0) {
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valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
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} else {
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#ifdef ARM32_PMAP_NEW
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valloc_pages(kernel_pt_table[loop1],
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L2_TABLE_SIZE / PAGE_SIZE);
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#else
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alloc_pages(kernel_pt_table[loop1].pv_pa,
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L2_TABLE_SIZE / PAGE_SIZE);
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kernel_pt_table[loop1].pv_va =
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kernel_pt_table[loop1].pv_pa;
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#endif
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++loop1;
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}
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}
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/* This should never be able to happen but better confirm that. */
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if (!kernel_l1pt.pv_pa || (kernel_l1pt.pv_pa & (L1_TABLE_SIZE-1)) != 0)
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panic("initarm: Failed to align the kernel page directory");
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/*
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* Allocate a page for the system page mapped to V0x00000000
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* This page will just contain the system vectors and can be
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* shared by all processes.
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*/
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alloc_pages(systempage.pv_pa, 1);
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/* Allocate a page for the page table to map kernel page tables. */
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valloc_pages(kernel_ptpt, L2_TABLE_SIZE / PAGE_SIZE);
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/* Allocate stacks for all modes */
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valloc_pages(irqstack, IRQ_STACK_SIZE);
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valloc_pages(abtstack, ABT_STACK_SIZE);
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valloc_pages(undstack, UND_STACK_SIZE);
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valloc_pages(kernelstack, UPAGES);
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/* Allocate enough pages for cleaning the Mini-Data cache. */
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KASSERT(xscale_minidata_clean_size <= PAGE_SIZE);
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valloc_pages(minidataclean, 1);
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#ifdef VERBOSE_INIT_ARM
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printf("IRQ stack: p0x%08lx v0x%08lx\n", irqstack.pv_pa,
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irqstack.pv_va);
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printf("ABT stack: p0x%08lx v0x%08lx\n", abtstack.pv_pa,
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abtstack.pv_va);
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printf("UND stack: p0x%08lx v0x%08lx\n", undstack.pv_pa,
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undstack.pv_va);
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printf("SVC stack: p0x%08lx v0x%08lx\n", kernelstack.pv_pa,
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kernelstack.pv_va);
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#endif
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/*
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* XXX Defer this to later so that we can reclaim the memory
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* XXX used by the RedBoot page tables.
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*/
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alloc_pages(msgbufphys, round_page(MSGBUFSIZE) / PAGE_SIZE);
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/*
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* Ok we have allocated physical pages for the primary kernel
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* page tables
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*/
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#ifdef VERBOSE_INIT_ARM
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printf("Creating L1 page table at 0x%08lx\n", kernel_l1pt.pv_pa);
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#endif
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/*
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* Now we start construction of the L1 page table
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* We start by mapping the L2 page tables into the L1.
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* This means that we can replace L1 mappings later on if necessary
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*/
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l1pagetable = kernel_l1pt.pv_pa;
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/* Map the L2 pages tables in the L1 page table */
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pmap_link_l2pt(l1pagetable, 0x00000000,
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&kernel_pt_table[KERNEL_PT_SYS]);
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for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++)
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pmap_link_l2pt(l1pagetable, KERNEL_BASE + loop * 0x00400000,
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&kernel_pt_table[KERNEL_PT_KERNEL + loop]);
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pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
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&kernel_pt_table[KERNEL_PT_IOPXS]);
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for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
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pmap_link_l2pt(l1pagetable, KERNEL_VM_BASE + loop * 0x00400000,
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&kernel_pt_table[KERNEL_PT_VMDATA + loop]);
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pmap_link_l2pt(l1pagetable, PTE_BASE, &kernel_ptpt);
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/* update the top of the kernel VM */
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pmap_curmaxkvaddr =
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KERNEL_VM_BASE + (KERNEL_PT_VMDATA_NUM * 0x00400000);
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#ifdef VERBOSE_INIT_ARM
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printf("Mapping kernel\n");
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#endif
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/* Now we fill in the L2 pagetable for the kernel static code/data */
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{
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extern char etext[], _end[];
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size_t textsize = (uintptr_t) etext - KERNEL_TEXT_BASE;
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size_t totalsize = (uintptr_t) _end - KERNEL_TEXT_BASE;
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u_int logical;
|
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textsize = (textsize + PGOFSET) & ~PGOFSET;
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totalsize = (totalsize + PGOFSET) & ~PGOFSET;
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logical = 0x00200000; /* offset of kernel in RAM */
|
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logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
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physical_start + logical, textsize,
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
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logical += pmap_map_chunk(l1pagetable, KERNEL_BASE + logical,
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physical_start + logical, totalsize - textsize,
|
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VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
}
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("Constructing L2 page tables\n");
|
||||
#endif
|
||||
|
||||
/* Map the stack pages */
|
||||
pmap_map_chunk(l1pagetable, irqstack.pv_va, irqstack.pv_pa,
|
||||
IRQ_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_chunk(l1pagetable, abtstack.pv_va, abtstack.pv_pa,
|
||||
ABT_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_chunk(l1pagetable, undstack.pv_va, undstack.pv_pa,
|
||||
UND_STACK_SIZE * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
pmap_map_chunk(l1pagetable, kernelstack.pv_va, kernelstack.pv_pa,
|
||||
UPAGES * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
|
||||
L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
|
||||
for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
|
||||
pmap_map_chunk(l1pagetable, kernel_pt_table[loop].pv_va,
|
||||
kernel_pt_table[loop].pv_pa, L2_TABLE_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
}
|
||||
#endif
|
||||
|
||||
/* Map the Mini-Data cache clean area. */
|
||||
xscale_setup_minidata(l1pagetable, minidataclean.pv_va,
|
||||
minidataclean.pv_pa);
|
||||
|
||||
/* Map the page table that maps the kernel pages */
|
||||
pmap_map_entry(l1pagetable, kernel_ptpt.pv_va, kernel_ptpt.pv_pa,
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
#else
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Map entries in the page table used to map PTE's
|
||||
* Basically every kernel page table gets mapped here
|
||||
*/
|
||||
/* The -2 is slightly bogus, it should be -log2(sizeof(pt_entry_t)) */
|
||||
for (loop = 0; loop < KERNEL_PT_KERNEL_NUM; loop++) {
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_KERNEL + loop].pv_pa,
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
#else
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
#endif
|
||||
}
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (PTE_BASE >> (PGSHIFT-2)),
|
||||
#ifndef ARM32_PMAP_NEW
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
#else
|
||||
kernel_ptpt.pv_pa, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
|
||||
#endif
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + (0x00000000 >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_SYS].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
for (loop = 0; loop < KERNEL_PT_VMDATA_NUM; loop++)
|
||||
pmap_map_entry(l1pagetable,
|
||||
PTE_BASE + ((KERNEL_VM_BASE +
|
||||
(loop * 0x00400000)) >> (PGSHIFT-2)),
|
||||
kernel_pt_table[KERNEL_PT_VMDATA + loop].pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
/* Map the vector page. */
|
||||
pmap_map_entry(l1pagetable, vector_page, systempage.pv_pa,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
|
||||
|
||||
/*
|
||||
* Map devices we can map w/ section mappings.
|
||||
*/
|
||||
loop = 0;
|
||||
while (l1_sec_table[loop].size) {
|
||||
vm_size_t sz;
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("%08lx -> %08lx @ %08lx\n", l1_sec_table[loop].pa,
|
||||
l1_sec_table[loop].pa + l1_sec_table[loop].size - 1,
|
||||
l1_sec_table[loop].va);
|
||||
#endif
|
||||
for (sz = 0; sz < l1_sec_table[loop].size; sz += L1_S_SIZE)
|
||||
pmap_map_section(l1pagetable,
|
||||
l1_sec_table[loop].va + sz,
|
||||
l1_sec_table[loop].pa + sz,
|
||||
l1_sec_table[loop].prot,
|
||||
l1_sec_table[loop].cache);
|
||||
++loop;
|
||||
}
|
||||
|
||||
/*
|
||||
* Map the PCI I/O spaces and i80321 registers. These are too
|
||||
* small to be mapped w/ section mappings.
|
||||
*/
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("Mapping IOW 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
||||
VERDE_OUT_XLATE_IO_WIN0_BASE,
|
||||
VERDE_OUT_XLATE_IO_WIN0_BASE + VERDE_OUT_XLATE_IO_WIN_SIZE - 1,
|
||||
IQ80321_IOW_VBASE);
|
||||
#endif
|
||||
pmap_map_chunk(l1pagetable, IQ80321_IOW_VBASE,
|
||||
VERDE_OUT_XLATE_IO_WIN0_BASE, VERDE_OUT_XLATE_IO_WIN_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("Mapping 80321 0x%08lx -> 0x%08lx @ 0x%08lx\n",
|
||||
VERDE_PMMR_BASE,
|
||||
VERDE_PMMR_BASE + VERDE_PMMR_SIZE - 1,
|
||||
IQ80321_80321_VBASE);
|
||||
#endif
|
||||
pmap_map_chunk(l1pagetable, IQ80321_80321_VBASE,
|
||||
VERDE_PMMR_BASE, VERDE_PMMR_SIZE,
|
||||
VM_PROT_READ|VM_PROT_WRITE, PTE_NOCACHE);
|
||||
|
||||
/*
|
||||
* Give the XScale global cache clean code an appropriately
|
||||
@ -355,12 +723,112 @@ initarm(void *arg)
|
||||
xscale_cache_clean_addr = 0xff000000U;
|
||||
|
||||
/*
|
||||
* Now bootstrap the VM system
|
||||
* Now we have the real page tables in place so we can switch to them.
|
||||
* Once this is done we will be running with the REAL kernel page
|
||||
* tables.
|
||||
*/
|
||||
kstack = initarm_common(&iq80321_bootconf);
|
||||
|
||||
/*
|
||||
* Update the physical_freestart/physical_freeend/free_pages
|
||||
* variables.
|
||||
*/
|
||||
{
|
||||
extern char _end[];
|
||||
|
||||
physical_freestart = physical_start +
|
||||
(((((uintptr_t) _end) + PGOFSET) & ~PGOFSET) -
|
||||
KERNEL_BASE);
|
||||
physical_freeend = physical_end;
|
||||
free_pages =
|
||||
(physical_freeend - physical_freestart) / PAGE_SIZE;
|
||||
}
|
||||
|
||||
/* Switch tables */
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("freestart = 0x%08lx, free_pages = %d (0x%x)\n",
|
||||
physical_freestart, free_pages, free_pages);
|
||||
printf("switching to new L1 page table @%#lx...", kernel_l1pt.pv_pa);
|
||||
#endif
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
|
||||
#endif
|
||||
setttb(kernel_l1pt.pv_pa);
|
||||
cpu_tlb_flushID();
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
|
||||
|
||||
/*
|
||||
* Moved from cpu_startup() as data_abort_handler() references
|
||||
* this during uvm init
|
||||
*/
|
||||
proc0paddr = (struct user *)kernelstack.pv_va;
|
||||
lwp0.l_addr = proc0paddr;
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("done!\n");
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("bootstrap done.\n");
|
||||
#endif
|
||||
|
||||
arm32_vector_init(ARM_VECTORS_LOW, ARM_VEC_ALL);
|
||||
|
||||
/*
|
||||
* Pages were allocated during the secondary bootstrap for the
|
||||
* stacks for different CPU modes.
|
||||
* We must now set the r13 registers in the different CPU modes to
|
||||
* point to these stacks.
|
||||
* Since the ARM stacks use STMFD etc. we must set r13 to the top end
|
||||
* of the stack memory.
|
||||
*/
|
||||
printf("init subsystems: stacks ");
|
||||
|
||||
set_stackptr(PSR_IRQ32_MODE,
|
||||
irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
|
||||
set_stackptr(PSR_ABT32_MODE,
|
||||
abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
|
||||
set_stackptr(PSR_UND32_MODE,
|
||||
undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
|
||||
|
||||
/*
|
||||
* Well we should set a data abort handler.
|
||||
* Once things get going this will change as we will need a proper
|
||||
* handler.
|
||||
* Until then we will use a handler that just panics but tells us
|
||||
* why.
|
||||
* Initialisation of the vectors will just panic on a data abort.
|
||||
* This just fills in a slighly better one.
|
||||
*/
|
||||
printf("vectors ");
|
||||
data_abort_handler_address = (u_int)data_abort_handler;
|
||||
prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
|
||||
undefined_handler_address = (u_int)undefinedinstruction_bounce;
|
||||
|
||||
/* Initialise the undefined instruction handlers */
|
||||
printf("undefined ");
|
||||
undefined_init();
|
||||
|
||||
/* Load memory into UVM. */
|
||||
printf("page ");
|
||||
uvm_setpagesize(); /* initialize PAGE_SIZE-dependent variables */
|
||||
uvm_page_physload(atop(physical_freestart), atop(physical_freeend),
|
||||
atop(physical_freestart), atop(physical_freeend),
|
||||
VM_FREELIST_DEFAULT);
|
||||
|
||||
/* Boot strap pmap telling it where the kernel page table is */
|
||||
printf("pmap ");
|
||||
#ifdef ARM32_PMAP_NEW
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va);
|
||||
#else
|
||||
pmap_bootstrap((pd_entry_t *)kernel_l1pt.pv_va, kernel_ptpt);
|
||||
#endif
|
||||
|
||||
/* Setup the IRQ system */
|
||||
printf("irq ");
|
||||
i80321_intr_init();
|
||||
printf("done.\n");
|
||||
|
||||
#ifdef IPKDB
|
||||
/* Initialise ipkdb */
|
||||
@ -380,7 +848,7 @@ initarm(void *arg)
|
||||
#endif
|
||||
|
||||
/* We return the new stack pointer address */
|
||||
return (kstack);
|
||||
return(kernelstack.pv_va + USPACE_SVC_STACK_TOP);
|
||||
}
|
||||
|
||||
void
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: iq80321reg.h,v 1.2 2003/04/18 12:01:33 scw Exp $ */
|
||||
/* $NetBSD: iq80321reg.h,v 1.3 2003/04/19 08:18:13 scw Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002 Wasabi Systems, Inc.
|
||||
@ -81,7 +81,6 @@
|
||||
#define IQ80321_IOW_VBASE IQ80321_IOPXS_VBASE
|
||||
#define IQ80321_80321_VBASE (IQ80321_IOW_VBASE + \
|
||||
VERDE_OUT_XLATE_IO_WIN_SIZE)
|
||||
#define IQ80321_IOPXS_VSIZE 0x00500000 /* 5MB total size */
|
||||
|
||||
/*
|
||||
* The IQ80321 on-board devices are mapped VA==PA during bootstrap.
|
||||
|
||||
Loading…
Reference in New Issue
Block a user