Add support for the Intel IQ31244 reference board, based on the i80321
I/O processor and the i31244 PCI-X S-ATA controller. The IQ31244 is almost identical to the IQ80321, from software's perspective, so we share much of the code.
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197
sys/arch/evbarm/conf/IQ31244
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197
sys/arch/evbarm/conf/IQ31244
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# $NetBSD: IQ31244,v 1.1 2003/05/14 21:41:31 thorpej Exp $
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#
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# IQ31244 -- Intel IQ31244 Evaluation Board Kernel
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#
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include "arch/evbarm/conf/std.iq31244"
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#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
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# estimated number of users
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maxusers 32
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# Standard system options
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options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
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#options NTP # NTP phase/frequency locked loop
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# CPU options
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# For XScale systems
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options CPU_XSCALE_80321 # Support the XScale core
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makeoptions COPTS="-O2 -mcpu=xscale"
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# Architecture options
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options XSCALE_CACHE_READ_WRITE_ALLOCATE
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#options HZ=512
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# File systems
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file-system FFS # UFS
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file-system LFS # log-structured file system
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file-system MFS # memory file system
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file-system NFS # Network file system
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#file-system ADOSFS # AmigaDOS-compatible file system
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#file-system EXT2FS # second extended file system (linux)
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#file-system CD9660 # ISO 9660 + Rock Ridge file system
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#file-system MSDOSFS # MS-DOS file system
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file-system FDESC # /dev/fd
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file-system KERNFS # /kern
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file-system NULLFS # loopback file system
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#file-system PORTAL # portal filesystem (still experimental)
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file-system PROCFS # /proc
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#file-system UMAPFS # NULLFS + uid and gid remapping
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#file-system UNION # union file system
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# File system options
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#options QUOTA # UFS quotas
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#options FFS_EI # FFS Endian Independant support
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options NFSSERVER
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options SOFTDEP
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# Networking options
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#options GATEWAY # packet forwarding
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options INET # IP + ICMP + TCP + UDP
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options INET6 # IPV6
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#options IPSEC # IP security
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#options IPSEC_ESP # IP security (encryption part; define w/ IPSEC)
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#options IPSEC_DEBUG # debug for IP security
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#options MROUTING # IP multicast routing
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#options NS # XNS
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#options NSIP # XNS tunneling over IP
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#options ISO,TPIP # OSI
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#options EON # OSI tunneling over IP
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#options CCITT,LLC,HDLC # X.25
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#options NETATALK # AppleTalk networking
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#options PFIL_HOOKS # pfil(9) packet filter hooks
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#options PPP_BSDCOMP # BSD-Compress compression support for PPP
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#options PPP_DEFLATE # Deflate compression support for PPP
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#options PPP_FILTER # Active filter support for PPP (requires bpf)
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#options TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG
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options NFS_BOOT_BOOTP
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options NFS_BOOT_DHCP
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#options NFS_BOOT_BOOTPARAM
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# Compatibility options
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#options COMPAT_43 # 4.3BSD compatibility.
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options COMPAT_15 # NetBSD 1.5 compatibility.
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options COMPAT_14 # NetBSD 1.4 compatibility.
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#options COMPAT_13 # NetBSD 1.3 compatibility.
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#options COMPAT_12 # NetBSD 1.2 compatibility.
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#options COMPAT_11 # NetBSD 1.1 compatibility.
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#options COMPAT_10 # NetBSD 1.0 compatibility.
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#options COMPAT_09 # NetBSD 0.9 compatibility.
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#options TCP_COMPAT_42 # 4.2BSD TCP/IP bug compat. Not recommended.
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# Shared memory options
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options SYSVMSG # System V-like message queues
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options SYSVSEM # System V-like semaphores
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#options SEMMNI=10 # number of semaphore identifiers
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#options SEMMNS=60 # number of semaphores in system
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#options SEMUME=10 # max number of undo entries per process
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#options SEMMNU=30 # number of undo structures in system
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options SYSVSHM # System V-like memory sharing
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options SHMMAXPGS=1024 # 1024 pages is the default
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# Device options
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#options MEMORY_DISK_HOOKS # boottime setup of ramdisk
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#options MEMORY_DISK_ROOT_SIZE=3400 # Size in blocks
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#options MEMORY_DISK_IS_ROOT # use memory disk as root
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# Console options. The default console is speed is 115200 baud.
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options CONSPEED=9600 # Console speed
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# Miscellaneous kernel options
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options KTRACE # system call tracing, a la ktrace(1)
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options IRQSTATS # manage IRQ statistics
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#options LKM # loadable kernel modules
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#options KMEMSTATS # kernel memory statistics
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#options SCSIVERBOSE # Verbose SCSI errors
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options PCIVERBOSE # Verbose PCI descriptions
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options MIIVERBOSE # Verbose MII autoconfuration messages
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#options PCI_CONFIG_DUMP # verbosely dump PCI config space
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#options DDB_KEYCODE=0x40
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options USERCONF # userconf(4) support
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#options PIPE_SOCKETPAIR # smaller, but slower pipe(2)
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# Development and Debugging options
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options PERFCTRS # performance counters
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options DIAGNOSTIC # internally consistency checks
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#options DEBUG
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#options PMAP_DEBUG # Enable pmap_debug_level code
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#options IPKDB # remote kernel debugging
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#options VERBOSE_INIT_ARM # verbose bootstraping messages
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options DDB # in-kernel debugger
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options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
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makeoptions DEBUG="-g" # compile full symbol table
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options SYMTAB_SPACE=200000
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config netbsd root on ? type ?
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config netbsd-wm0 root on wm0 type nfs
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# The main bus device
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mainbus0 at root
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# The boot cpu
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cpu0 at mainbus?
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# On-board device support
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obio* at mainbus?
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com0 at obio? addr 0xfe800000 xint 1 # on-board TI 165C50 UART
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# i80321 I/O Processor peripheral support
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iopxs* at mainbus?
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iopaau* at iopxs? # Application Accelerator Unit
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iopwdog* at iopxs? # Watchdog timer
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pci0 at iopxs? bus ? # PCI/PCI-X support
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# PCI-PCI bridges
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ppb* at pci? dev ? function ?
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pci* at ppb? bus ?
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#
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# Storage devices
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#
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pciide* at pci? dev ? function ? # Intel i31244 S-ATA
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wd* at pciide? channel ? drive ? flags 0x0000
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#
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# Networking devices
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#
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# PCI network devices
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fxp* at pci? dev ? function ? # Intel i8255x 10/100 Ethernet
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wm* at pci? dev ? function ? # Intel i82544 Gig-E
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# MII/PHY support
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inphy* at mii? phy ? # Intel i82555 10/100 PHYs
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makphy* at mii? phy ? # Marvell 88E1000 PHYs
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ukphy* at mii? phy ? # Generic IEEE 802.3u PHYs
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# Pseudo-Devices
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# disk/mass storage pseudo-devices
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#pseudo-device md 1 # memory disk device (ramdisk)
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pseudo-device vnd 4 # disk-like interface to files
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# network pseudo-devices
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pseudo-device bpfilter 4 # Berkeley packet filter
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pseudo-device loop # network loopback
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pseudo-device kttcp # network loopback
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# miscellaneous pseudo-devices
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pseudo-device pty # pseudo-terminals
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pseudo-device rnd # /dev/random and in-kernel generator
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pseudo-device clockctl # user control of clock subsystem
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# data mover pseudo-devices
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#pseudo-device swdmover # softare dmover(9) back-end
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pseudo-device dmoverio # /dev/dmover dmover(9) interface
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31
sys/arch/evbarm/conf/files.iq31244
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31
sys/arch/evbarm/conf/files.iq31244
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# $NetBSD: files.iq31244,v 1.1 2003/05/14 21:41:31 thorpej Exp $
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#
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# Intel IQ31244 reference board configuration info
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#
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# Use the generic ARM soft interrupt code.
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file arch/arm/arm/softintr.c
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# Use the shared initarm_common() code.
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# XXX: Not yet ready for prime-time
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#file arch/evbarm/evbarm/initarm_common.c
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file arch/evbarm/iq31244/iq31244_7seg.c
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file arch/evbarm/iq80321/iq80321_machdep.c
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file arch/evbarm/iq31244/iq31244_pci.c
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# IQ31244 on-board devices
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device obio {addr, [xint = -1]}: bus_space_generic
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attach obio at mainbus
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file arch/evbarm/iq80321/obio.c obio
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file arch/evbarm/iq80321/obio_space.c obio
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# on-board TI 165C50 UART
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attach com at obio with com_obio
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file arch/evbarm/iq80321/com_obio.c com_obio
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# i80321 I/O Processor CPU support
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include "arch/arm/xscale/files.i80321"
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attach iopxs at mainbus with iopxs_mainbus
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file arch/evbarm/iq80321/i80321_mainbus.c iopxs_mainbus
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27
sys/arch/evbarm/conf/std.iq31244
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27
sys/arch/evbarm/conf/std.iq31244
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# $NetBSD: std.iq31244,v 1.1 2003/05/14 21:41:32 thorpej Exp $
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#
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# standard NetBSD/evbarm for IQ31244 options
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machine evbarm arm
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# Pull in IQ31244 config definitions.
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include "arch/evbarm/conf/files.iq31244"
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options EXEC_ELF32
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options EXEC_AOUT
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options EXEC_SCRIPT
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# To support easy transit to ../arch/arm/arm32
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options ARM32
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# New pmap options are standard on this board
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options ARM32_PMAP_NEW
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#options ARM32_NEW_VM_LAYOUT # Not yet ready for prime-time
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makeoptions BOARDTYPE="iq31244"
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makeoptions BOARDMKFRAG="${THISARM}/conf/mk.iq80321"
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options ARM_INTR_IMPL="<arch/arm/xscale/i80321_intr.h>"
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# We need to configure the PCI bus.
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options PCI_NETBSD_CONFIGURE
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8
sys/arch/evbarm/iq31244/README
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sys/arch/evbarm/iq31244/README
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$NetBSD: README,v 1.1 2003/05/14 21:41:34 thorpej Exp $
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The IQ31244 ("Red Canyon") is a reference board based around the
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i80321 I/O processor and i31244 S-ATA controller.
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To software, it is very similar to the IQ80321 eval board. As such, we
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share almost all of the IQ80321 code, and name our functions in a way
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compatible with the IQ80321 code.
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339
sys/arch/evbarm/iq31244/iq31244_7seg.c
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sys/arch/evbarm/iq31244/iq31244_7seg.c
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/* $NetBSD: iq31244_7seg.c,v 1.1 2003/05/14 21:41:34 thorpej Exp $ */
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/*
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* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Support for the 7-segment display on the Intel IQ31244.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <machine/bus.h>
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#include <evbarm/iq80321/iq80321reg.h>
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#include <evbarm/iq80321/iq80321var.h>
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#define WRITE(x, v) *((__volatile uint8_t *) (x)) = (v)
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static int snakestate;
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/*
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* The 7-segment display looks like so:
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*
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* A
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* +-----+
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* | |
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* F | | B
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* | G |
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* +-----+
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* | |
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* E | | C
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* | D |
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* +-----+ o DP
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*
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* Setting a bit clears the corresponding segment on the
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* display.
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*/
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#define SEG_A (1 << 0)
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#define SEG_B (1 << 1)
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#define SEG_C (1 << 2)
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#define SEG_D (1 << 3)
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#define SEG_E (1 << 4)
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#define SEG_F (1 << 5)
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#define SEG_G (1 << 6)
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#define SEG_DP (1 << 7)
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static const uint8_t digitmap[] = {
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/* +#####+
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* # #
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* # #
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* # #
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* +-----+
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* # #
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* # #
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* # #
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* +#####+
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*/
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SEG_G,
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/* +-----+
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* | #
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* | #
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* | #
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* +-----+
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* | #
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* | #
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* | #
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* +-----+
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*/
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SEG_A|SEG_D|SEG_E|SEG_F|SEG_G,
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/* +#####+
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* | #
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* | #
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* | #
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* +#####+
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* # |
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* # |
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* # |
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* +#####+
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*/
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SEG_C|SEG_F,
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/* +#####+
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* | #
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* | #
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* | #
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* +#####+
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* | #
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* | #
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* | #
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* +#####+
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*/
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SEG_E|SEG_F,
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/* +-----+
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* # #
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* # #
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* # #
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* +#####+
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* | #
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* | #
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* | #
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* +-----+
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*/
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SEG_A|SEG_D|SEG_E,
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/* +#####+
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* # |
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* # |
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* # |
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* +#####+
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* | #
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* | #
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* | #
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* +#####+
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*/
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SEG_B|SEG_E,
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/* +#####+
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* # |
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* # |
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* # |
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* +#####+
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* # #
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* # #
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* # #
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* +#####+
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*/
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SEG_B,
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/* +#####+
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* | #
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* | #
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* | #
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* +-----+
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* | #
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* | #
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* | #
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* +-----+
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*/
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SEG_D|SEG_E|SEG_F,
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/* +#####+
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* # #
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* # #
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* # #
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* +#####+
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* # #
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* # #
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* # #
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* +#####+
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*/
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0,
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/* +#####+
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* # #
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* # #
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* # #
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* +#####+
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* | #
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* | #
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* | #
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* +-----+
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*/
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SEG_D|SEG_E,
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};
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static uint8_t
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iq80321_7seg_xlate(char c)
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{
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uint8_t rv;
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if (c >= '0' && c <= '9')
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rv = digitmap[c - '0'];
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else if (c == '.')
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rv = (uint8_t) ~SEG_DP;
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else
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rv = 0xff;
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return (rv);
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}
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void
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iq80321_7seg(char a, char b)
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{
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uint8_t msb, lsb;
|
||||
|
||||
msb = iq80321_7seg_xlate(a);
|
||||
lsb = iq80321_7seg_xlate(b);
|
||||
|
||||
snakestate = 0;
|
||||
|
||||
WRITE(IQ80321_7SEG_MSB, msb);
|
||||
WRITE(IQ80321_7SEG_LSB, lsb);
|
||||
}
|
||||
|
||||
static const uint8_t snakemap[][2] = {
|
||||
|
||||
/* +#####+ +#####+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_A, ~SEG_A },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* # | | #
|
||||
* # | | #
|
||||
* # | | #
|
||||
* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_F, ~SEG_B },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +#####+ +#####+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_G, ~SEG_G },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
* | # # |
|
||||
* | # # |
|
||||
* | # # |
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_C, ~SEG_E },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +#####+ +#####+
|
||||
*/
|
||||
{ ~SEG_D, ~SEG_D },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
* # | | #
|
||||
* # | | #
|
||||
* # | | #
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_E, ~SEG_C },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +#####+ +#####+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_G, ~SEG_G },
|
||||
|
||||
/* +-----+ +-----+
|
||||
* | # # |
|
||||
* | # # |
|
||||
* | # # |
|
||||
* +-----+ +-----+
|
||||
* | | | |
|
||||
* | | | |
|
||||
* | | | |
|
||||
* +-----+ +-----+
|
||||
*/
|
||||
{ ~SEG_B, ~SEG_F },
|
||||
};
|
||||
|
||||
void
|
||||
iq80321_7seg_snake(void)
|
||||
{
|
||||
int cur = snakestate;
|
||||
|
||||
WRITE(IQ80321_7SEG_MSB, snakemap[cur][0]);
|
||||
WRITE(IQ80321_7SEG_LSB, snakemap[cur][1]);
|
||||
|
||||
snakestate = (cur + 1) & 7;
|
||||
}
|
155
sys/arch/evbarm/iq31244/iq31244_pci.c
Normal file
155
sys/arch/evbarm/iq31244/iq31244_pci.c
Normal file
@ -0,0 +1,155 @@
|
||||
/* $NetBSD: iq31244_pci.c,v 1.1 2003/05/14 21:41:34 thorpej Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed for the NetBSD Project by
|
||||
* Wasabi Systems, Inc.
|
||||
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
|
||||
* or promote products derived from this software without specific prior
|
||||
* written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
/*
|
||||
* IQ31244 PCI interrupt support.
|
||||
*/
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
#include <sys/device.h>
|
||||
|
||||
#include <machine/autoconf.h>
|
||||
#include <machine/bus.h>
|
||||
|
||||
#include <evbarm/iq80321/iq80321reg.h>
|
||||
#include <evbarm/iq80321/iq80321var.h>
|
||||
|
||||
#include <arm/xscale/i80321reg.h>
|
||||
#include <arm/xscale/i80321var.h>
|
||||
|
||||
#include <dev/pci/pcidevs.h>
|
||||
#include <dev/pci/ppbreg.h>
|
||||
|
||||
int iq80321_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
|
||||
const char *iq80321_pci_intr_string(void *, pci_intr_handle_t);
|
||||
const struct evcnt *iq80321_pci_intr_evcnt(void *, pci_intr_handle_t);
|
||||
void *iq80321_pci_intr_establish(void *, pci_intr_handle_t,
|
||||
int, int (*func)(void *), void *);
|
||||
void iq80321_pci_intr_disestablish(void *, void *);
|
||||
|
||||
void
|
||||
iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
|
||||
{
|
||||
|
||||
pc->pc_intr_v = cookie; /* the i80321 softc */
|
||||
pc->pc_intr_map = iq80321_pci_intr_map;
|
||||
pc->pc_intr_string = iq80321_pci_intr_string;
|
||||
pc->pc_intr_evcnt = iq80321_pci_intr_evcnt;
|
||||
pc->pc_intr_establish = iq80321_pci_intr_establish;
|
||||
pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;
|
||||
}
|
||||
|
||||
int
|
||||
iq80321_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
|
||||
{
|
||||
struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
|
||||
int b, d, f;
|
||||
uint32_t busno;
|
||||
|
||||
busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
|
||||
busno = PCIXSR_BUSNO(busno);
|
||||
if (busno == 0xff)
|
||||
busno = 0;
|
||||
|
||||
pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
|
||||
|
||||
/* No mappings for devices not on our bus. */
|
||||
if (b != busno)
|
||||
goto no_mapping;
|
||||
|
||||
switch (d) {
|
||||
case 1: /* PCIX-PCIX bridge */
|
||||
/*
|
||||
* The S-ATA chips are behind the bridge, and all of
|
||||
* the S-ATA interrupts are wired together.
|
||||
*/
|
||||
*ihp = ICU_INT_XINT(2);
|
||||
return (0);
|
||||
|
||||
case 2: /* PCI slot */
|
||||
/* All pins are wired together. */
|
||||
*ihp = ICU_INT_XINT(3);
|
||||
return (0);
|
||||
|
||||
case 3: /* i82546 dual Gig-E */
|
||||
if (pa->pa_intrpin == 1 || pa->pa_intrpin == 2) {
|
||||
*ihp = ICU_INT_XINT(0);
|
||||
return (0);
|
||||
}
|
||||
goto no_mapping;
|
||||
|
||||
default:
|
||||
no_mapping:
|
||||
printf("iq80321_pci_intr_map: no mapping for %d/%d/%d/%c\n",
|
||||
pa->pa_bus, pa->pa_device, pa->pa_function,
|
||||
'@' + pa->pa_intrpin);
|
||||
return (1);
|
||||
}
|
||||
|
||||
return (0);
|
||||
}
|
||||
|
||||
const char *
|
||||
iq80321_pci_intr_string(void *v, pci_intr_handle_t ih)
|
||||
{
|
||||
|
||||
return (i80321_irqnames[ih]);
|
||||
}
|
||||
|
||||
const struct evcnt *
|
||||
iq80321_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
|
||||
{
|
||||
|
||||
/* XXX For now. */
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
void *
|
||||
iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
|
||||
int (*func)(void *), void *arg)
|
||||
{
|
||||
|
||||
return (i80321_intr_establish(ih, ipl, func, arg));
|
||||
}
|
||||
|
||||
void
|
||||
iq80321_pci_intr_disestablish(void *v, void *cookie)
|
||||
{
|
||||
|
||||
i80321_intr_disestablish(cookie);
|
||||
}
|
Loading…
Reference in New Issue
Block a user