Add support for the Intel IQ31244 reference board, based on the i80321

I/O processor and the i31244 PCI-X S-ATA controller.

The IQ31244 is almost identical to the IQ80321, from software's
perspective, so we share much of the code.
This commit is contained in:
thorpej 2003-05-14 21:41:31 +00:00
parent 182de37049
commit 5b9c2e6257
6 changed files with 757 additions and 0 deletions

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# $NetBSD: IQ31244,v 1.1 2003/05/14 21:41:31 thorpej Exp $
#
# IQ31244 -- Intel IQ31244 Evaluation Board Kernel
#
include "arch/evbarm/conf/std.iq31244"
#options INCLUDE_CONFIG_FILE # embed config file in kernel binary
# estimated number of users
maxusers 32
# Standard system options
options RTC_OFFSET=0 # hardware clock is this many mins. west of GMT
#options NTP # NTP phase/frequency locked loop
# CPU options
# For XScale systems
options CPU_XSCALE_80321 # Support the XScale core
makeoptions COPTS="-O2 -mcpu=xscale"
# Architecture options
options XSCALE_CACHE_READ_WRITE_ALLOCATE
#options HZ=512
# File systems
file-system FFS # UFS
file-system LFS # log-structured file system
file-system MFS # memory file system
file-system NFS # Network file system
#file-system ADOSFS # AmigaDOS-compatible file system
#file-system EXT2FS # second extended file system (linux)
#file-system CD9660 # ISO 9660 + Rock Ridge file system
#file-system MSDOSFS # MS-DOS file system
file-system FDESC # /dev/fd
file-system KERNFS # /kern
file-system NULLFS # loopback file system
#file-system PORTAL # portal filesystem (still experimental)
file-system PROCFS # /proc
#file-system UMAPFS # NULLFS + uid and gid remapping
#file-system UNION # union file system
# File system options
#options QUOTA # UFS quotas
#options FFS_EI # FFS Endian Independant support
options NFSSERVER
options SOFTDEP
# Networking options
#options GATEWAY # packet forwarding
options INET # IP + ICMP + TCP + UDP
options INET6 # IPV6
#options IPSEC # IP security
#options IPSEC_ESP # IP security (encryption part; define w/ IPSEC)
#options IPSEC_DEBUG # debug for IP security
#options MROUTING # IP multicast routing
#options NS # XNS
#options NSIP # XNS tunneling over IP
#options ISO,TPIP # OSI
#options EON # OSI tunneling over IP
#options CCITT,LLC,HDLC # X.25
#options NETATALK # AppleTalk networking
#options PFIL_HOOKS # pfil(9) packet filter hooks
#options PPP_BSDCOMP # BSD-Compress compression support for PPP
#options PPP_DEFLATE # Deflate compression support for PPP
#options PPP_FILTER # Active filter support for PPP (requires bpf)
#options TCP_DEBUG # Record last TCP_NDEBUG packets with SO_DEBUG
options NFS_BOOT_BOOTP
options NFS_BOOT_DHCP
#options NFS_BOOT_BOOTPARAM
# Compatibility options
#options COMPAT_43 # 4.3BSD compatibility.
options COMPAT_15 # NetBSD 1.5 compatibility.
options COMPAT_14 # NetBSD 1.4 compatibility.
#options COMPAT_13 # NetBSD 1.3 compatibility.
#options COMPAT_12 # NetBSD 1.2 compatibility.
#options COMPAT_11 # NetBSD 1.1 compatibility.
#options COMPAT_10 # NetBSD 1.0 compatibility.
#options COMPAT_09 # NetBSD 0.9 compatibility.
#options TCP_COMPAT_42 # 4.2BSD TCP/IP bug compat. Not recommended.
# Shared memory options
options SYSVMSG # System V-like message queues
options SYSVSEM # System V-like semaphores
#options SEMMNI=10 # number of semaphore identifiers
#options SEMMNS=60 # number of semaphores in system
#options SEMUME=10 # max number of undo entries per process
#options SEMMNU=30 # number of undo structures in system
options SYSVSHM # System V-like memory sharing
options SHMMAXPGS=1024 # 1024 pages is the default
# Device options
#options MEMORY_DISK_HOOKS # boottime setup of ramdisk
#options MEMORY_DISK_ROOT_SIZE=3400 # Size in blocks
#options MEMORY_DISK_IS_ROOT # use memory disk as root
# Console options. The default console is speed is 115200 baud.
options CONSPEED=9600 # Console speed
# Miscellaneous kernel options
options KTRACE # system call tracing, a la ktrace(1)
options IRQSTATS # manage IRQ statistics
#options LKM # loadable kernel modules
#options KMEMSTATS # kernel memory statistics
#options SCSIVERBOSE # Verbose SCSI errors
options PCIVERBOSE # Verbose PCI descriptions
options MIIVERBOSE # Verbose MII autoconfuration messages
#options PCI_CONFIG_DUMP # verbosely dump PCI config space
#options DDB_KEYCODE=0x40
options USERCONF # userconf(4) support
#options PIPE_SOCKETPAIR # smaller, but slower pipe(2)
# Development and Debugging options
options PERFCTRS # performance counters
options DIAGNOSTIC # internally consistency checks
#options DEBUG
#options PMAP_DEBUG # Enable pmap_debug_level code
#options IPKDB # remote kernel debugging
#options VERBOSE_INIT_ARM # verbose bootstraping messages
options DDB # in-kernel debugger
options DDB_HISTORY_SIZE=100 # Enable history editing in DDB
makeoptions DEBUG="-g" # compile full symbol table
options SYMTAB_SPACE=200000
config netbsd root on ? type ?
config netbsd-wm0 root on wm0 type nfs
# The main bus device
mainbus0 at root
# The boot cpu
cpu0 at mainbus?
# On-board device support
obio* at mainbus?
com0 at obio? addr 0xfe800000 xint 1 # on-board TI 165C50 UART
# i80321 I/O Processor peripheral support
iopxs* at mainbus?
iopaau* at iopxs? # Application Accelerator Unit
iopwdog* at iopxs? # Watchdog timer
pci0 at iopxs? bus ? # PCI/PCI-X support
# PCI-PCI bridges
ppb* at pci? dev ? function ?
pci* at ppb? bus ?
#
# Storage devices
#
pciide* at pci? dev ? function ? # Intel i31244 S-ATA
wd* at pciide? channel ? drive ? flags 0x0000
#
# Networking devices
#
# PCI network devices
fxp* at pci? dev ? function ? # Intel i8255x 10/100 Ethernet
wm* at pci? dev ? function ? # Intel i82544 Gig-E
# MII/PHY support
inphy* at mii? phy ? # Intel i82555 10/100 PHYs
makphy* at mii? phy ? # Marvell 88E1000 PHYs
ukphy* at mii? phy ? # Generic IEEE 802.3u PHYs
# Pseudo-Devices
# disk/mass storage pseudo-devices
#pseudo-device md 1 # memory disk device (ramdisk)
pseudo-device vnd 4 # disk-like interface to files
# network pseudo-devices
pseudo-device bpfilter 4 # Berkeley packet filter
pseudo-device loop # network loopback
pseudo-device kttcp # network loopback
# miscellaneous pseudo-devices
pseudo-device pty # pseudo-terminals
pseudo-device rnd # /dev/random and in-kernel generator
pseudo-device clockctl # user control of clock subsystem
# data mover pseudo-devices
#pseudo-device swdmover # softare dmover(9) back-end
pseudo-device dmoverio # /dev/dmover dmover(9) interface

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# $NetBSD: files.iq31244,v 1.1 2003/05/14 21:41:31 thorpej Exp $
#
# Intel IQ31244 reference board configuration info
#
# Use the generic ARM soft interrupt code.
file arch/arm/arm/softintr.c
# Use the shared initarm_common() code.
# XXX: Not yet ready for prime-time
#file arch/evbarm/evbarm/initarm_common.c
file arch/evbarm/iq31244/iq31244_7seg.c
file arch/evbarm/iq80321/iq80321_machdep.c
file arch/evbarm/iq31244/iq31244_pci.c
# IQ31244 on-board devices
device obio {addr, [xint = -1]}: bus_space_generic
attach obio at mainbus
file arch/evbarm/iq80321/obio.c obio
file arch/evbarm/iq80321/obio_space.c obio
# on-board TI 165C50 UART
attach com at obio with com_obio
file arch/evbarm/iq80321/com_obio.c com_obio
# i80321 I/O Processor CPU support
include "arch/arm/xscale/files.i80321"
attach iopxs at mainbus with iopxs_mainbus
file arch/evbarm/iq80321/i80321_mainbus.c iopxs_mainbus

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# $NetBSD: std.iq31244,v 1.1 2003/05/14 21:41:32 thorpej Exp $
#
# standard NetBSD/evbarm for IQ31244 options
machine evbarm arm
# Pull in IQ31244 config definitions.
include "arch/evbarm/conf/files.iq31244"
options EXEC_ELF32
options EXEC_AOUT
options EXEC_SCRIPT
# To support easy transit to ../arch/arm/arm32
options ARM32
# New pmap options are standard on this board
options ARM32_PMAP_NEW
#options ARM32_NEW_VM_LAYOUT # Not yet ready for prime-time
makeoptions BOARDTYPE="iq31244"
makeoptions BOARDMKFRAG="${THISARM}/conf/mk.iq80321"
options ARM_INTR_IMPL="<arch/arm/xscale/i80321_intr.h>"
# We need to configure the PCI bus.
options PCI_NETBSD_CONFIGURE

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$NetBSD: README,v 1.1 2003/05/14 21:41:34 thorpej Exp $
The IQ31244 ("Red Canyon") is a reference board based around the
i80321 I/O processor and i31244 S-ATA controller.
To software, it is very similar to the IQ80321 eval board. As such, we
share almost all of the IQ80321 code, and name our functions in a way
compatible with the IQ80321 code.

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/* $NetBSD: iq31244_7seg.c,v 1.1 2003/05/14 21:41:34 thorpej Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* Support for the 7-segment display on the Intel IQ31244.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <machine/bus.h>
#include <evbarm/iq80321/iq80321reg.h>
#include <evbarm/iq80321/iq80321var.h>
#define WRITE(x, v) *((__volatile uint8_t *) (x)) = (v)
static int snakestate;
/*
* The 7-segment display looks like so:
*
* A
* +-----+
* | |
* F | | B
* | G |
* +-----+
* | |
* E | | C
* | D |
* +-----+ o DP
*
* Setting a bit clears the corresponding segment on the
* display.
*/
#define SEG_A (1 << 0)
#define SEG_B (1 << 1)
#define SEG_C (1 << 2)
#define SEG_D (1 << 3)
#define SEG_E (1 << 4)
#define SEG_F (1 << 5)
#define SEG_G (1 << 6)
#define SEG_DP (1 << 7)
static const uint8_t digitmap[] = {
/* +#####+
* # #
* # #
* # #
* +-----+
* # #
* # #
* # #
* +#####+
*/
SEG_G,
/* +-----+
* | #
* | #
* | #
* +-----+
* | #
* | #
* | #
* +-----+
*/
SEG_A|SEG_D|SEG_E|SEG_F|SEG_G,
/* +#####+
* | #
* | #
* | #
* +#####+
* # |
* # |
* # |
* +#####+
*/
SEG_C|SEG_F,
/* +#####+
* | #
* | #
* | #
* +#####+
* | #
* | #
* | #
* +#####+
*/
SEG_E|SEG_F,
/* +-----+
* # #
* # #
* # #
* +#####+
* | #
* | #
* | #
* +-----+
*/
SEG_A|SEG_D|SEG_E,
/* +#####+
* # |
* # |
* # |
* +#####+
* | #
* | #
* | #
* +#####+
*/
SEG_B|SEG_E,
/* +#####+
* # |
* # |
* # |
* +#####+
* # #
* # #
* # #
* +#####+
*/
SEG_B,
/* +#####+
* | #
* | #
* | #
* +-----+
* | #
* | #
* | #
* +-----+
*/
SEG_D|SEG_E|SEG_F,
/* +#####+
* # #
* # #
* # #
* +#####+
* # #
* # #
* # #
* +#####+
*/
0,
/* +#####+
* # #
* # #
* # #
* +#####+
* | #
* | #
* | #
* +-----+
*/
SEG_D|SEG_E,
};
static uint8_t
iq80321_7seg_xlate(char c)
{
uint8_t rv;
if (c >= '0' && c <= '9')
rv = digitmap[c - '0'];
else if (c == '.')
rv = (uint8_t) ~SEG_DP;
else
rv = 0xff;
return (rv);
}
void
iq80321_7seg(char a, char b)
{
uint8_t msb, lsb;
msb = iq80321_7seg_xlate(a);
lsb = iq80321_7seg_xlate(b);
snakestate = 0;
WRITE(IQ80321_7SEG_MSB, msb);
WRITE(IQ80321_7SEG_LSB, lsb);
}
static const uint8_t snakemap[][2] = {
/* +#####+ +#####+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
*/
{ ~SEG_A, ~SEG_A },
/* +-----+ +-----+
* # | | #
* # | | #
* # | | #
* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
*/
{ ~SEG_F, ~SEG_B },
/* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +#####+ +#####+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
*/
{ ~SEG_G, ~SEG_G },
/* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
* | # # |
* | # # |
* | # # |
* +-----+ +-----+
*/
{ ~SEG_C, ~SEG_E },
/* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +#####+ +#####+
*/
{ ~SEG_D, ~SEG_D },
/* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
* # | | #
* # | | #
* # | | #
* +-----+ +-----+
*/
{ ~SEG_E, ~SEG_C },
/* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +#####+ +#####+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
*/
{ ~SEG_G, ~SEG_G },
/* +-----+ +-----+
* | # # |
* | # # |
* | # # |
* +-----+ +-----+
* | | | |
* | | | |
* | | | |
* +-----+ +-----+
*/
{ ~SEG_B, ~SEG_F },
};
void
iq80321_7seg_snake(void)
{
int cur = snakestate;
WRITE(IQ80321_7SEG_MSB, snakemap[cur][0]);
WRITE(IQ80321_7SEG_LSB, snakemap[cur][1]);
snakestate = (cur + 1) & 7;
}

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/* $NetBSD: iq31244_pci.c,v 1.1 2003/05/14 21:41:34 thorpej Exp $ */
/*
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
* All rights reserved.
*
* Written by Jason R. Thorpe for Wasabi Systems, Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed for the NetBSD Project by
* Wasabi Systems, Inc.
* 4. The name of Wasabi Systems, Inc. may not be used to endorse
* or promote products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* IQ31244 PCI interrupt support.
*/
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/device.h>
#include <machine/autoconf.h>
#include <machine/bus.h>
#include <evbarm/iq80321/iq80321reg.h>
#include <evbarm/iq80321/iq80321var.h>
#include <arm/xscale/i80321reg.h>
#include <arm/xscale/i80321var.h>
#include <dev/pci/pcidevs.h>
#include <dev/pci/ppbreg.h>
int iq80321_pci_intr_map(struct pci_attach_args *, pci_intr_handle_t *);
const char *iq80321_pci_intr_string(void *, pci_intr_handle_t);
const struct evcnt *iq80321_pci_intr_evcnt(void *, pci_intr_handle_t);
void *iq80321_pci_intr_establish(void *, pci_intr_handle_t,
int, int (*func)(void *), void *);
void iq80321_pci_intr_disestablish(void *, void *);
void
iq80321_pci_init(pci_chipset_tag_t pc, void *cookie)
{
pc->pc_intr_v = cookie; /* the i80321 softc */
pc->pc_intr_map = iq80321_pci_intr_map;
pc->pc_intr_string = iq80321_pci_intr_string;
pc->pc_intr_evcnt = iq80321_pci_intr_evcnt;
pc->pc_intr_establish = iq80321_pci_intr_establish;
pc->pc_intr_disestablish = iq80321_pci_intr_disestablish;
}
int
iq80321_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
{
struct i80321_softc *sc = pa->pa_pc->pc_intr_v;
int b, d, f;
uint32_t busno;
busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
busno = PCIXSR_BUSNO(busno);
if (busno == 0xff)
busno = 0;
pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f);
/* No mappings for devices not on our bus. */
if (b != busno)
goto no_mapping;
switch (d) {
case 1: /* PCIX-PCIX bridge */
/*
* The S-ATA chips are behind the bridge, and all of
* the S-ATA interrupts are wired together.
*/
*ihp = ICU_INT_XINT(2);
return (0);
case 2: /* PCI slot */
/* All pins are wired together. */
*ihp = ICU_INT_XINT(3);
return (0);
case 3: /* i82546 dual Gig-E */
if (pa->pa_intrpin == 1 || pa->pa_intrpin == 2) {
*ihp = ICU_INT_XINT(0);
return (0);
}
goto no_mapping;
default:
no_mapping:
printf("iq80321_pci_intr_map: no mapping for %d/%d/%d/%c\n",
pa->pa_bus, pa->pa_device, pa->pa_function,
'@' + pa->pa_intrpin);
return (1);
}
return (0);
}
const char *
iq80321_pci_intr_string(void *v, pci_intr_handle_t ih)
{
return (i80321_irqnames[ih]);
}
const struct evcnt *
iq80321_pci_intr_evcnt(void *v, pci_intr_handle_t ih)
{
/* XXX For now. */
return (NULL);
}
void *
iq80321_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl,
int (*func)(void *), void *arg)
{
return (i80321_intr_establish(ih, ipl, func, arg));
}
void
iq80321_pci_intr_disestablish(void *v, void *cookie)
{
i80321_intr_disestablish(cookie);
}