Support for VAX8200; the ka820/ka825 CPUs.
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/* $NetBSD: ka820.h,v 1.1 1996/07/20 17:33:09 ragge Exp $ */
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/*
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* Copyright (c) 1988 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Chris Torek.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)ka820.h 7.3 (Berkeley) 6/28/90
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*/
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/*
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* Definitions specific to the ka820 cpu.
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*/
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/*
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* Device addresses.
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*/
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#define KA820_PORTADDR 0x20088000 /* port controller */
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#define KA820_BRAMADDR 0x20090000 /* boot ram */
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#define KA820_EEPROMADDR 0x20098000 /* eeprom */
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#define KA820_RX50ADDR 0x200b0000 /* rcx50 */
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#define KA820_CLOCKADDR 0x200b8000 /* watch chip */
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/*
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* Sizes. The port controller, RCX50, and watch chip are all one page.
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*/
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#define KA820_BRPAGES 16 /* 8K */
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#define KA820_EEPAGES 64 /* 32K */
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/* port controller CSR bit values */
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#define KA820PORT_RSTHALT 0x80000000 /* restart halt */
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#define KA820PORT_LCONS 0x40000000 /* logical console */
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#define KA820PORT_LCONSEN 0x20000000 /* logical console enable */
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#define KA820PORT_BIRESET 0x10000000 /* BI reset */
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#define KA820PORT_BISTF 0x08000000 /* ??? */
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#define KA820PORT_ENBAPT 0x04000000 /* ??? */
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#define KA820PORT_STPASS 0x02000000 /* self test pass */
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#define KA820PORT_RUN 0x01000000 /* run */
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#define KA820PORT_WWPE 0x00800000 /* ??? parity even? */
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#define KA820PORT_EVLCK 0x00400000 /* event lock */
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#define KA820PORT_WMEM 0x00200000 /* write mem */
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#define KA820PORT_EV4 0x00100000 /* event 4 */
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#define KA820PORT_EV3 0x00080000 /* event 3 */
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#define KA820PORT_EV2 0x00040000 /* event 2 */
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#define KA820PORT_EV1 0x00020000 /* event 1 */
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#define KA820PORT_EV0 0x00010000 /* event 0 */
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#define KA820PORT_WWPO 0x00008000 /* ??? parity odd? */
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#define KA820PORT_PERH 0x00004000 /* parity error H */
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#define KA820PORT_ENBPIPE 0x00002000 /* enable? pipe */
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#define KA820PORT_TIMEOUT 0x00001000 /* timeout */
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#define KA820PORT_RSVD 0x00000800 /* reserved */
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#define KA820PORT_CONSEN 0x00000400 /* console interrupt enable */
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#define KA820PORT_CONSCLR 0x00000200 /* clear console interrupt */
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#define KA820PORT_CONSINTR 0x00000100 /* console interrupt req */
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#define KA820PORT_RXIE 0x00000080 /* RX50 interrupt enable */
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#define KA820PORT_RXCLR 0x00000040 /* clear RX50 interrupt */
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#define KA820PORT_RXIRQ 0x00000020 /* RX50 interrupt request */
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#define KA820PORT_IPCLR 0x00000010 /* clear IP interrupt */
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#define KA820PORT_IPINTR 0x00000008 /* IP interrupt request */
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#define KA820PORT_CRDEN 0x00000004 /* enable CRD interrupts */
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#define KA820PORT_CRDCLR 0x00000002 /* clear CRD interrupt */
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#define KA820PORT_CRDINTR 0x00000001 /* CRD interrupt request */
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/* what the heck */
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#define KA820PORT_BITS \
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"\20\40RSTHALT\37LCONS\36LCONSEN\35BIRESET\34BISTF\33ENBAPT\32STPASS\31RUN\
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\30WWPE\27EVLCK\26WMEM\25EV4\24EV3\23EV2\22EV1\21EV\20WWPO\17PERH\16ENBPIPE\
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\15TIMEOUT\13CONSEN\12CONSCLR\11CONSINTR\10RXIE\7RXCLR\6RXIRQ\5IPCLR\4IPINTR\
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\3CRDEN\2CLRCLR\1CRDINTR"
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/* clock CSR bit values, per csr */
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#define KA820CLK_0_BUSY 0x01 /* busy (time changing) */
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#define KA820CLK_1_GO 0x0c /* run */
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#define KA820CLK_1_SET 0x0d /* set the time */
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#define KA820CLK_3_VALID 0x01 /* clock is valid */
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#ifndef LOCORE
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struct ka820port {
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u_long csr;
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/* that seems to be all.... */
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};
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struct ka820clock {
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u_char sec;
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u_char pad0;
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u_char secalrm;
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u_char pad1;
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u_char min;
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u_char pad2;
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u_char minalrm;
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u_char pad3;
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u_char hr;
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u_char pad4;
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u_char hralrm;
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u_char pad5;
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u_char dayofwk;
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u_char pad6;
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u_char day;
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u_char pad7;
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u_char mon;
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u_char pad8;
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u_char yr;
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u_char pad9;
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u_short csr0;
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u_short csr1;
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u_short csr2;
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u_short csr3;
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};
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/*
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* Prototypes.
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*/
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void ka820_conf __P((struct device *, struct device *, void *));
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void ka820_memerr __P((void));
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int ka820_mchk __P((caddr_t));
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void ka820_steal_pages __P((void));
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int ka820_clkread __P((time_t));
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void ka820_clkwrite __P((void));
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#endif
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@ -0,0 +1,466 @@
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/* $NetBSD: ka820.c,v 1.1 1996/07/20 17:33:06 ragge Exp $ */
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/*
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* Copyright (c) 1988 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Chris Torek.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
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* notice, this list of conditions and the following disclaimer.
|
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* 2. Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)ka820.c 7.4 (Berkeley) 12/16/90
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*/
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/*
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* KA820 specific CPU code. (Note that the VAX8200 uses a KA820, not
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* a KA8200. Sigh.)
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*/
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/kernel.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <vm/vm_kern.h>
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#include <machine/ka820.h>
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#include <machine/cpu.h>
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#include <machine/mtpr.h>
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#include <machine/nexus.h>
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#include <machine/clock.h>
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#include <machine/scb.h>
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#include <arch/vax/bi/bireg.h>
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#include <arch/vax/bi/bivar.h>
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struct ka820clock *ka820clock_ptr;
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struct ka820port *ka820port_ptr;
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struct rx50device *rx50device_ptr;
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void *bi_nodebase; /* virtual base address for all possible bi nodes */
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static int ka820_match __P((struct device *, void *, void *));
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static void ka820_attach __P((struct device *, struct device *, void*));
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struct cfattach cpu_bi_ca = {
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sizeof(struct device), ka820_match, ka820_attach
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};
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#ifdef notyet
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extern struct pte BRAMmap[];
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extern struct pte EEPROMmap[];
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char bootram[KA820_BRPAGES * NBPG];
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char eeprom[KA820_EEPAGES * NBPG];
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#endif
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struct ivec_dsp nollhanterare;
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static void
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hant(arg)
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int arg;
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{
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if (cold == 0)
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printf("stray interrupt from vaxbi bus\n");
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}
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void
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ka820_steal_pages()
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{
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extern vm_offset_t avail_start, virtual_avail, avail_end;
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extern struct ivec_dsp idsptch;
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struct scb *sb;
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int junk, i, j;
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/*
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* On the ka820, we map in the port CSR, the clock registers
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* and the console RX50 register. We also map in the BI nodespace
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* for all possible (16) nodes. It would only be needed with
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* the existent nodes, but we only loose 1K so...
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*/
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sb = (void *)avail_start;
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MAPPHYS(junk, j, VM_PROT_READ|VM_PROT_WRITE); /* SCB & vectors */
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MAPVIRT(ka820clock_ptr, 1);
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pmap_map((vm_offset_t)ka820clock_ptr, (vm_offset_t)KA820_CLOCKADDR,
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KA820_CLOCKADDR + NBPG, VM_PROT_READ|VM_PROT_WRITE);
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MAPVIRT(ka820port_ptr, 1);
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pmap_map((vm_offset_t)ka820port_ptr, (vm_offset_t)KA820_PORTADDR,
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KA820_PORTADDR + NBPG, VM_PROT_READ|VM_PROT_WRITE);
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MAPVIRT(rx50device_ptr, 1);
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pmap_map((vm_offset_t)rx50device_ptr, (vm_offset_t)KA820_RX50ADDR,
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KA820_RX50ADDR + NBPG, VM_PROT_READ|VM_PROT_WRITE);
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MAPVIRT(bi_nodebase, NNODEBI * (sizeof(struct bi_node) / NBPG));
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pmap_map((vm_offset_t)bi_nodebase, (vm_offset_t)BI_BASE(0),
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BI_BASE(0) + sizeof(struct bi_node) * NNODEBI,
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VM_PROT_READ|VM_PROT_WRITE);
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bcopy(&idsptch, &nollhanterare, sizeof(struct ivec_dsp));
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nollhanterare.hoppaddr = hant;
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for (i = 0; i < 4; i++)
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for (j = 0; j < 16; j++)
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sb->scb_nexvec[i][j] = &nollhanterare;
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}
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int
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ka820_match(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct cfdata *cf = match;
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struct bi_attach_args *ba = aux;
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if (ba->ba_node->biic.bi_dtype != BIDT_KA820)
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return 0;
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if (ba->ba_nodenr != mastercpu)
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return 0;
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if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ba->ba_nodenr)
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return 0;
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return 1;
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}
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void
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ka820_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct bi_attach_args *ba = aux;
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register int csr;
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u_short rev = ba->ba_node->biic.bi_revs;
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extern char cpu_model[];
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strcpy(cpu_model,"VAX 8200");
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cpu_model[6] = rev & 0x8000 ? '5' : '0';
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printf(": ka82%c (%s) cpu rev %d, u patch rev %d, sec patch %d\n",
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cpu_model[6], mastercpu == ba->ba_nodenr ? "master" : "slave",
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((rev >> 11) & 15), ((rev >> 1) &1023), rev & 1);
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/* reset the console and enable the RX50 */
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csr = ka820port_ptr->csr;
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csr &= ~KA820PORT_RSTHALT; /* ??? */
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csr |= KA820PORT_CONSCLR | KA820PORT_CRDCLR | KA820PORT_CONSEN |
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KA820PORT_RXIE;
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ka820port_ptr->csr = csr;
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ba->ba_node->biic.bi_intrdes = ba->ba_intcpu;
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ba->ba_node->biic.bi_csr |= BICSR_SEIE | BICSR_HEIE;
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}
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/* Set system time from clock */
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/* ARGSUSED */
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ka820_clkread(base)
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time_t base;
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{
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struct chiptime c;
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int s, rv;
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rv = CLKREAD_OK;
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/* I wish I knew the differences between these */
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if ((ka820clock_ptr->csr3 & KA820CLK_3_VALID) == 0) {
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printf("WARNING: TOY clock not marked valid\n");
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rv = CLKREAD_WARN;
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}
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if ((ka820clock_ptr->csr1 & KA820CLK_1_GO) != KA820CLK_1_GO) {
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printf("WARNING: TOY clock stopped\n");
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rv = CLKREAD_WARN;
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}
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/* THIS IS NOT RIGHT (clock may change on us) */
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s = splhigh();
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while (ka820clock_ptr->csr0 & KA820CLK_0_BUSY)
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/* void */;
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c.sec = ka820clock_ptr->sec;
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c.min = ka820clock_ptr->min;
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c.hour = ka820clock_ptr->hr;
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c.day = ka820clock_ptr->day;
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c.mon = ka820clock_ptr->mon;
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c.year = ka820clock_ptr->yr;
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splx(s);
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/* the darn thing needs tweaking! */
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c.sec >>= 1; /* tweak */
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c.min >>= 1; /* tweak */
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c.hour >>= 1; /* tweak */
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c.day >>= 1; /* tweak */
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c.mon >>= 1; /* tweak */
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c.year >>= 1; /* tweak */
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time.tv_sec = chiptotime(&c);
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return (time.tv_sec ? rv : CLKREAD_BAD);
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}
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/* store time into clock */
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void
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ka820_clkwrite()
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{
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struct chiptime c;
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int s;
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timetochip(&c);
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/* play it again, sam (or mike or kirk or ...) */
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c.sec <<= 1; /* tweak */
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c.min <<= 1; /* tweak */
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c.hour <<= 1; /* tweak */
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c.day <<= 1; /* tweak */
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c.mon <<= 1; /* tweak */
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c.year <<= 1; /* tweak */
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s = splhigh();
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ka820clock_ptr->csr1 = KA820CLK_1_SET;
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while (ka820clock_ptr->csr0 & KA820CLK_0_BUSY)
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/* void */;
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ka820clock_ptr->sec = c.sec;
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ka820clock_ptr->min = c.min;
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ka820clock_ptr->hr = c.hour;
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ka820clock_ptr->day = c.day;
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ka820clock_ptr->mon = c.mon;
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ka820clock_ptr->yr = c.year;
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/* should we set a `rate'? */
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ka820clock_ptr->csr1 = KA820CLK_1_GO;
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splx(s);
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}
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/*
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* MS820 support.
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*/
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struct ms820regs {
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struct biiregs biic; /* BI interface chip */
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u_long ms_gpr[4]; /* the four gprs (unused) */
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int ms_csr1; /* control/status register 1 */
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int ms_csr2; /* control/status register 2 */
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};
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/*
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* Bits in CSR1.
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*/
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#define MS1_ERRSUM 0x80000000 /* error summary (ro) */
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#define MS1_ECCDIAG 0x40000000 /* ecc diagnostic (rw) */
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#define MS1_ECCDISABLE 0x20000000 /* ecc disable (rw) */
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#define MS1_MSIZEMASK 0x1ffc0000 /* mask for memory size (ro) */
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#define MS1_RAMTYMASK 0x00030000 /* mask for ram type (ro) */
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#define MS1_RAMTY64K 0x00000000 /* 64K chips */
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#define MS1_RAMTY256K 0x00010000 /* 256K chips */
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#define MS1_RAMTY1MB 0x00020000 /* 1MB chips */
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/* type 3 reserved */
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#define MS1_CRDINH 0x00008000 /* inhibit crd interrupts (rw) */
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#define MS1_MEMVALID 0x00004000 /* memory has been written (ro) */
|
||||
#define MS1_INTLK 0x00002000 /* interlock flag (ro) */
|
||||
#define MS1_BROKE 0x00001000 /* broken (rw) */
|
||||
#define MS1_MBZ 0x00000880 /* zero */
|
||||
#define MS1_MWRITEERR 0x00000400 /* rds during masked write (rw) */
|
||||
#define MS1_CNTLERR 0x00000200 /* internal timing busted (rw) */
|
||||
#define MS1_INTLV 0x00000100 /* internally interleaved (ro) */
|
||||
#define MS1_DIAGC 0x0000007f /* ecc diagnostic bits (rw) */
|
||||
|
||||
/*
|
||||
* Bits in CSR2.
|
||||
*/
|
||||
#define MS2_RDSERR 0x80000000 /* rds error (rw) */
|
||||
#define MS2_HIERR 0x40000000 /* high error rate (rw) */
|
||||
#define MS2_CRDERR 0x20000000 /* crd error (rw) */
|
||||
#define MS2_ADRSERR 0x10000000 /* rds due to addr par err (rw) */
|
||||
#define MS2_MBZ 0x0f000080 /* zero */
|
||||
#define MS2_ADDR 0x00fffe00 /* address in error (relative) (ro) */
|
||||
#define MS2_INTLVADDR 0x00000100 /* error was in bank 1 (ro) */
|
||||
#define MS2_SYN 0x0000007f /* error syndrome (ro, rw diag) */
|
||||
|
||||
static int ms820_match __P((struct device *, void *, void *));
|
||||
static void ms820_attach __P((struct device *, struct device *, void*));
|
||||
|
||||
struct mem_bi_softc {
|
||||
struct device mem_dev;
|
||||
struct ms820regs *mem_regs;
|
||||
};
|
||||
|
||||
struct cfattach mem_bi_ca = {
|
||||
sizeof(struct mem_bi_softc), ms820_match, ms820_attach
|
||||
};
|
||||
|
||||
static int
|
||||
ms820_match(parent, match, aux)
|
||||
struct device *parent;
|
||||
void *match, *aux;
|
||||
{
|
||||
struct cfdata *cf = match;
|
||||
struct bi_attach_args *ba = aux;
|
||||
|
||||
if (ba->ba_node->biic.bi_dtype != BIDT_MS820)
|
||||
return 0;
|
||||
|
||||
if (cf->cf_loc[0] != -1 && cf->cf_loc[0] != ba->ba_nodenr)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void
|
||||
ms820_attach(parent, self, aux)
|
||||
struct device *parent, *self;
|
||||
void *aux;
|
||||
{
|
||||
struct mem_bi_softc *ms = (void *)self;
|
||||
struct bi_attach_args *ba = aux;
|
||||
|
||||
ms->mem_regs = (void *)ba->ba_node;
|
||||
|
||||
if ((ms->mem_regs->biic.bi_csr & BICSR_STS) == 0)
|
||||
printf(": failed self test\n");
|
||||
else
|
||||
printf(": size %dMB, %s chips\n", ((ms->mem_regs->ms_csr1 &
|
||||
MS1_MSIZEMASK) >> 20), (ms->mem_regs->ms_csr1&MS1_RAMTYMASK
|
||||
?ms->mem_regs->ms_csr1 & MS1_RAMTY256K?"256K":"1M":"64K"));
|
||||
|
||||
ms->mem_regs->biic.bi_intrdes = ba->ba_intcpu;
|
||||
ms->mem_regs->biic.bi_csr |= BICSR_SEIE | BICSR_HEIE;
|
||||
|
||||
ms->mem_regs->ms_csr1 = MS1_MWRITEERR | MS1_CNTLERR;
|
||||
ms->mem_regs->ms_csr2 = MS2_RDSERR | MS2_HIERR |
|
||||
MS2_CRDERR | MS2_ADRSERR;
|
||||
}
|
||||
|
||||
void
|
||||
ka820_memerr()
|
||||
{
|
||||
register struct ms820regs *mcr;
|
||||
struct mem_bi_softc *mc;
|
||||
extern struct cfdriver mem_cd;
|
||||
register int m, hard;
|
||||
register char *type;
|
||||
static char b1[] = "\20\40ERRSUM\37ECCDIAG\36ECCDISABLE\20CRDINH\17VALID\
|
||||
\16INTLK\15BROKE\13MWRITEERR\12CNTLERR\11INTLV";
|
||||
static char b2[] = "\20\40RDS\37HIERR\36CRD\35ADRS";
|
||||
|
||||
for (m = 0; m < mem_cd.cd_ndevs; m++) {
|
||||
mc = mem_cd.cd_devs[m];
|
||||
if (mc == NULL)
|
||||
continue;
|
||||
mcr = mc->mem_regs;
|
||||
printf("%s: csr1=%b csr2=%b\n", mc->mem_dev.dv_xname,
|
||||
mcr->ms_csr1, b1, mcr->ms_csr2, b2);
|
||||
if ((mcr->ms_csr1 & MS1_ERRSUM) == 0)
|
||||
continue;
|
||||
hard = 1;
|
||||
if (mcr->ms_csr1 & MS1_BROKE)
|
||||
type = "broke";
|
||||
else if (mcr->ms_csr1 & MS1_CNTLERR)
|
||||
type = "cntl err";
|
||||
else if (mcr->ms_csr2 & MS2_ADRSERR)
|
||||
type = "address parity err";
|
||||
else if (mcr->ms_csr2 & MS2_RDSERR)
|
||||
type = "rds err";
|
||||
else if (mcr->ms_csr2 & MS2_CRDERR) {
|
||||
hard = 0;
|
||||
type = "";
|
||||
} else
|
||||
type = "mysterious error";
|
||||
printf("%s: %s%s%s addr %x bank %x syn %x\n",
|
||||
mc->mem_dev.dv_xname,
|
||||
hard ? "hard error: " : "soft ecc",
|
||||
type, mcr->ms_csr2 & MS2_HIERR ?
|
||||
" (+ other rds or crd err)" : "",
|
||||
((mcr->ms_csr2 & MS2_ADDR) + mcr->biic.bi_sadr) >> 9,
|
||||
(mcr->ms_csr2 & MS2_INTLVADDR) != 0,
|
||||
mcr->ms_csr2 & MS2_SYN);
|
||||
mcr->ms_csr1 = mcr->ms_csr1 | MS1_CRDINH;
|
||||
mcr->ms_csr2 = mcr->ms_csr2;
|
||||
}
|
||||
}
|
||||
|
||||
/* these are bits 0 to 6 in the summary field */
|
||||
char *mc8200[] = {
|
||||
"cpu bad ipl", "ucode lost err",
|
||||
"ucode par err", "DAL par err",
|
||||
"BI bus err", "BTB tag par",
|
||||
"cache tag par",
|
||||
};
|
||||
#define MC8200_BADIPL 0x01
|
||||
#define MC8200_UERR 0x02
|
||||
#define MC8200_UPAR 0x04
|
||||
#define MC8200_DPAR 0x08
|
||||
#define MC8200_BIERR 0x10
|
||||
#define MC8200_BTAGPAR 0x20
|
||||
#define MC8200_CTAGPAR 0x40
|
||||
|
||||
struct mc8200frame {
|
||||
int mc82_bcnt; /* byte count == 0x20 */
|
||||
int mc82_summary; /* summary parameter */
|
||||
int mc82_param1; /* parameter 1 */
|
||||
int mc82_va; /* va register */
|
||||
int mc82_vap; /* va prime register */
|
||||
int mc82_ma; /* memory address */
|
||||
int mc82_status; /* status word */
|
||||
int mc82_epc; /* error pc */
|
||||
int mc82_upc; /* micro pc */
|
||||
int mc82_pc; /* current pc */
|
||||
int mc82_psl; /* current psl */
|
||||
};
|
||||
|
||||
int
|
||||
ka820_mchk(cmcf)
|
||||
caddr_t cmcf;
|
||||
{
|
||||
register struct mc8200frame *mcf = (struct mc8200frame *)cmcf;
|
||||
register int i, type = mcf->mc82_summary;
|
||||
|
||||
/* ignore BI bus errors during configuration */
|
||||
if (cold && type == MC8200_BIERR) {
|
||||
mtpr(PR_MCESR, 0xf);
|
||||
return (MCHK_RECOVERED);
|
||||
}
|
||||
|
||||
/*
|
||||
* SOME ERRORS ARE RECOVERABLE
|
||||
* do it later
|
||||
*/
|
||||
printf("machine check %x: ", type);
|
||||
for (i = 0; i < sizeof (mc8200) / sizeof (mc8200[0]); i++)
|
||||
if (type & (1 << i))
|
||||
printf(" %s,", mc8200[i]);
|
||||
printf(" param1 %x\n", mcf->mc82_param1);
|
||||
printf(
|
||||
"\tva %x va' %x ma %x pc %x psl %x\n\tstatus %x errpc %x upc %x\n",
|
||||
mcf->mc82_va, mcf->mc82_vap, mcf->mc82_ma,
|
||||
mcf->mc82_pc, mcf->mc82_psl,
|
||||
mcf->mc82_status, mcf->mc82_epc, mcf->mc82_upc);
|
||||
return (MCHK_PANIC);
|
||||
}
|
||||
|
||||
/*
|
||||
* Receive a character from logical console.
|
||||
*/
|
||||
rxcdintr()
|
||||
{
|
||||
register int c = mfpr(PR_RXCD);
|
||||
|
||||
/* not sure what (if anything) to do with these */
|
||||
printf("rxcd node %x c=0x%x\n", (c >> 8) & 0xf, c & 0xff);
|
||||
}
|
||||
Loading…
Reference in New Issue