Serial ATA register definitions.
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thorpej
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# $NetBSD: Makefile,v 1.4 2002/08/05 23:29:30 soren Exp $
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# $NetBSD: Makefile,v 1.5 2003/12/14 17:14:47 thorpej Exp $
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INCSDIR= /usr/include/dev/ata
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# Only install includes which are used by userland
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INCS= atareg.h atavar.h
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INCS= atareg.h atavar.h satareg.h
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.include <bsd.kinc.mk>
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/* $NetBSD: satareg.h,v 1.1 2003/12/14 17:14:47 thorpej Exp $ */
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/*-
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* Copyright (c) 2003 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_ATA_SATAREG_H_
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#define _DEV_ATA_SATAREG_H_
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/*
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* Serial ATA register definitions.
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*
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* Reference:
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*
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* Serial ATA: High Speed Serialized AT Attachment
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* Revsion 1.0 29-August-2001
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* Serial ATA Working Group
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*/
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/*
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* SStatus (SCR0) --
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* Serial ATA interface status register
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*/
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/*
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* The DET value indicates the interface device detection and
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* PHY state.
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*/
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#define SStatus_DET_NODEV (0x0 << 0) /* no device connected */
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#define SStatus_DET_DEV_NE (0x1 << 0) /* device, but PHY comm not
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established */
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#define SStatus_DET_DEV (0x3 << 0) /* device, PHY comm
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established */
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#define SStatus_DET_OFFLINE (0x4 << 0) /* PHY in offline mode */
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#define SStatus_DET_mask (0xf << 0)
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#define SStatus_DET_shift 0
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/*
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* The SPD value indicates the negotiated interface communication
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* speed established.
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*/
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#define SStatus_SPD_NONE (0x0 << 4) /* no negotiated speed */
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#define SStatus_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */
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#define SStatus_SPD_mask (0xf << 4)
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#define SStatus_SPD_shift 4
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/*
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* The IPM value indicates the current interface power managemnt
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* state.
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*/
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#define SStatus_IPM_NODEV (0x0 << 8) /* no device connected */
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#define SStatus_IPM_ACTIVE (0x1 << 8) /* ACTIVE state */
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#define SStatus_IPM_PARTIAL (0x2 << 8) /* PARTIAL pm state */
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#define SStatus_IPM_SLUMBER (0x6 << 8) /* SLUMBER pm state */
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#define SStatus_IPM_mask (0xf << 8)
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#define SStatus_IPM_shift 8
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/*
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* SError (SCR1) --
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* Serial ATA interface error register
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*/
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#define SError_ERR_I (1U << 0) /* Recovered data integrity
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error */
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#define SError_ERR_M (1U << 1) /* Recovered communications
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error */
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#define SError_ERR_T (1U << 8) /* Non-recovered transient
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data integrity error */
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#define SError_ERR_C (1U << 9) /* Non-recovered persistent
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communication or data
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integrity error */
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#define SError_ERR_P (1U << 10) /* Protocol error */
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#define SError_ERR_E (1U << 11) /* Internal error */
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#define SError_DIAG_N (1U << 16) /* PhyRdy change */
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#define SError_DIAG_I (1U << 17) /* PHY internal error */
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#define SError_DIAG_W (1U << 18) /* Comm Wake */
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#define SError_DIAG_B (1U << 19) /* 10b to 8b decode error */
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#define SError_DIAG_D (1U << 20) /* Disparity error */
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#define SError_DIAG_C (1U << 21) /* CRC error */
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#define SError_DIAG_H (1U << 22) /* Handshake error */
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#define SError_DIAG_S (1U << 23) /* Link sequence error */
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#define SError_DIAG_T (1U << 24) /* Transport state transition
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error */
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#define SError_DIAG_F (1U << 25) /* Unrecognized FIS type */
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/*
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* SControl (SCR2) --
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* Serial ATA interface control register
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*/
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/*
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* The DET field controls the host adapter device detection
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* and interface initialization.
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*/
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#define SControl_DET_NONE (0x0 << 0) /* No device detection or
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initialization action
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requested */
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#define SControl_DET_INIT (0x1 << 0) /* Initialize interface
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communication (equiv
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of a hard reset) */
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#define SControl_DET_DISABLE (0x4 << 0) /* disable interface and
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take PHY offline */
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/*
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* The SPD field represents the highest allowed communication
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* speed the interface is allowed to negotiate when communication
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* is established.
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*/
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#define SControl_SPD_ANY (0x0 << 4) /* No restrictions */
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#define SControl_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */
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/*
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* The IPM field represents the enabled interface power management
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* states that can be invoked via the Serial ATA interface power
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* management capabilities.
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*/
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#define SControl_IPM_ANY (0x0 << 8) /* No restrictions */
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#define SControl_IPM_NOPARTIAL (0x1 << 8) /* PARTIAL disabled */
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#define SControl_IPM_NOSLUMBER (0x2 << 8) /* SLUMBER disabled */
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#define SControl_IPM_NONE (0x3 << 8) /* No power management */
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#endif /* _DEV_ATA_SATAREG_H_ */
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