Improve inline asm around dsb/dmb/isb:
- always use volatile and mark them as memory barrier - use the common version from locore.h in all places not included from userland
This commit is contained in:
joerg
parent
7f6d2a73ac
commit
5aebfecd7c
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@ -1,4 +1,4 @@
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/* $NetBSD: awin_space.c,v 1.3 2014/02/20 21:45:49 matt Exp $ */
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/* $NetBSD: awin_space.c,v 1.4 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: awin_space.c,v 1.3 2014/02/20 21:45:49 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: awin_space.c,v 1.4 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -366,17 +366,8 @@ awin_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
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{
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flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
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if (flags) {
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/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
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#ifdef _ARM_ARCH_7
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__asm __volatile("dsb");
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#else
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
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: "memory");
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#endif
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return;
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}
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if (flags)
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arm_dsb();
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}
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void *
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@ -1,4 +1,4 @@
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/* $NetBSD: amlogic_space.c,v 1.1 2015/02/07 17:20:17 jmcneill Exp $ */
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/* $NetBSD: amlogic_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.1 2015/02/07 17:20:17 jmcneill Exp $");
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__KERNEL_RCSID(0, "$NetBSD: amlogic_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -366,17 +366,8 @@ amlogic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
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{
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flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
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if (flags) {
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/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
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#ifdef _ARM_ARCH_7
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__asm __volatile("dsb");
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#else
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
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: "memory");
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#endif
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return;
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}
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if (flags)
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arm_dsb();
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}
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void *
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@ -1,4 +1,4 @@
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/* $NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $ */
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/* $NetBSD: cpufunc.c,v 1.151 2015/02/25 13:52:42 joerg Exp $ */
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/*
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* arm7tdmi support code Copyright (c) 2001 John Fremlin
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@ -49,7 +49,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.150 2014/07/31 07:14:42 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.151 2015/02/25 13:52:42 joerg Exp $");
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#include "opt_compat_netbsd.h"
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#include "opt_cpuoptions.h"
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@ -1490,9 +1490,9 @@ get_cachesize_cp15(int cssr)
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#if defined(CPU_ARMV7)
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__asm volatile(".arch\tarmv7a");
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__asm volatile("mcr p15, 2, %0, c0, c0, 0" :: "r" (cssr));
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__asm volatile("isb"); /* sync to the new cssr */
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__asm volatile("isb" ::: "memory"); /* sync to the new cssr */
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#else
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__asm volatile("mcr p15, 1, %0, c0, c0, 2" :: "r" (cssr));
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__asm volatile("mcr p15, 1, %0, c0, c0, 2" :: "r" (cssr) : "memory");
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#endif
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__asm volatile("mrc p15, 1, %0, c0, c0, 0" : "=r" (csid));
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return csid;
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@ -1,4 +1,4 @@
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/* $NetBSD: bus_dma.c,v 1.90 2015/02/12 10:23:48 joerg Exp $ */
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/* $NetBSD: bus_dma.c,v 1.91 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
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@ -35,7 +35,7 @@
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#include "opt_arm_bus_space.h"
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.90 2015/02/12 10:23:48 joerg Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.91 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -832,13 +832,13 @@ _bus_dmamap_sync_segment(vaddr_t va, paddr_t pa, vsize_t len, int ops, bool read
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*/
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case BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE:
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STAT_INCR(sync_postreadwrite);
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__asm __volatile("dmb" ::: "memory");
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arm_dmb();
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cpu_dcache_inv_range(va, len);
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cpu_sdcache_inv_range(va, pa, len);
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break;
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case BUS_DMASYNC_POSTREAD:
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STAT_INCR(sync_postread);
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__asm __volatile("dmb" ::: "memory");
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arm_dmb();
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cpu_dcache_inv_range(va, len);
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cpu_sdcache_inv_range(va, pa, len);
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break;
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@ -1,4 +1,4 @@
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/* $NetBSD: db_machdep.c,v 1.22 2014/10/12 05:40:56 skrll Exp $ */
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/* $NetBSD: db_machdep.c,v 1.23 2015/02/25 13:52:42 joerg Exp $ */
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/*
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* Copyright (c) 1996 Mark Brinicombe
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@ -33,7 +33,7 @@
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#endif
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.22 2014/10/12 05:40:56 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: db_machdep.c,v 1.23 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/cpu.h>
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@ -385,7 +385,7 @@ db_show_tlb_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *mod
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armreg_tlbdataop_write(
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__SHIFTIN(va_index, dti->dti_index)
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| __SHIFTIN(way, ARM_TLBDATAOP_WAY));
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__asm("isb");
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arm_isb();
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const uint32_t d0 = armreg_tlbdata0_read();
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const uint32_t d1 = armreg_tlbdata1_read();
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if ((d0 & ARM_TLBDATA_VALID)
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@ -406,7 +406,7 @@ db_show_tlb_cmd(db_expr_t addr, bool have_addr, db_expr_t count, const char *mod
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armreg_tlbdataop_write(
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__SHIFTIN(way, ARM_TLBDATAOP_WAY)
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| __SHIFTIN(va_index, dti->dti_index));
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__asm("isb");
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arm_isb();
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const uint32_t d0 = armreg_tlbdata0_read();
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const uint32_t d1 = armreg_tlbdata1_read();
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if (d0 & ARM_TLBDATA_VALID) {
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.316 2014/11/10 15:46:33 skrll Exp $ */
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/* $NetBSD: pmap.c,v 1.317 2015/02/25 13:52:42 joerg Exp $ */
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/*
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* Copyright 2003 Wasabi Systems, Inc.
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@ -215,7 +215,7 @@
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#include <arm/locore.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.316 2014/11/10 15:46:33 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.317 2015/02/25 13:52:42 joerg Exp $");
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//#define PMAP_DEBUG
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#ifdef PMAP_DEBUG
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@ -952,9 +952,7 @@ pmap_pte_sync_current(pmap_t pm, pt_entry_t *ptep)
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{
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if (PMAP_NEEDS_PTE_SYNC && pmap_is_cached(pm))
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PTE_SYNC(ptep);
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#if ARM_MMU_V7 > 0
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__asm("dsb":::"memory");
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#endif
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arm_dsb();
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}
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#ifdef PMAP_INCLUDE_PTE_SYNC
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/* $NetBSD: bcm2835_space.c,v 1.6 2013/04/14 15:11:52 skrll Exp $ */
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/* $NetBSD: bcm2835_space.c,v 1.7 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.6 2013/04/14 15:11:52 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bcm2835_space.c,v 1.7 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -356,13 +356,8 @@ bcm2835_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
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{
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flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
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if (flags) {
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/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
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: "memory");
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return;
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}
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if (flags)
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arm_dsb();
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}
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void *
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#include <sys/cdefs.h>
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__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.13 2014/03/30 01:12:18 matt Exp $");
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__KERNEL_RCSID(1, "$NetBSD: bcm53xx_pax.c,v 1.14 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/bus.h>
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@ -419,12 +419,12 @@ bcmpax_conf_addr_write(struct bcmpax_softc *sc, pcitag_t tag)
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bcmpax_write_4(sc, PCIE_CFG_IND_ADDR,
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__SHIFTIN(func, CFG_IND_ADDR_FUNC)
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| __SHIFTIN(reg, CFG_IND_ADDR_REG));
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__asm __volatile("dsb");
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arm_dsb();
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return PCIE_CFG_IND_DATA;
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}
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if (sc->sc_linkup) {
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bcmpax_write_4(sc, PCIE_CFG_ADDR, tag);
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__asm __volatile("dsb");
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arm_dsb();
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return PCIE_CFG_DATA;
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}
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return 0;
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@ -1,4 +1,4 @@
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/* $NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $ */
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/* $NetBSD: bcmgen_space.c,v 1.5 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.4 2013/10/28 22:51:16 matt Exp $");
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__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.5 2015/02/25 13:52:42 joerg Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -241,17 +241,8 @@ bcmgen_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
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{
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flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
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if (flags) {
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/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
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#ifdef _ARM_ARCH_7
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__asm __volatile("dsb");
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#else
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__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
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: "memory");
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#endif
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return;
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}
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if (flags)
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arm_dsb();
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}
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void *
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.h,v 1.137 2014/11/08 17:18:22 skrll Exp $ */
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/* $NetBSD: pmap.h,v 1.138 2015/02/25 13:52:42 joerg Exp $ */
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/*
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* Copyright (c) 2002, 2003 Wasabi Systems, Inc.
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@ -78,6 +78,7 @@
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#include "opt_multiprocessor.h"
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#endif
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#include <arm/cpufunc.h>
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#include <arm/locore.h>
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#include <uvm/uvm_object.h>
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#endif
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@ -511,9 +512,7 @@ pmap_ptesync(pt_entry_t *ptep, size_t cnt)
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cnt * sizeof(pt_entry_t));
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#endif
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}
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#if ARM_MMU_V7 > 0
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__asm("dsb");
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#endif
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arm_dsb();
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}
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#define PDE_SYNC(pdep) pmap_ptesync((pdep), 1)
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@ -1,4 +1,4 @@
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/* $NetBSD: lock.h,v 1.31 2015/02/23 20:49:53 joerg Exp $ */
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/* $NetBSD: lock.h,v 1.32 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
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@ -143,9 +143,9 @@ static __inline void
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__arm_membar_producer(void)
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{
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#ifdef _ARM_ARCH_7
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__asm __volatile("dsb");
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__asm __volatile("dsb" ::: "memory");
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#elif defined(_ARM_ARCH_6)
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__asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0));
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__asm __volatile("mcr\tp15,0,%0,c7,c10,4" :: "r"(0) : "memory");
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#endif
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}
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@ -153,9 +153,9 @@ static __inline void
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__arm_membar_consumer(void)
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{
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#ifdef _ARM_ARCH_7
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__asm __volatile("dmb");
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__asm __volatile("dmb" ::: "memory");
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#elif defined(_ARM_ARCH_6)
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__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0));
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__asm __volatile("mcr\tp15,0,%0,c7,c10,5" :: "r"(0) : "memory");
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#endif
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.h,v 1.18 2014/11/07 20:48:41 martin Exp $ */
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/* $NetBSD: locore.h,v 1.19 2015/02/25 13:52:42 joerg Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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@ -244,7 +244,7 @@ arm_dmb(void)
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if (CPU_IS_ARMV6_P())
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armreg_dmb_write(0);
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else if (CPU_IS_ARMV7_P())
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__asm __volatile("dmb");
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__asm __volatile("dmb" ::: "memory");
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}
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static inline void
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@ -253,7 +253,7 @@ arm_dsb(void)
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if (CPU_IS_ARMV6_P())
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armreg_dsb_write(0);
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else if (CPU_IS_ARMV7_P())
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__asm __volatile("dsb");
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__asm __volatile("dsb" ::: "memory");
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}
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static inline void
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@ -262,7 +262,7 @@ arm_isb(void)
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if (CPU_IS_ARMV6_P())
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armreg_isb_write(0);
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else if (CPU_IS_ARMV7_P())
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__asm __volatile("isb");
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__asm __volatile("isb" ::: "memory");
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}
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: mutex.h,v 1.19 2014/11/08 17:18:54 skrll Exp $ */
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/* $NetBSD: mutex.h,v 1.20 2015/02/25 13:52:42 joerg Exp $ */
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/*-
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* Copyright (c) 2002, 2007 The NetBSD Foundation, Inc.
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@ -90,7 +90,7 @@ struct kmutex {
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*/
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#ifdef MULTIPROCESSOR
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#ifdef _ARM_ARCH_7
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#define MUTEX_RECEIVE(mtx) __asm __volatile("dmb")
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#define MUTEX_RECEIVE(mtx) __asm __volatile("dmb" ::: "memory")
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#else
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#define MUTEX_RECEIVE(mtx) membar_consumer()
|
||||
#endif
|
||||
|
|
@ -100,7 +100,7 @@ struct kmutex {
|
|||
|
||||
#ifdef MULTIPROCESSOR
|
||||
#ifdef _ARM_ARCH_7
|
||||
#define MUTEX_GIVE(mtx) __asm __volatile("dsb")
|
||||
#define MUTEX_GIVE(mtx) __asm __volatile("dsb" ::: "memory")
|
||||
#else
|
||||
#define MUTEX_GIVE(mtx) membar_producer()
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: rwlock.h,v 1.8 2014/06/12 08:50:52 ozaki-r Exp $ */
|
||||
/* $NetBSD: rwlock.h,v 1.9 2015/02/25 13:52:42 joerg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2002, 2006 The NetBSD Foundation, Inc.
|
||||
|
|
@ -42,8 +42,8 @@ struct krwlock {
|
|||
|
||||
#ifdef MULTIPROCESSOR
|
||||
#ifdef _ARM_ARCH_7
|
||||
#define RW_RECEIVE(rw) __asm __volatile("dmb")
|
||||
#define RW_GIVE(rw) __asm __volatile("dsb")
|
||||
#define RW_RECEIVE(rw) __asm __volatile("dmb" ::: "memory")
|
||||
#define RW_GIVE(rw) __asm __volatile("dsb" ::: "memory")
|
||||
#else
|
||||
#define RW_RECEIVE(rw) membar_consumer()
|
||||
#define RW_GIVE(rw) membar_producer()
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: rockchip_space.c,v 1.1 2014/12/26 16:53:33 jmcneill Exp $ */
|
||||
/* $NetBSD: rockchip_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_space.c,v 1.1 2014/12/26 16:53:33 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: rockchip_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -366,17 +366,8 @@ rockchip_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
|||
{
|
||||
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
|
||||
|
||||
if (flags) {
|
||||
/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
|
||||
#ifdef _ARM_ARCH_7
|
||||
__asm __volatile("dsb");
|
||||
#else
|
||||
__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
|
||||
: "memory");
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
if (flags)
|
||||
arm_dsb();
|
||||
}
|
||||
|
||||
void *
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: exynos_space.c,v 1.1 2014/04/13 02:26:26 matt Exp $ */
|
||||
/* $NetBSD: exynos_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: exynos_space.c,v 1.1 2014/04/13 02:26:26 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: exynos_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -366,17 +366,8 @@ exynos_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
|||
{
|
||||
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
|
||||
|
||||
if (flags) {
|
||||
/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
|
||||
#ifdef _ARM_ARCH_7
|
||||
__asm __volatile("dsb");
|
||||
#else
|
||||
__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
|
||||
: "memory");
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
if (flags)
|
||||
arm_dsb();
|
||||
}
|
||||
|
||||
void *
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: zynq_space.c,v 1.1 2015/01/23 12:34:09 hkenken Exp $ */
|
||||
/* $NetBSD: zynq_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
|
|
@ -29,7 +29,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: zynq_space.c,v 1.1 2015/01/23 12:34:09 hkenken Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: zynq_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -229,17 +229,8 @@ zynq_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
|
|||
{
|
||||
flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
|
||||
|
||||
if (flags) {
|
||||
/* Issue an ARM11 Data Syncronisation Barrier (DSB) */
|
||||
#ifdef _ARM_ARCH_7
|
||||
__asm __volatile("dsb");
|
||||
#else
|
||||
__asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)
|
||||
: "memory");
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
|
||||
if (flags)
|
||||
arm_dsb();
|
||||
}
|
||||
|
||||
void *
|
||||
|
|
|
|||
Loading…
Reference in New Issue