sync with mmeye
This commit is contained in:
msaitoh
parent
29a76c3593
commit
5a99c25885
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@ -1,4 +1,4 @@
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# $NetBSD: genassym.cf,v 1.2 1999/09/14 11:21:27 tsubai Exp $
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# $NetBSD: genassym.cf,v 1.3 1999/09/16 21:23:40 msaitoh Exp $
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#
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# Copyright (c) 1995, 1997 Charles M. Hannum. All rights reserved.
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@ -95,8 +95,6 @@ define PCB_KR15 offsetof(struct pcb, kr15)
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define TF_SPC offsetof(struct trapframe, tf_spc)
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define TF_TRAPNO offsetof(struct trapframe, tf_trapno)
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define FRAMESIZE sizeof(struct trapframe)
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define SIGF_HANDLER offsetof(struct sigframe, sf_handler)
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define SIGF_SC offsetof(struct sigframe, sf_sc)
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define SC_EFLAGS offsetof(struct sigcontext, sc_ssr)
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@ -1,4 +1,4 @@
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/* $NetBSD: locore.s,v 1.2 1999/09/14 11:21:27 tsubai Exp $ */
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/* $NetBSD: locore.s,v 1.3 1999/09/16 21:23:40 msaitoh Exp $ */
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/*-
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* Copyright (c) 1993, 1994, 1995, 1997
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@ -49,9 +49,14 @@
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#include <machine/cputypes.h>
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#include <machine/param.h>
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#include <machine/pte.h>
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#include <machine/segments.h>
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#include <machine/trap.h>
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#define INIT_STACK 0x8c3ff000
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#define SHREG_EXPEVT 0xffffffd4
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#define SHREG_INTEVT 0xffffffd8
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#define SHREG_MMUCR 0xffffffe0
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#define SHREG_TTB 0xfffffff8
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/*
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* These are used on interrupt or trap entry or exit.
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*/
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@ -195,7 +200,6 @@
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mov.l @r15+, r1 ; \
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mov.l @r15+, r0
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#define ECLI \
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mov.l r0, @-r15 ; \
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mov.l r1, @-r15 ; \
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@ -243,47 +247,19 @@
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* Initialization
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*/
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.data
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.globl _cpu,_cpu_id,_cpu_vendor,_cpuid_level,_cpu_feature
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.globl _cold,_esym,_boothowto,_bootinfo,_atdevbase
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.globl _bootdev
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.globl _proc0paddr,_curpcb,_PTDpaddr
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/* .globl _PageDirReg */
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.globl _SPTmap, _SAPTmap
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_cpu: .long 0 /* are we 386, 386sx, or 486, or Pentium, or.. */
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_cpu_id: .long 0 /* saved from `cpuid' instruction */
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_cpu_feature: .long 0 /* feature flags from 'cpuid' instruction */
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_cpuid_level: .long -1 /* max. level accepted by 'cpuid' instruction */
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_cpu_vendor: .space 16 /* vendor string returned by `cpuid' instruction */
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_cold: .long 1 /* cold till we are not */
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_esym: .long 0 /* ptr to end of syms */
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_atdevbase: .long 0 /* location of start of iomem in virtual */
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_proc0paddr: .long 0
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_PTDpaddr: .long 0 /* paddr of PTD, for libkvm */
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/* _PageDirReg: .long 0 */
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.globl _C_LABEL(curpcb), _C_LABEL(PTDpaddr)
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_C_LABEL(PTDpaddr):
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.long 0 /* paddr of PTD, for libkvm */
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KernelStack: .long 0
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_SPTmap: .long 0
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_SAPTmap: .long 0
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#if 0
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_PTmap: .long 0
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_PTD: .long 0
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_PTDpde: .long 0
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_Sysmap: .long 0
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#endif
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KernelSp: .long 0 /* Cache for kernel stack pointer of
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current task */
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#define RELOC(x) ((x) - KERNBASE)
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current task */
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.text
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.globl _kernel_text
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.set _kernel_text,KERNTEXTOFF
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.globl _C_LABEL(kernel_text)
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.globl start, _C_LABEL(_start)
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.set _C_LABEL(kernel_text), KERNTEXTOFF
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.set _C_LABEL(_start), start
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.globl __start
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__start:
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.globl start
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start:
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/* Set SP to initial position */
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mov.l XLtmpstk, r15
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@ -293,7 +269,7 @@ start:
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ldc r0, sr
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xor r0, r0
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mov.l XXL_MMUCR, r2
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mov #SHREG_MMUCR, r2
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mov.l r0, @r2 /* MMU OFF */
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bra start1
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@ -308,13 +284,10 @@ start:
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ldc r9, sr /* Change Register Bank to 0 */
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#endif
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.align 2
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SR_init: .long 0x500000F0
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mmEye_LED: .long LED_ADDR
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XXL_MMUCR: .long 0xFFFFFFE0
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SR_init: .long 0x500000F0
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start1:
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#ifdef ROMIMAGE
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/* Initialize BUS State Control Regs. */
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mov.l _ROM_START, r3
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mov.l _RAM_START, r4
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@ -326,8 +299,8 @@ start1:
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nop
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/* Move kernel image from ROM area to RAM area */
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mov.l ___end, r0
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mov.l ___start, r1
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mov.l ___end, r0
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mov.l ___start, r1
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mov.l _KERNBASE, r2
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sub r2, r0
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sub r2, r1
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@ -355,7 +328,7 @@ start1:
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.align 2
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LXstart_in_RAM:
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.long start_in_RAM
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.long start_in_RAM
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#else
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/* Set Bus State Controler */
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mov.l XLInitializeBsc, r0
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@ -364,440 +337,35 @@ LXstart_in_RAM:
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#endif
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start_in_RAM:
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/* Set Trap Vector */
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mov.l XLMonTrap100, r0
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mov.l XLMonTrap100_end, r1
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mov.l XLTrap100Vec, r2
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sub r0, r1 /* r1 = bytes to be copied */
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1: mov.b @r0+, r3
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mov.b r3, @r2
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add #1, r2
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dt r1
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bf 1b
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mov.l XLMonTrap600, r0
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mov.l XLMonTrap600_end, r1
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mov.l XLTrap600Vec, r2
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sub r0, r1 /* r1 = bytes to be copied */
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1: mov.b @r0+, r3
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mov.b r3, @r2
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add #1, r2
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dt r1
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bf 1b
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mov.l XLVBRINIT, r0
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ldc r0, vbr
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/* clear .bss, .common area, page dir area ,
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process0 stack, page table area */
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mov.l XL_bss_start, r0
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mov.l ___end, r1
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mov.l XLTABLESIZE, r2
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add r2, r1
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mov.l XL_NBPG, r2
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add r2, r1
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shll2 r2
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shll r2
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add r2, r1 /* for page table area of 0xd0000000..0xd1c00000 */
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sub r0, r1
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shlr r1
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shlr r1 /* r1 = long word count to be cleared */
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add #1, r1
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1: xor r2, r2
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mov.l r2, @r0
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add #4, r0
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dt r1
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bf 1b
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mova 1f, r0
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mov r0, r4
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mov.l XLinitSH3, r0
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jsr @r0 /* call initSH3() */
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nop
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/*
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* fillkpt
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* r0 = pte ( physical Address | Control flags )
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* r1 = page table physical address
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* r2 = number of pages to map
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*/
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#define fillkpt \
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mov.l r3, @-r15 ; \
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mov.l XL_NBPG, r3 ; \
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1: mov.l r0, @r1 ; \
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add r3, r0 ; /* increment physical address */ \
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add #4, r1 ; /* next pte */ \
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dt r2 ; \
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bf 1b ; \
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nop ; \
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mov.l @r15+, r3
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1:
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/*
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+-------------+------+-----+----------+-------------+------------+
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| kernel text | data | bss | Page Dir | Proc0 Stack | Page Table |
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+-------------+------+-----+----------+-------------+------------+
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Build initial page tables
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*/
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#define TABLESIZE ((1+UPAGES) * NBPG) /* + nkpde * NBPG */
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/* calc page table address */
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mov.l ___end, r0
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mov.l XL_PGOFSET, r3
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add r3, r0
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mov r3, r4
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not r4, r4
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and r4, r0 /* round to a page */
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mov r0, r11 /* r11 holds Page Dir Area Address */
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mov.l _SYSMAP, r5
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add r5, r0
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mov r0, r1 /* r1 = page table address */
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mov r1, r10 /* save to r10 */
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#if 0
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/* calc page size of Text area */
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mov.l ___etext, r0
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add r3, r0
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and r4, r0
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mov r0, r7 /* save page rounded _etext address to r7 */
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mov #PGSHIFT, r5
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neg r5, r5
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shld r5, r0
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mov r0, r2 /* r2 = (page no of _etext) + 1 */
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mov.l XL_KERNTEXTOFF, r0
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and r4, r0
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shld r5, r0 /* r0 = page no of start */
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sub r0, r2 /* r2 = page count of text area */
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/* prepare pte */
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mov.l XL_KERNTEXTOFF, r0
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mov.l XL_PG_V, r6
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or r6, r0
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mov.l XL_PG_KR, r6
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or r6, r0
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mov.l XL_PG_4K, r6
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or r6, r0
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fillkpt
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mov.l r0, @-r15 /* save pte address */
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/* map the data, BSS, and bootstrap tables read-write */
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/* calc page size */
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mov.l ___end, r0
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add r3, r0
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and r4, r0
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sub r7, r0
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mov #PGSHIFT, r5
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neg r5, r5
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shld r5, r0
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mov.l XLTABLESIZE, r6
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shld r5, r6
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add r6, r0
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mov r0, r2 /* r2 = page size of text */
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mov.l @r15+, r0 /* restore pte address */
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mov.l XL_PG_KW, r3
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or r3, r0
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fillkpt /* make pte of data, BSS, bootstrap tables */
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#endif
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/*
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* Construct a page table directory
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* In SH3 H/W does not support PTD,
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* these structures are used by S/W.
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*/
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/* assume r10 = page table area address, r11 = page dir area address */
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mov.l XL_KERNTEXTOFF, r1
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mov #PDSHIFT, r0
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neg r0, r0
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shld r0, r1
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shll2 r1
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add r11, r1 /* page dir entry address */
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mov #1, r2 /* page dir entry count */
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mov r10, r0 /* page dir entry value */
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mov.l XL_PG_KW, r3
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or r3, r0
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mov.l XL_PG_V, r3
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or r3, r0
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mov.l XL_PG_4K, r3
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or r3, r0
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mov.l XL_PG_M, r3
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or r3, r0
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mov.l XL_PG_N, r3
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or r3, r0
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fillkpt /* make pde */
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/* set PDE for after 0xd0000000 */
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mov.l XLVADDRSTART, r1
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mov #PDSHIFT, r0
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neg r0, r0
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shld r0, r1
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shll2 r1
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add r11, r1
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mov.l XL_NBPG, r4
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mov r10, r0
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add r4, r0
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mov r0, r13 /* r13 = page table area of 0xd0000000 */
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mov.l XL_PG_KW, r3
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or r3, r0
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mov.l XL_PG_V, r3
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or r3, r0
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mov.l XL_PG_4K, r3
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or r3, r0
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mov.l XL_PG_M, r3
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or r3, r0
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mov.l XL_PG_N, r3
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or r3, r0
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mov #8, r2
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fillkpt /* make pde for 0xd0000000,0xd0400000,0xd0800000,0xd0c00000
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0xd1000000,0xd1400000,0xd1800000,0xd1c00000 */
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/* Install a PDE recursively mapping page directory as a page table! */
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mov r11, r0
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mov.l XL_PTDPTDI, r2
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shll2 r2
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add r2, r0
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mov r11, r1
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mov.l XL_PG_V, r2
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or r2, r1
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mov.l XL_PG_4K, r2
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or r2, r1
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mov.l XL_PG_KW, r2
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or r2, r1
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mov.l XL_PG_M, r2
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or r2, r1
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mov.l XL_PG_N, r2
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or r2, r1
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mov.l r1, @r0
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/* set PageDirReg */
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mov.l XLSHREG_TTB, r0
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mov.l r11, @r0
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#if 0
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mov.l XLVADDRSTART, r0
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mov #PGSHIFT, r1
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neg r1, r1
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shld r1, r0
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shll2 r0
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mov r13, r1 /* r13 = page table area of 0xd0000000 */
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sub r0, r1
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mov.l XL_PTmap, r2
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mov.l r1, @r2
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mov.l XL_PTD, r0
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mov.l r11, @r0
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mov r11, r0 /* r11 = page dir area address */
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mov #PDSHIFT, r1
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neg r1, r1
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shld r1, r0
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shll2 r0 /* r0 = pde offset (bytes) */
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mov r11, r1
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add r0, r1 /* r1 = pde address */
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mov.l XL_PTDpde, r2
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mov.l r1, @r2
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mov.l XL_Sysmap, r2
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mov.l r10, @r2
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mov.l XL_SPTmap, r0
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mov.l r10, @r0 /* save page table area address to SPTmap */
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#endif
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/* Set TLB miss handler */
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mov.l XLtlbmisshandler_stub, r0
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mov.l XLtlbmisshandler_stub_end, r1
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mov.l XLTLBVECTOR, r2
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sub r0, r1 /* r1 = copy byte size */
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1: mov.b @r0+, r3
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mov.b r3, @r2
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||||
add #1, r2
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dt r1
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||||
bf 1b
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||||
nop
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||||
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||||
/*
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||||
* Activate MMU
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||||
*/
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mov #1, r0
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||||
swap.b r0, r0 /* single virtual address mode */
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||||
mov #0x5, r1 /* flush tlb | MMU On */
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or r1, r0
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mov.l _MMUCR, r2
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mov.l r0, @r2 /* MMU ON */
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||||
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||||
/*
|
||||
* Now here is virtual address
|
||||
*/
|
||||
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||||
/* setup proc0 stack */
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||||
mov.l XLUSPACE, r0
|
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mov.l XL_FRAMESIZE, r1
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||||
sub r1, r0
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||||
add r11, r0
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||||
mov.l XL_NBPG, r1
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add r1, r0
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||||
mov r0, r15
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||||
#if 1
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mov.l XLKernelStack, r3
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mov.l r15, @r3
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||||
#endif
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||||
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/* Set proc0paddr */
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mov r11, r2
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mov.l XL_NBPG, r1
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add r1, r2
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mov.l XL_proc0paddr, r3
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mov.l r2, @r3
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||||
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||||
/* Set pcb->PageDirReg of proc0 */
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add #PCB_PAGEDIRREG, r2
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mov.l r11, @r2
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||||
/* find empty area */
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mov r11, r2 /* r2 = _end */
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||||
mov.l XL_NBPG, r1
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add r1, r2 /* skip page dir area */
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mov.l XLUSPACE, r0
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||||
add r0, r2 /* skip proc0 uarea */
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||||
#if 0
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mov r2, r3
|
||||
add #-64, r3
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mov r3, r15 /* Set kernel stack */
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||||
mov.l XLKernelStack, r3
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mov.l r15, @r3
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||||
#endif
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||||
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||||
add r1, r2 /* skip kernel page table area */
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||||
shll2 r1
|
||||
shll r1
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||||
add r1, r2 /* skip page table area of 0xd0000000..0xd1c00000 */
|
||||
|
||||
mov.l XL_NKPDE, r0 /* nkpde = kernel page dir area(32 Mbyte) */
|
||||
mov.l XL_nkpde, r1
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||||
mov.l r0, @r1
|
||||
|
||||
/* Set atdevbase */
|
||||
/* atdevbase is first available logical memory address */
|
||||
mov.l XLatdevbase, r0
|
||||
mov.l XLVADDRSTART, r1
|
||||
mov.l r1, @r0
|
||||
|
||||
/* avail_start is first available physical memory address */
|
||||
mov.l XLavail_start, r0
|
||||
mov.l r2, @r0
|
||||
|
||||
mov r2, r4 /* set empty area address to first param(R4) */
|
||||
mov.l XLinitSH3, r0
|
||||
jsr @r0 /* call initSH3() */
|
||||
nop
|
||||
|
||||
mov.l XLmain, r0
|
||||
jsr @r0 /* call main() */
|
||||
nop
|
||||
|
||||
#define INIT_STACK 0x8c3ff000
|
||||
#define SHREG_TRA 0xFFFFFFD0
|
||||
#define SHREG_EXPEVT 0xFFFFFFD4
|
||||
#define SHREG_INTEVT 0xFFFFFFD8
|
||||
#define VBRINIT 0x8c000000
|
||||
#define Trap100Vec VBRINIT+0x100
|
||||
#define Trap600Vec VBRINIT+0x600
|
||||
#define TLBVECTOR VBRINIT+0x400
|
||||
#define VADDRSTART 0xd0000000
|
||||
|
||||
.align 2
|
||||
|
||||
XLInitializeBsc:
|
||||
.long _InitializeBsc
|
||||
XLtlbmisshandler_stub:
|
||||
.long tlbmisshandler_stub
|
||||
XLtlbmisshandler_stub_end:
|
||||
.long tlbmisshandler_stub_end
|
||||
XLTLBVECTOR:
|
||||
.long TLBVECTOR
|
||||
XLVBRINIT:
|
||||
.long VBRINIT
|
||||
XLMonTrap100:
|
||||
.long MonTrap100
|
||||
XLMonTrap600:
|
||||
.long MonTrap600
|
||||
XLMonTrap100_end:
|
||||
.long MonTrap100_end
|
||||
XLMonTrap600_end:
|
||||
.long MonTrap600_end
|
||||
XLTrap100Vec:
|
||||
.long Trap100Vec
|
||||
XLTrap600Vec:
|
||||
.long Trap600Vec
|
||||
XL_bss_start:
|
||||
.long _edata
|
||||
___start:
|
||||
.long start
|
||||
___end:
|
||||
.long _end
|
||||
XLtmpstk:
|
||||
.long INIT_STACK
|
||||
_KERNBASE:
|
||||
.long KERNBASE
|
||||
_RAM_START:
|
||||
.long IOM_RAM_BEGIN
|
||||
_ROM_START:
|
||||
.long IOM_ROM_BEGIN
|
||||
XL_PGOFSET:
|
||||
.long PGOFSET
|
||||
_SYSMAP:
|
||||
.long SYSMAP
|
||||
___etext:
|
||||
.long _etext
|
||||
XL_KERNTEXTOFF:
|
||||
.long KERNTEXTOFF
|
||||
XL_PG_V:
|
||||
.long PG_V
|
||||
XL_PG_KR:
|
||||
.long PG_KR
|
||||
XL_PG_4K:
|
||||
.long PG_4K
|
||||
XL_PG_M:
|
||||
.long PG_M
|
||||
XL_PG_N:
|
||||
.long PG_N
|
||||
XL_NBPG:
|
||||
.long NBPG
|
||||
XL_PG_KW:
|
||||
.long PG_KW
|
||||
XL_PTDPTDI:
|
||||
.long PTDPTDI
|
||||
XLSHREG_TTB:
|
||||
.long 0xfffffff8
|
||||
_MMUCR:
|
||||
.long 0xffffffe0 /* MMUCR register address */
|
||||
XLUSPACE:
|
||||
.long USPACE
|
||||
XL_proc0paddr:
|
||||
.long _proc0paddr
|
||||
XLKernelStack:
|
||||
.long KernelStack
|
||||
XLatdevbase:
|
||||
.long _atdevbase
|
||||
XLVADDRSTART:
|
||||
.long VADDRSTART
|
||||
XLavail_start:
|
||||
.long _avail_start
|
||||
XLinitSH3:
|
||||
.long _initSH3
|
||||
XLmain:
|
||||
.long _main
|
||||
XLTABLESIZE:
|
||||
.long TABLESIZE
|
||||
XL_SPTmap:
|
||||
.long _SPTmap
|
||||
XL_PTmap: .long _PTmap
|
||||
XL_PTD: .long _PTD
|
||||
XL_PTDpde: .long _PTDpde
|
||||
XL_Sysmap: .long _Sysmap
|
||||
XL_nkpde: .long _nkpde
|
||||
XL_NKPDE: .long 8
|
||||
XL_FRAMESIZE: .long FRAMESIZE
|
||||
XL_MMEYE_LED: .long LED_ADDR
|
||||
XLInitializeBsc:.long _InitializeBsc
|
||||
___start: .long start
|
||||
___etext: .long _etext
|
||||
___end: .long _end
|
||||
XLtmpstk: .long INIT_STACK
|
||||
_KERNBASE: .long KERNBASE
|
||||
_RAM_START: .long IOM_RAM_BEGIN
|
||||
_ROM_START: .long IOM_ROM_BEGIN
|
||||
XLKernelStack: .long KernelStack
|
||||
XLinitSH3: .long _initSH3
|
||||
XLmain: .long _main
|
||||
|
||||
NENTRY(proc_trampoline)
|
||||
mov r11, r4
|
||||
|
|
@ -820,12 +388,12 @@ NENTRY(sigcode)
|
|||
jsr @r0
|
||||
nop
|
||||
|
||||
1: mov r15, r0
|
||||
mov r15, r0
|
||||
add #SIGF_SC, r0
|
||||
mov.l r0, @-r15 /* junk to fake return address */
|
||||
mov r0, r4
|
||||
mov.l XLSYS___sigreturn14, r0
|
||||
trapa #0x80 /* enter kernel with args on stack */
|
||||
trapa #0x80 /* enter kernel with args on stack */
|
||||
mov.l XLSYS_exit, r0
|
||||
trapa #0x80 /* exit if sigreturn fails */
|
||||
|
||||
|
|
@ -1081,7 +649,7 @@ switch_search:
|
|||
*/
|
||||
|
||||
/* Wait for new process. */
|
||||
CLI # splhigh doesn't do a cli
|
||||
CLI /* splhigh doesn't do a cli */
|
||||
mov.l XXXLwhichqs, r0
|
||||
mov.l @r0, r0
|
||||
mov r0, r14
|
||||
|
|
@ -1358,11 +926,11 @@ switch_exited:
|
|||
nop
|
||||
|
||||
mov.l @r0, r0
|
||||
mov.l XLLSHREG_TTB, r2
|
||||
mov #SHREG_TTB, r2
|
||||
mov.l r0, @r2
|
||||
|
||||
/* flush TLB */
|
||||
mov.l XL_MMUCR, r0
|
||||
mov #SHREG_MMUCR, r0
|
||||
mov #4, r1
|
||||
mov.l @r0, r2
|
||||
or r1, r2
|
||||
|
|
@ -1441,11 +1009,11 @@ ENTRY(switch_exit)
|
|||
mov r10, r0
|
||||
add #PCB_PAGEDIRREG, r0
|
||||
mov.l @r0, r2
|
||||
mov.l XLLSHREG_TTB, r1
|
||||
mov #SHREG_TTB, r1
|
||||
mov.l r2, @r1
|
||||
|
||||
/* flush TLB */
|
||||
mov.l XL_MMUCR, r0
|
||||
mov #SHREG_MMUCR, r0
|
||||
mov #4, r1
|
||||
mov.l @r0, r2
|
||||
or r1, r2
|
||||
|
|
@ -1480,6 +1048,9 @@ ENTRY(switch_exit)
|
|||
XLexit2:
|
||||
.long _exit2
|
||||
|
||||
XXLP_ADDR:
|
||||
.long P_ADDR
|
||||
|
||||
/*
|
||||
* savectx(struct pcb *pcb);
|
||||
* Update pcb, saving current processor state.
|
||||
|
|
@ -1497,9 +1068,6 @@ ENTRY(savectx)
|
|||
rts
|
||||
nop
|
||||
|
||||
.align 2
|
||||
XXLP_ADDR: .long P_ADDR
|
||||
|
||||
/*****************************************************************************/
|
||||
/*
|
||||
* Trap and fault vector routines
|
||||
|
|
@ -1532,16 +1100,15 @@ NENTRY(exphandler)
|
|||
100:
|
||||
#endif
|
||||
|
||||
mov.l XL_EXPEVTREG, r0
|
||||
mov #SHREG_EXPEVT, r0
|
||||
mov.l @r0, r0
|
||||
mov.l XL_TLBINVALID, r1
|
||||
cmp/eq r0, r1
|
||||
cmp/eq #0x40, r0 /* T_TLBINVALIDR */
|
||||
bf 1f
|
||||
3:
|
||||
mov.l XL_tlbmisshandler, r0
|
||||
jmp @r0
|
||||
1:
|
||||
mov.l XL_TLBINVALIDW, r1
|
||||
cmp/eq #0x60, r0 /* T_TLBINVALIDW */
|
||||
cmp/eq r0, r1
|
||||
bt 3b
|
||||
|
||||
|
|
@ -1550,7 +1117,7 @@ NENTRY(exphandler)
|
|||
bt 3b
|
||||
|
||||
INTRENTRY
|
||||
mov.l XL_EXPEVTREG, r0
|
||||
mov #SHREG_EXPEVT, r0
|
||||
mov.l @r0, r0
|
||||
mov.l r0, @-r15
|
||||
ECLI
|
||||
|
|
@ -1596,22 +1163,19 @@ NENTRY(exphandler)
|
|||
1: INTRFASTEXIT
|
||||
|
||||
.align 2
|
||||
XL_TLBINVALID:
|
||||
.long 0x00000040
|
||||
XL_TLBINVALIDW:
|
||||
.long 0x00000060
|
||||
XL_TLBPROTWR:
|
||||
.long 0x000000c0
|
||||
|
||||
.align 2
|
||||
tlbmisshandler_stub:
|
||||
.globl _tlbmisshandler_stub, _tlbmisshandler_stub_end
|
||||
|
||||
_tlbmisshandler_stub:
|
||||
mov.l XL_tlbmisshandler, r0
|
||||
jmp @r0
|
||||
nop
|
||||
.align 2
|
||||
XL_tlbmisshandler:
|
||||
.long _tlbmisshandler
|
||||
tlbmisshandler_stub_end:
|
||||
.long _tlbmisshandler
|
||||
_tlbmisshandler_stub_end:
|
||||
|
||||
.align 2
|
||||
NENTRY(tlbmisshandler)
|
||||
|
|
@ -1628,7 +1192,7 @@ NENTRY(tlbmisshandler)
|
|||
jmp @r0
|
||||
nop
|
||||
.align 2
|
||||
XL_splimit3: .long _end
|
||||
XL_splimit3: .long _end
|
||||
XL_splimit_low3: .long 0x80000000
|
||||
100:
|
||||
#endif
|
||||
|
|
@ -1645,7 +1209,8 @@ XL_splimit_low3: .long 0x80000000
|
|||
INTRFASTEXIT
|
||||
|
||||
.align 2
|
||||
MonTrap100:
|
||||
.globl _MonTrap100, _MonTrap100_end
|
||||
_MonTrap100:
|
||||
mov.l 1f, r0
|
||||
jmp @r0
|
||||
nop
|
||||
|
|
@ -1653,10 +1218,11 @@ MonTrap100:
|
|||
.align 2
|
||||
1:
|
||||
.long _exphandler
|
||||
MonTrap100_end:
|
||||
_MonTrap100_end:
|
||||
|
||||
.align 2
|
||||
MonTrap600:
|
||||
.globl _MonTrap600, _MonTrap600_end
|
||||
_MonTrap600:
|
||||
mov.l 1f, r0
|
||||
jmp @r0
|
||||
nop
|
||||
|
|
@ -1664,39 +1230,23 @@ MonTrap600:
|
|||
.align 2
|
||||
1:
|
||||
.long _ihandler
|
||||
MonTrap600_end:
|
||||
_MonTrap600_end:
|
||||
|
||||
/************************************************************************/
|
||||
/* Immediate Data */
|
||||
/************************************************************************/
|
||||
|
||||
/***********************************************************************/
|
||||
/* Immediate Data */
|
||||
/***********************************************************************/
|
||||
.align 2
|
||||
|
||||
XLMonTrap100Vec:
|
||||
.long 0xa0000100
|
||||
XLMonTrap600Vec:
|
||||
.long 0xa0000600
|
||||
|
||||
XLLSHREG_TTB: .long 0xfffffff8
|
||||
XL_MMUCR: .long 0xffffffe0 /* MMUCR register address */
|
||||
XL_curpcb: .long _curpcb
|
||||
XLLUSPACE: .long USPACE
|
||||
XLkernel_map: .long _kernel_map
|
||||
XLLKernelStack: .long KernelStack
|
||||
_KERNEL_START: .long IOM_RAM_BEGIN+0x10000
|
||||
_USPACE: .long USPACE
|
||||
_NBPG: .long NBPG
|
||||
XLcurproc: .long _curproc
|
||||
XLcpl: .long _cpl
|
||||
XLXspllower: .long _Xspllower
|
||||
XLproc0: .long _proc0
|
||||
|
||||
XL_EXPEVTREG: .long SHREG_EXPEVT
|
||||
XL_TRAREG: .long SHREG_TRA
|
||||
XL_trap: .long _trap
|
||||
XL_astpending: .long _astpending
|
||||
XLT_ASTFLT: .long T_ASTFLT
|
||||
XL_tlbmisshandler_stub:
|
||||
.long _tlbmisshandler
|
||||
XL_tlb_handler: .long _tlb_handler
|
||||
XLexphandler: .long _exphandler
|
||||
|
||||
|
|
@ -1719,7 +1269,7 @@ ENTRY(ConvVtoP)
|
|||
neg r1, r1
|
||||
shld r1, r0
|
||||
shll2 r0
|
||||
mov.l XXXLSHREG_TTB, r1
|
||||
mov #SHREG_TTB, r1
|
||||
mov.l @r1, r1
|
||||
add r0, r1
|
||||
mov.l @r1, r2 /* r2 = pde */
|
||||
|
|
@ -1749,7 +1299,6 @@ ENTRY(ConvVtoP)
|
|||
nop
|
||||
|
||||
.align 2
|
||||
XXXLSHREG_TTB: .long 0xfffffff8
|
||||
XL_PT_MASK: .long PT_MASK
|
||||
XL_PG_FRAME: .long PG_FRAME
|
||||
XL_CSMASK: .long 0xc0000000
|
||||
|
|
@ -1781,7 +1330,7 @@ XL_splimit_low2: .long 0x80000000
|
|||
100:
|
||||
#endif
|
||||
7:
|
||||
mov.l XL_INTEVTREG, r0
|
||||
mov #SHREG_INTEVT, r0
|
||||
mov.l @r0, r0
|
||||
mov.l r0, @-r15
|
||||
6:
|
||||
|
|
@ -1888,8 +1437,7 @@ ENTRY(cpu_printR15)
|
|||
rts
|
||||
nop
|
||||
|
||||
XL_fmt:
|
||||
.asciz "sp=0x%x\n"
|
||||
XL_fmt: .asciz "sp=0x%x\n"
|
||||
.align 2
|
||||
XL_printf:
|
||||
.long _printf
|
||||
|
|
@ -1897,10 +1445,8 @@ XL_printf:
|
|||
load_and_reset:
|
||||
mov.l XL_start_address, r0
|
||||
mov r0, r8
|
||||
mov.l @r4, r1 /* r1 = osimage size */
|
||||
add #4, r4
|
||||
mov.l @r4, r2 /* r2 = check sum */
|
||||
add #4, r4
|
||||
mov.l @r4+, r1 /* r1 = osimage size */
|
||||
mov.l @r4+, r2 /* r2 = check sum */
|
||||
shlr2 r1 /* r1 = osimage size in dword */
|
||||
1:
|
||||
mov.l @r4+, r3
|
||||
|
|
@ -1936,11 +1482,11 @@ ENTRY(XLoadAndReset)
|
|||
|
||||
.align 2
|
||||
XL_load_trampoline_addr:
|
||||
.long 0x8c008000
|
||||
.long 0x8c008000
|
||||
XL_load_and_reset:
|
||||
.long load_and_reset
|
||||
.long load_and_reset
|
||||
XL_load_and_reset_end:
|
||||
.long load_and_reset_end
|
||||
.long load_and_reset_end
|
||||
|
||||
ENTRY(Sh3Reset)
|
||||
mov.l XL_reset_vector, r8
|
||||
|
|
@ -1949,7 +1495,7 @@ ENTRY(Sh3Reset)
|
|||
|
||||
.align 2
|
||||
XL_reset_vector:
|
||||
.long 0xa0000000
|
||||
.long 0xa0000000
|
||||
|
||||
.globl _intrcnt, _eintrcnt, _intrnames, _eintrnames
|
||||
_intrcnt:
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: machdep.c,v 1.2 1999/09/14 11:21:27 tsubai Exp $ */
|
||||
/* $NetBSD: machdep.c,v 1.3 1999/09/16 21:23:40 msaitoh Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
|
||||
|
|
@ -146,21 +146,19 @@ char cpu_model[120];
|
|||
|
||||
char bootinfo[BOOTINFO_MAXSIZE];
|
||||
|
||||
int physmem;
|
||||
int dumpmem_low;
|
||||
int dumpmem_high;
|
||||
extern int boothowto;
|
||||
int cpu_class;
|
||||
|
||||
int physmem;
|
||||
int dumpmem_low;
|
||||
int dumpmem_high;
|
||||
vaddr_t atdevbase; /* location of start of iomem in virtual */
|
||||
paddr_t msgbuf_paddr;
|
||||
struct user *proc0paddr;
|
||||
|
||||
vm_map_t exec_map = NULL;
|
||||
vm_map_t mb_map = NULL;
|
||||
vm_map_t phys_map = NULL;
|
||||
|
||||
extern int boothowto;
|
||||
extern paddr_t avail_start, avail_end;
|
||||
extern u_long atdevbase;
|
||||
extern int etext,_start;
|
||||
|
||||
#ifdef SYSCALL_DEBUG
|
||||
#define SCDEBUG_ALL 0x0004
|
||||
|
|
@ -186,17 +184,15 @@ struct extent *ioport_ex;
|
|||
struct extent *iomem_ex;
|
||||
static int ioport_malloc_safe;
|
||||
|
||||
void setup_bootinfo __P((void));
|
||||
void dumpsys __P((void));
|
||||
void identifycpu __P((void));
|
||||
void initSH3 __P((vaddr_t));
|
||||
void InitializeSci __P((unsigned char));
|
||||
void Send16550 __P((int c));
|
||||
void Init16550 __P((void));
|
||||
void sh3_cache_on __P((void));
|
||||
void LoadAndReset __P((char *osimage));
|
||||
void XLoadAndReset __P((char *osimage));
|
||||
void Sh3Reset __P((void));
|
||||
void setup_bootinfo __P((void));
|
||||
void dumpsys __P((void));
|
||||
void identifycpu __P((void));
|
||||
void initSH3 __P((void *));
|
||||
void InitializeSci __P((unsigned char));
|
||||
void sh3_cache_on __P((void));
|
||||
void LoadAndReset __P((char *));
|
||||
void XLoadAndReset __P((char *));
|
||||
void Sh3Reset __P((void));
|
||||
|
||||
#include <dev/ic/comreg.h>
|
||||
#include <dev/ic/comvar.h>
|
||||
|
|
@ -207,8 +203,6 @@ void consinit __P((void));
|
|||
static int exec_nomid __P((struct proc *, struct exec_package *));
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Machine-dependent startup code
|
||||
*
|
||||
|
|
@ -225,7 +219,6 @@ cpu_startup()
|
|||
vsize_t size;
|
||||
struct pcb *pcb;
|
||||
char pbuf[9];
|
||||
/* int x; */
|
||||
|
||||
printf(version);
|
||||
|
||||
|
|
@ -256,7 +249,6 @@ cpu_startup()
|
|||
UVM_ADV_NORMAL, 0)) != KERN_SUCCESS)
|
||||
panic("cpu_startup: cannot allocate VM for buffers");
|
||||
minaddr = (vaddr_t)buffers;
|
||||
|
||||
if ((bufpages / nbuf) >= btoc(MAXBSIZE)) {
|
||||
/* don't want to alloc more physical mem than needed */
|
||||
bufpages = btoc(MAXBSIZE) * nbuf;
|
||||
|
|
@ -264,7 +256,6 @@ cpu_startup()
|
|||
|
||||
base = bufpages / nbuf;
|
||||
residual = bufpages % nbuf;
|
||||
|
||||
for (i = 0; i < nbuf; i++) {
|
||||
vsize_t curbufsize;
|
||||
vaddr_t curbuf;
|
||||
|
|
@ -280,11 +271,6 @@ cpu_startup()
|
|||
curbufsize = CLBYTES * ((i < residual) ? (base+1) : base);
|
||||
|
||||
while (curbufsize) {
|
||||
/*
|
||||
* Attempt to allocate buffers from the first
|
||||
* 16M of RAM to avoid bouncing file system
|
||||
* transfers.
|
||||
*/
|
||||
pg = uvm_pagealloc(NULL, 0, NULL, 0);
|
||||
if (pg == NULL)
|
||||
panic("cpu_startup: not enough memory for "
|
||||
|
|
@ -344,7 +330,7 @@ cpu_startup()
|
|||
scdebug |= SCDEBUG_ALL;
|
||||
#endif
|
||||
|
||||
#if 0
|
||||
#ifdef FORCE_RB_SINGLE
|
||||
boothowto |= RB_SINGLE;
|
||||
#endif
|
||||
}
|
||||
|
|
@ -610,7 +596,8 @@ sys___sigreturn14(p, v, retval)
|
|||
return (EJUSTRETURN);
|
||||
}
|
||||
|
||||
int waittime = -1;
|
||||
int waittime = -1;
|
||||
int cold = 1;
|
||||
struct pcb dumppcb;
|
||||
|
||||
void
|
||||
|
|
@ -618,7 +605,6 @@ cpu_reboot(howto, bootstr)
|
|||
int howto;
|
||||
char *bootstr;
|
||||
{
|
||||
extern int cold;
|
||||
|
||||
if (cold) {
|
||||
howto |= RB_HALT;
|
||||
|
|
@ -875,27 +861,134 @@ setregs(p, pack, stack)
|
|||
tf->tf_ssr = PSL_USERSET;
|
||||
tf->tf_r15 = stack;
|
||||
#ifdef TODO
|
||||
tf->tf_ebx = (int)PS_STRINGS;
|
||||
tf->tf_r9 = (int)PS_STRINGS;
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Initialize segments and descriptor tables
|
||||
*/
|
||||
#define VBRINIT ((char *)0x8c000000)
|
||||
#define Trap100Vec (VBRINIT + 0x100)
|
||||
#define Trap600Vec (VBRINIT + 0x600)
|
||||
#define TLBVECTOR (VBRINIT + 0x400)
|
||||
#define VADDRSTART VM_MIN_KERNEL_ADDRESS
|
||||
|
||||
extern struct user *proc0paddr;
|
||||
extern int nkpde;
|
||||
extern char MonTrap100[], MonTrap100_end[];
|
||||
extern char MonTrap600[], MonTrap600_end[];
|
||||
extern char _start[], etext[], edata[], end[];
|
||||
extern char tlbmisshandler_stub[], tlbmisshandler_stub_end[];
|
||||
|
||||
void
|
||||
initSH3(first_avail)
|
||||
vaddr_t first_avail;
|
||||
initSH3(pc)
|
||||
void *pc; /* XXX return address */
|
||||
{
|
||||
unsigned short *p;
|
||||
unsigned short sum;
|
||||
int size;
|
||||
extern void consinit __P((void));
|
||||
paddr_t avail;
|
||||
pd_entry_t *pagedir;
|
||||
pt_entry_t *pagetab, pte;
|
||||
u_int sp;
|
||||
int x;
|
||||
char *p;
|
||||
|
||||
avail = sh3_round_page(end);
|
||||
|
||||
/*
|
||||
* clear .bss, .common area, page dir area,
|
||||
* process0 stack, page table area
|
||||
*/
|
||||
|
||||
p = (char *)avail + (1 + UPAGES) * NBPG + NBPG * 9;
|
||||
bzero(edata, p - edata);
|
||||
|
||||
/*
|
||||
* install trap handler
|
||||
*/
|
||||
bcopy(MonTrap100, Trap100Vec, MonTrap100_end - MonTrap100);
|
||||
bcopy(MonTrap600, Trap600Vec, MonTrap600_end - MonTrap600);
|
||||
__asm ("ldc %0, vbr" :: "r"(VBRINIT));
|
||||
|
||||
/*
|
||||
* edata end
|
||||
* +-------------+------+-----+----------+-------------+------------+
|
||||
* | kernel text | data | bss | Page Dir | Proc0 Stack | Page Table |
|
||||
* +-------------+------+-----+----------+-------------+------------+
|
||||
* NBPG USPACE 9*NBPG
|
||||
* (= 4*NBPG)
|
||||
* Build initial page tables
|
||||
*/
|
||||
pagedir = (void *)avail;
|
||||
pagetab = (void *)(avail + SYSMAP);
|
||||
nkpde = 8; /* XXX nkpde = kernel page dir area (32 Mbyte) */
|
||||
|
||||
/*
|
||||
* Construct a page table directory
|
||||
* In SH3 H/W does not support PTD,
|
||||
* these structures are used by S/W.
|
||||
*/
|
||||
pte = (pt_entry_t)pagetab;
|
||||
pte |= PG_KW | PG_V | PG_4K | PG_M | PG_N;
|
||||
pagedir[KERNTEXTOFF >> PDSHIFT] = pte;
|
||||
|
||||
/* make pde for 0xd0000000, 0xd0400000, 0xd0800000,0xd0c00000,
|
||||
0xd1000000, 0xd1400000, 0xd1800000, 0xd1c00000 */
|
||||
pte += NBPG;
|
||||
for (x = 0; x < nkpde; x++) {
|
||||
pagedir[(VADDRSTART >> PDSHIFT) + x] = pte;
|
||||
pte += NBPG;
|
||||
}
|
||||
|
||||
/* Install a PDE recursively mapping page directory as a page table! */
|
||||
pte = (u_int)pagedir;
|
||||
pte |= PG_V | PG_4K | PG_KW | PG_M | PG_N;
|
||||
pagedir[PDSLOT_PTE] = pte;
|
||||
|
||||
/* set PageDirReg */
|
||||
SHREG_TTB = (u_int)pagedir;
|
||||
|
||||
/* Set TLB miss handler */
|
||||
p = tlbmisshandler_stub;
|
||||
x = tlbmisshandler_stub_end - p;
|
||||
bcopy(p, TLBVECTOR, x);
|
||||
|
||||
/*
|
||||
* Activate MMU
|
||||
*/
|
||||
#ifndef ROMIMAGE
|
||||
MMEYE_LED = 1;
|
||||
#endif
|
||||
|
||||
#define MMUCR_AT 0x0001 /* address traslation enable */
|
||||
#define MMUCR_IX 0x0002 /* index mode */
|
||||
#define MMUCR_TF 0x0004 /* TLB flush */
|
||||
#define MMUCR_SV 0x0100 /* single virtual space mode */
|
||||
|
||||
SHREG_MMUCR = MMUCR_AT | MMUCR_TF | MMUCR_SV;
|
||||
|
||||
/*
|
||||
* Now here is virtual address
|
||||
*/
|
||||
#ifndef ROMIMAGE
|
||||
MMEYE_LED = 0;
|
||||
#endif
|
||||
|
||||
/* Set proc0paddr */
|
||||
proc0paddr = (void *)(avail + NBPG);
|
||||
|
||||
/* Set pcb->PageDirReg of proc0 */
|
||||
proc0paddr->u_pcb.pageDirReg = (int)pagedir;
|
||||
|
||||
/* avail_start is first available physical memory address */
|
||||
avail_start = avail + NBPG + USPACE + NBPG + NBPG * nkpde;
|
||||
|
||||
/* atdevbase is first available logical memory address */
|
||||
atdevbase = VADDRSTART;
|
||||
|
||||
proc0.p_addr = proc0paddr; /* page dir address */
|
||||
|
||||
/* XXX: PMAP_NEW requires valid curpcb. also init'd in cpu_startup */
|
||||
curpcb = &proc0.p_addr->u_pcb;
|
||||
|
||||
/*
|
||||
* Initialize the I/O port and I/O mem extent maps.
|
||||
* Note: we don't have to check the return value since
|
||||
|
|
@ -911,7 +1004,7 @@ initSH3(first_avail)
|
|||
(caddr_t)iomem_ex_storage, sizeof(iomem_ex_storage),
|
||||
EX_NOCOALESCE|EX_NOWAIT);
|
||||
|
||||
#if 0 /* XXX (msaitoh) */
|
||||
#if 0
|
||||
consinit(); /* XXX SHOULD NOT BE DONE HERE */
|
||||
#endif
|
||||
|
||||
|
|
@ -920,44 +1013,37 @@ initSH3(first_avail)
|
|||
|
||||
avail_end = sh3_trunc_page(IOM_RAM_END + 1);
|
||||
|
||||
#if 0 /* XXX (msaitoh) */
|
||||
printf("initSH3\r\n");
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Calculate check sum
|
||||
*/
|
||||
size = (char *)&etext - (char *)&_start;
|
||||
p = (unsigned short *)&_start;
|
||||
{
|
||||
u_short *p, sum;
|
||||
int size;
|
||||
|
||||
size = etext - _start;
|
||||
p = (u_short *)_start;
|
||||
sum = 0;
|
||||
size >>= 1;
|
||||
while (size--)
|
||||
sum += *p++;
|
||||
#if 0
|
||||
printf("Check Sum = 0x%x", sum);
|
||||
#endif
|
||||
|
||||
printf("Check Sum = 0x%x\r\n", sum);
|
||||
}
|
||||
/*
|
||||
* Allocate the physical addresses used by RAM from the iomem
|
||||
* extent map. This is done before the addresses are
|
||||
* page rounded just to make sure we get them all.
|
||||
*/
|
||||
if (extent_alloc_region(iomem_ex, IOM_RAM_BEGIN,
|
||||
IOM_RAM_SIZE,
|
||||
(IOM_RAM_END-IOM_RAM_BEGIN) + 1,
|
||||
EX_NOWAIT)) {
|
||||
/* XXX What should we do? */
|
||||
#if 1
|
||||
printf("WARNING: CAN'T ALLOCATE RAM MEMORY FROM IOMEM EXTENT MAP!\n");
|
||||
#endif
|
||||
}
|
||||
|
||||
#if 0 /* avail_start is set in locore.s to first available page rounded
|
||||
physical mem */
|
||||
avail_start = IOM_RAM_BEGIN + NBPG;
|
||||
#endif
|
||||
|
||||
/* number of pages of physmem addr space */
|
||||
physmem = btoc(IOM_RAM_SIZE);
|
||||
physmem = btoc(IOM_RAM_END - IOM_RAM_BEGIN +1);
|
||||
#ifdef TODO
|
||||
dumpmem = physmem;
|
||||
#endif
|
||||
|
|
@ -976,7 +1062,7 @@ initSH3(first_avail)
|
|||
}
|
||||
|
||||
/* Call pmap initialization to make new kernel address space */
|
||||
pmap_bootstrap((vaddr_t)atdevbase);
|
||||
pmap_bootstrap(atdevbase);
|
||||
|
||||
/*
|
||||
* Initialize error message buffer (at end of core).
|
||||
|
|
@ -992,6 +1078,14 @@ initSH3(first_avail)
|
|||
sh3_cache_on();
|
||||
#endif
|
||||
|
||||
/* setup proc0 stack */
|
||||
sp = avail + NBPG + USPACE - 16 - sizeof(struct trapframe);
|
||||
|
||||
/*
|
||||
* XXX We can't return here, because we change stack pointer.
|
||||
* So jump to return address directly.
|
||||
*/
|
||||
__asm __volatile ("jmp @%0; mov %1, r15" :: "r"(pc), "r"(sp));
|
||||
}
|
||||
|
||||
struct queue {
|
||||
|
|
@ -1262,7 +1356,7 @@ InitializeBsc()
|
|||
* Area4 = Normal Memory
|
||||
* Area6 = Normal memory
|
||||
*/
|
||||
SHREG_BSC.BCR1.WORD = BSC_BCR1_VAL;
|
||||
SHREG_BCR1 = BSC_BCR1_VAL;
|
||||
|
||||
/*
|
||||
* Bus Width
|
||||
|
|
@ -1271,14 +1365,14 @@ InitializeBsc()
|
|||
* Area1 = 8bit
|
||||
* Area2,3: Bus width = 32bit
|
||||
*/
|
||||
SHREG_BSC.BCR2.WORD = BSC_BCR2_VAL;
|
||||
SHREG_BCR2 = BSC_BCR2_VAL;
|
||||
|
||||
/*
|
||||
* Idle cycle number in transition area and read to write
|
||||
* Area6 = 3, Area5 = 3, Area4 = 3, Area3 = 3, Area2 = 3
|
||||
* Area1 = 3, Area0 = 3
|
||||
*/
|
||||
SHREG_BSC.WCR1.WORD = BSC_WCR1_VAL;
|
||||
SHREG_WCR1 = BSC_WCR1_VAL;
|
||||
|
||||
/*
|
||||
* Wait cycle
|
||||
|
|
@ -1289,10 +1383,10 @@ InitializeBsc()
|
|||
* Area 2,1 = 3
|
||||
* Area 0 = 6
|
||||
*/
|
||||
SHREG_BSC.WCR2.WORD = BSC_WCR2_VAL;
|
||||
SHREG_WCR2 = BSC_WCR2_VAL;
|
||||
|
||||
#ifdef SH4
|
||||
SHREG_BSC.WCR3.WORD = BSC_WCR3_VAL;
|
||||
SHREG_WCR3 = BSC_WCR3_VAL;
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -1302,7 +1396,7 @@ InitializeBsc()
|
|||
* Disable burst, Bus size=32bit, Column Address=10bit, Refresh ON
|
||||
* CAS before RAS refresh ON, EDO DRAM
|
||||
*/
|
||||
SHREG_BSC.MCR.WORD = BSC_MCR_VAL;
|
||||
SHREG_MCR = BSC_MCR_VAL;
|
||||
|
||||
#ifdef BSC_SDMR_VAL
|
||||
#if 1
|
||||
|
|
@ -1326,7 +1420,7 @@ InitializeBsc()
|
|||
* OE/WE negate-address delay 3.5 cycle
|
||||
*/
|
||||
#ifdef BSC_PCR_VAL
|
||||
SHREG_BSC.PCR.WORD = 0x00ff;
|
||||
SHREG_PCR = 0x00ff;
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
@ -1336,21 +1430,21 @@ InitializeBsc()
|
|||
* In following statement, the reason why high byte = 0xa5(a4 in RFCR)
|
||||
* is the rule of SH3 in writing these register.
|
||||
*/
|
||||
SHREG_BSC.RTCSR.WORD = BSC_RTCSR_VAL;
|
||||
SHREG_RTCSR = BSC_RTCSR_VAL;
|
||||
|
||||
|
||||
/*
|
||||
* Refresh Timer Counter
|
||||
* Initialize to 0
|
||||
*/
|
||||
SHREG_BSC.RTCNT = BSC_RTCNT_VAL;
|
||||
SHREG_RTCNT = BSC_RTCNT_VAL;
|
||||
|
||||
/* set Refresh Time Constant Register */
|
||||
SHREG_BSC.RTCOR = BSC_RTCOR_VAL;
|
||||
SHREG_RTCOR = BSC_RTCOR_VAL;
|
||||
|
||||
/* init Refresh Count Register */
|
||||
#ifdef BSC_RFCR_VAL
|
||||
SHREG_BSC.RFCR = BSC_RFCR_VAL;
|
||||
SHREG_RFCR = BSC_RFCR_VAL;
|
||||
#endif
|
||||
|
||||
/* Set Clock mode (make internal clock double speed) */
|
||||
|
|
@ -1376,7 +1470,8 @@ sh3_cache_on(void)
|
|||
|
||||
#include <machine/mmeye.h>
|
||||
void
|
||||
LoadAndReset(char *osimage)
|
||||
LoadAndReset(osimage)
|
||||
char *osimage;
|
||||
{
|
||||
void *buf_addr;
|
||||
u_long size;
|
||||
|
|
@ -1389,17 +1484,17 @@ LoadAndReset(char *osimage)
|
|||
available memory */
|
||||
|
||||
|
||||
printf("LoadAndReset:copy start\n");
|
||||
printf("LoadAndReset: copy start\n");
|
||||
buf_addr = (void *)OSIMAGE_BUF_ADDR;
|
||||
|
||||
size = *(u_long *)osimage;
|
||||
src = (u_long *)osimage;
|
||||
dest = buf_addr;
|
||||
|
||||
size = (size + sizeof(u_long)*2 + 3) >> 2 ;
|
||||
size = (size + sizeof(u_long) * 2 + 3) >> 2;
|
||||
size2 = size;
|
||||
|
||||
while (size--){
|
||||
while (size--) {
|
||||
csum += *src;
|
||||
*dest++ = *src++;
|
||||
}
|
||||
|
|
@ -1408,7 +1503,7 @@ LoadAndReset(char *osimage)
|
|||
while (size2--)
|
||||
csum2 += *dest++;
|
||||
|
||||
printf("LoadAndReset:copy end[%lx,%lx]\n", csum, csum2);
|
||||
printf("LoadAndReset: copy end[%lx,%lx]\n", csum, csum2);
|
||||
printf("start XLoadAndReset\n");
|
||||
|
||||
/* mask all externel interrupt (XXX) */
|
||||
|
|
|
|||
Loading…
Reference in New Issue