From 5a85739cac63604626de3297da3bfc55581d17c5 Mon Sep 17 00:00:00 2001
From: macallan <macallan@NetBSD.org>
Date: Thu, 25 Dec 2014 05:13:49 +0000
Subject: [PATCH] - use the same parameter block as the linux driver, only with
 DMA disabled - reset the chip before handing it to dwc2/ now it actually
 detects some devices

---
 sys/arch/mips/ingenic/ingenic_dwctwo.c | 65 +++++++++++++++-----------
 1 file changed, 39 insertions(+), 26 deletions(-)

diff --git a/sys/arch/mips/ingenic/ingenic_dwctwo.c b/sys/arch/mips/ingenic/ingenic_dwctwo.c
index 970f65072b73..0fc28671e603 100644
--- a/sys/arch/mips/ingenic/ingenic_dwctwo.c
+++ b/sys/arch/mips/ingenic/ingenic_dwctwo.c
@@ -1,4 +1,4 @@
-/*	$NetBSD: ingenic_dwctwo.c,v 1.3 2014/12/23 18:48:52 macallan Exp $ */
+/*	$NetBSD: ingenic_dwctwo.c,v 1.4 2014/12/25 05:13:49 macallan Exp $ */
 
 /*-
  * Copyright (c) 2014 Michael Lorenz
@@ -27,7 +27,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.3 2014/12/23 18:48:52 macallan Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.4 2014/12/25 05:13:49 macallan Exp $");
 
 /*
  * adapted from bcm2835_dwctwo.c
@@ -53,6 +53,8 @@ __KERNEL_RCSID(0, "$NetBSD: ingenic_dwctwo.c,v 1.3 2014/12/23 18:48:52 macallan
 #include <dwc2/dwc2.h>
 #include "dwc2_core.h"
 
+#include "opt_ingenic.h"
+
 struct ingenic_dwc2_softc {
 	struct dwc2_softc	sc_dwc2;
 
@@ -60,31 +62,31 @@ struct ingenic_dwc2_softc {
 };
 
 static struct dwc2_core_params ingenic_dwc2_params = {
-	.otg_cap			= 0,	/* HNP/SRP capable */
-	.otg_ver			= 0,	/* 1.3 */
-	.dma_enable			= 1,
+	.otg_cap			= -1,	/* HNP/SRP capable */
+	.otg_ver			= -1,	/* 1.3 */
+	.dma_enable			= 0,	/* for now */
 	.dma_desc_enable		= 0,
-	.speed				= 0,	/* High Speed */
-	.enable_dynamic_fifo		= 1,
-	.en_multiple_tx_fifo		= 1,
-	.host_rx_fifo_size		= 774,	/* 774 DWORDs */
-	.host_nperio_tx_fifo_size	= 256,	/* 256 DWORDs */
-	.host_perio_tx_fifo_size	= 512,	/* 512 DWORDs */
-	.max_transfer_size		= 65535,
-	.max_packet_count		= 511,
-	.host_channels			= 8,
-	.phy_type			= 1,	/* UTMI */
-	.phy_utmi_width			= 8,	/* 8 bits */
-	.phy_ulpi_ddr			= 0,	/* Single */
-	.phy_ulpi_ext_vbus		= 0,
-	.i2c_enable			= 0,
-	.ulpi_fs_ls			= 0,
-	.host_support_fs_ls_low_power	= 0,
-	.host_ls_low_power_phy_clk	= 0,	/* 48 MHz */
-	.ts_dline			= 0,
-	.reload_ctl			= 0,
-	.ahbcfg				= 0x10,
-	.uframe_sched			= 1,
+	.speed				= -1,	/* High Speed */
+	.enable_dynamic_fifo		= -1,
+	.en_multiple_tx_fifo		= -1,
+	.host_rx_fifo_size		= 1024,	/* 1024 DWORDs */
+	.host_nperio_tx_fifo_size	= 1024,	/* 1024 DWORDs */
+	.host_perio_tx_fifo_size	= 1024,	/* 1024 DWORDs */
+	.max_transfer_size		= -1,
+	.max_packet_count		= -1,
+	.host_channels			= -1,
+	.phy_type			= -1,	/* UTMI */
+	.phy_utmi_width			= -1,	/* 16 bits */
+	.phy_ulpi_ddr			= -1,	/* Single */
+	.phy_ulpi_ext_vbus		= -1,
+	.i2c_enable			= -1,
+	.ulpi_fs_ls			= -1,
+	.host_support_fs_ls_low_power	= -1,
+	.host_ls_low_power_phy_clk	= -1,	/* 48 MHz */
+	.ts_dline			= -1,
+	.reload_ctl			= -1,
+	.ahbcfg				= -1,
+	.uframe_sched			= 0,
 };
 
 static int ingenic_dwc2_match(device_t, struct cfdata *, void *);
@@ -152,13 +154,24 @@ ingenic_dwc2_attach(device_t parent, device_t self, void *aux)
 	reg &= ~PCR_CLK_M;
 	reg |= PCR_CLK_48;
 	reg |= PCR_WORD_I_F0;
+	reg |= PCR_WORD_I_F1;
 	writereg(JZ_USBPCR1, reg);
 #ifdef INGENIC_DEBUG
 	printf("JZ_USBPCR1 %08x\n", reg);
+	printf("JZ_USBRDT  %08x\n", readreg(JZ_USBRDT));
 #endif
 
 	delay(10000);
 
+	reg = readreg(JZ_USBPCR);
+	reg |= PCR_POR;
+	writereg(JZ_USBPCR, reg);
+	delay(1000);
+	reg &= ~PCR_POR;
+	writereg(JZ_USBPCR, reg);
+
+	delay(10000);
+
 	sc->sc_ih = evbmips_intr_establish(21, dwc2_intr, &sc->sc_dwc2);
 
 	if (sc->sc_ih == NULL) {