- if_tlp_cardbus.c: Use the `pmreg' pointer passed by by

cardbus_get_capability() [mirror change already made to if_tlp_pci.c]
- if_tlp_cardbus.c: If we don't find an ISV SROM, try to grab the
  Ethernet address from the CIS.
- if_tlp_cardbus.c: set CardBus cards to store-and-forward mode from
  the get-go.
- Put the TxThresh tables in tulipvar.h, and use them in the CardBus
  and PCI front-ends to go to store-and-forward mode.
- Document the Xircom X3201-3 clone a little more.
This commit is contained in:
thorpej 2000-04-04 19:22:50 +00:00
parent d11a9a62e2
commit 5a41b5bf56
5 changed files with 126 additions and 74 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_tlp_cardbus.c,v 1.22 2000/03/22 01:35:14 thorpej Exp $ */
/* $NetBSD: if_tlp_cardbus.c,v 1.23 2000/04/04 19:22:50 thorpej Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@ -112,8 +112,6 @@ struct tulip_cardbus_softc {
int sc_csr; /* CSR bits */
bus_size_t sc_mapsize; /* the size of mapped bus space
region */
/* product info */
const struct tulip_cardbus_product *sc_product;
int sc_cben; /* CardBus enables */
int sc_bar_reg; /* which BAR to use */
@ -136,16 +134,15 @@ const struct tulip_cardbus_product {
u_int32_t tcp_vendor; /* PCI vendor ID */
u_int32_t tcp_product; /* PCI product ID */
tulip_chip_t tcp_chip; /* base Tulip chip type */
int tcp_pmreg; /* power management register offset */
} tlp_cardbus_products[] = {
{ PCI_VENDOR_DEC, PCI_PRODUCT_DEC_21142,
TULIP_CHIP_21142, 0xe0 },
TULIP_CHIP_21142 },
{ PCI_VENDOR_XIRCOM, PCI_PRODUCT_XIRCOM_X3201_3_21143,
TULIP_CHIP_X3201_3, 0xe0 },
TULIP_CHIP_X3201_3 },
{ 0, 0,
TULIP_CHIP_INVALID, 0 },
TULIP_CHIP_INVALID },
};
void tlp_cardbus_setup __P((struct tulip_cardbus_softc *));
@ -213,7 +210,6 @@ tlp_cardbus_attach(parent, self, aux)
panic("tlp_cardbus_attach: impossible");
}
sc->sc_chip = tcp->tcp_chip;
csc->sc_product = tcp;
/*
* By default, Tulip registers are 8 bytes long (4 bytes
@ -325,11 +321,25 @@ tlp_cardbus_attach(parent, self, aux)
sc->sc_mediasw = &tlp_2114x_isv_mediasw;
}
if (sc->sc_mediasw == NULL) {
/*
* Bail out now if we can't deal with this board.
* If there's no MAC address in the CIS, bail out
* now.
*/
if (sc->sc_mediasw == NULL)
if (ca->ca_cis.funce.network.netid_present == 0)
goto cant_cope;
/* Grab the MAC address from the CIS. */
memcpy(enaddr, ca->ca_cis.funce.network.netid,
sizeof(enaddr));
/*
* XXX Assume MII-on-SIO. Should probably use
* XXX CIS strings to determine the GPIO reset
* XXX information.
*/
sc->sc_mediasw = &tlp_sio_mii_mediasw;
}
break;
case TULIP_CHIP_X3201_3:
@ -353,6 +363,13 @@ tlp_cardbus_attach(parent, self, aux)
/* Remember which interrupt line. */
csc->sc_intrline = ca->ca_intrline;
/*
* The CardBus cards will make it to store-and-forward mode as
* soon as you put them under any kind of load, so just start
* out there.
*/
sc->sc_txthresh = TXTH_SF;
/*
* Finish off the attach.
*/
@ -477,11 +494,11 @@ tlp_cardbus_setup(csc)
struct tulip_cardbus_softc *csc;
{
struct tulip_softc *sc = &csc->sc_tulip;
const struct tulip_cardbus_product *tcp = csc->sc_product;
cardbus_devfunc_t ct = csc->sc_ct;
cardbus_chipset_tag_t cc = ct->ct_cc;
cardbus_function_tag_t cf = ct->ct_cf;
pcireg_t reg;
int pmreg;
/*
* Check to see if the device is in power-save mode, and
@ -505,14 +522,8 @@ tlp_cardbus_setup(csc)
}
if (cardbus_get_capability(cc, cf, csc->sc_tag,
PCI_CAP_PWRMGMT, 0, 0)) {
if (tcp->tcp_pmreg == 0) {
printf("%s: don't know location of PMCSR for this "
"chip\n", sc->sc_dev.dv_xname);
return;
}
reg = cardbus_conf_read(cc, cf, csc->sc_tag,
tcp->tcp_pmreg) & 0x03;
PCI_CAP_PWRMGMT, &pmreg, 0)) {
reg = cardbus_conf_read(cc, cf, csc->sc_tag, pmreg + 4) & 0x03;
#if 1 /* XXX Probably not right for CardBus. */
if (reg == 3) {
/*
@ -528,7 +539,7 @@ tlp_cardbus_setup(csc)
printf("%s: waking up from power state D%d\n",
sc->sc_dev.dv_xname, reg);
cardbus_conf_write(cc, cf, csc->sc_tag,
tcp->tcp_pmreg, 0);
pmreg + 4, 0);
}
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: tulip.c,v 1.59 2000/04/02 23:38:05 mycroft Exp $ */
/* $NetBSD: tulip.c,v 1.60 2000/04/04 19:22:51 thorpej Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@ -92,53 +92,14 @@
const char *tlp_chip_names[] = TULIP_CHIP_NAMES;
/*
* The following tables compute the transmit threshold mode. We start
* at index 0. When ever we get a transmit underrun, we increment our
* index, falling back if we encounter the NULL terminator.
*
* Note: Store and forward mode is only available on the 100mbps chips
* (21140 and higher).
*/
const struct tulip_txthresh_tab tlp_10_txthresh_tab[] = {
{ OPMODE_TR_72, "72 bytes" },
{ OPMODE_TR_96, "96 bytes" },
{ OPMODE_TR_128, "128 bytes" },
{ OPMODE_TR_160, "160 bytes" },
{ 0, NULL },
};
const struct tulip_txthresh_tab tlp_10_txthresh_tab[] =
TLP_TXTHRESH_TAB_10;
const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] = {
{ OPMODE_TR_72, "72/128 bytes" },
{ OPMODE_TR_96, "96/256 bytes" },
{ OPMODE_TR_128, "128/512 bytes" },
{ OPMODE_TR_160, "160/1024 bytes" },
{ OPMODE_SF, "store and forward mode" },
{ 0, NULL },
};
const struct tulip_txthresh_tab tlp_10_100_txthresh_tab[] =
TLP_TXTHRESH_TAB_10_100;
#define TXTH_72 0
#define TXTH_96 1
#define TXTH_128 2
#define TXTH_160 3
#define TXTH_SF 4
/*
* The Winbond 89C840F does transmit threshold control totally
* differently. It simply has a 7-bit field which indicates
* the threshold:
*
* txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16;
*
* However, we just do Store-and-Forward mode on these chips, since
* the DMA engines seem to be flaky.
*/
const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] = {
{ 0, "store and forward mode" },
{ 0, NULL },
};
#define TXTH_WINB_SF 0
const struct tulip_txthresh_tab tlp_winb_txthresh_tab[] =
TLP_TXTHRESH_TAB_WINB;
void tlp_start __P((struct ifnet *));
void tlp_watchdog __P((struct ifnet *));

View File

@ -1,4 +1,4 @@
/* $NetBSD: tulipreg.h,v 1.17 2000/03/26 10:53:40 soren Exp $ */
/* $NetBSD: tulipreg.h,v 1.18 2000/04/04 19:22:52 thorpej Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@ -103,6 +103,17 @@
* but luckily, there are all AL981-specific registers,
* so this is easy to deal with.
*
* - Xircom X3201-3
*
* CardBus 21143 clone, with a few differences:
*
* - No MicroWire SROM; Ethernet address must come
* from CIS.
* - Transmit buffers must also be 32-bit aligned.
* - The BUSMODE_SWR bit is not self-clearing.
* - SIA is not 21143-like, and all media attachments
* are MII-on-SIO.
*
* Some of the clone chips have different registers, and some have
* different bits in the same registers. These will be denoted by
* PMAC, PNICII, PNIC, WINB, and ADM in the register/bit names.
@ -397,6 +408,7 @@ struct tulip_desc {
/*
* Transmit auto-polling not supported on:
* Winbond 89C040F
* Xircom X3201-3
*/
#define BUSMODE_TAP_NONE 0x00000000 /* no auto-polling */
#define BUSMODE_TAP_200us 0x00020000 /* 200 uS */
@ -495,6 +507,10 @@ struct tulip_desc {
#define STATUS_LC 0x08000000 /* 100baseTX link change
(21142/PMAC) */
#define STATUS_PMAC_WKUPI 0x10000000 /* wake up event */
#define STATUS_X3201_PMEIS 0x10000000 /* power management event
interrupt summary */
#define STATUS_X3201_SFIS 0x80000000 /* second function (Modem)
interrupt status */
/* CSR6 - Operation Mode */
@ -1391,4 +1407,26 @@ struct tulip_desc {
#define ADM_100CTR_ANC 0x1000 /* autoneg completed */
#define ADM_100CTR_DISRER 0x2000 /* disable Rx error counter */
/*
* Xircom X3201-3 registers
*/
/* Power Management Register */
#define CSR_X3201_PMR TULIP_CSR16
#define X3201_PMR_EDINT 0x0000000f /* energy detect interval */
#define X3201_PMR_EDEN 0x00000100 /* energy detect enable */
#define X3201_PMR_MPEN 0x00000200 /* magic packet enable */
#define X3201_PMR_WOLEN 0x00000400 /* Wake On Lan enable */
#define X3201_PMR_PMGP0EN 0x00001000 /* GP0 change enable */
#define X3201_PMR_PMLCEN 0x00002000 /* link change enable */
#define X3201_PMR_WOLTMEN 0x00008000 /* WOL template mem enable */
#define X3201_PMR_EP 0x00010000 /* energy present */
#define X3201_PMR_LP 0x00200000 /* link present */
#define X3201_PMR_EDES 0x01000000 /* ED event status */
#define X3201_PMR_MPES 0x02000000 /* MP event status */
#define X3201_PMR_WOLES 0x04000000 /* WOL event status */
#define X3201_PMR_WOLPS 0x08000000 /* WOL process status */
#define X3201_PMR_GP0ES 0x10000000 /* GP0 event status */
#define X3201_PMR_LCES 0x20000000 /* LC event status */
#endif /* _DEV_IC_TULIPREG_H_ */

View File

@ -1,4 +1,4 @@
/* $NetBSD: tulipvar.h,v 1.32 2000/03/23 07:01:33 thorpej Exp $ */
/* $NetBSD: tulipvar.h,v 1.33 2000/04/04 19:22:52 thorpej Exp $ */
/*-
* Copyright (c) 1998, 1999, 2000 The NetBSD Foundation, Inc.
@ -184,13 +184,55 @@ struct tulip_mediasw {
};
/*
* Table which describes the transmit threshold mode.
* Table which describes the transmit threshold mode. We generally
* start at index 0. Whenever we get a transmit underrun, we increment
* our index, falling back if we encounter the NULL terminator.
*/
struct tulip_txthresh_tab {
u_int32_t txth_opmode; /* OPMODE bits */
const char *txth_name; /* name of mode */
};
#define TLP_TXTHRESH_TAB_10 { \
{ OPMODE_TR_72, "72 bytes" }, \
{ OPMODE_TR_96, "96 bytes" }, \
{ OPMODE_TR_128, "128 bytes" }, \
{ OPMODE_TR_160, "160 bytes" }, \
{ 0, NULL }, \
}
#define TLP_TXTHRESH_TAB_10_100 { \
{ OPMODE_TR_72, "72/128 bytes" }, \
{ OPMODE_TR_96, "96/256 bytes" }, \
{ OPMODE_TR_128, "128/512 bytes" }, \
{ OPMODE_TR_160, "160/1024 bytes" }, \
{ OPMODE_SF, "store and forward mode" }, \
{ 0, NULL }, \
}
#define TXTH_72 0
#define TXTH_96 1
#define TXTH_128 2
#define TXTH_160 3
#define TXTH_SF 4
/*
* The Winbond 89C840F does transmit threshold control totally
* differently. It simply has a 7-bit field which indicates
* the threshold:
*
* txth = ((OPMODE & OPMODE_WINB_TTH) >> OPMODE_WINB_TTH_SHIFT) * 16;
*
* However, we just do Store-and-Forward mode on these chips, since
* the DMA engines seem to be flaky.
*/
#define TLP_TXTHRESH_TAB_WINB { \
{ 0, "store and forward mode" }, \
{ 0, NULL }, \
}
#define TXTH_WINB_SF 0
/*
* Settings for Tulip SIA media.
*/
@ -387,6 +429,7 @@ struct tulip_softc {
#define TULIPF_MRL 0x00000010 /* memory read line okay */
#define TULIPF_MRM 0x00000020 /* memory read multi okay */
#define TULIPF_MWI 0x00000040 /* memory write inval okay */
#define TULIPF_AUTOPOLL 0x00000080 /* chip supports auto-poll */
#define TULIPF_LINK_UP 0x00000100 /* link is up (non-MII) */
#define TULIPF_LINK_VALID 0x00000200 /* link state valid */
#define TULIPF_DOINGAUTO 0x00000400 /* doing autoneg (non-MII) */

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_tlp_pci.c,v 1.36 2000/03/26 10:53:39 soren Exp $ */
/* $NetBSD: if_tlp_pci.c,v 1.37 2000/04/04 19:22:51 thorpej Exp $ */
/*-
* Copyright (c) 1998, 1999 The NetBSD Foundation, Inc.
@ -1101,7 +1101,6 @@ tlp_pci_cobalt_21142_quirks(psc, enaddr)
* pretty quickly, so we select that from the beginning to
* avoid initial timeouts.
*/
#define TXTH_SF 4
sc->sc_txthresh = TXTH_SF;
}