KNF patrol && De-__P().
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@ -1,4 +1,4 @@
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/* $NetBSD: ncr53c9xvar.h,v 1.26 2000/11/30 00:19:25 eeh Exp $ */
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/* $NetBSD: ncr53c9xvar.h,v 1.27 2000/11/30 23:06:44 pk Exp $ */
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/*-
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* Copyright (c) 1997 The NetBSD Foundation, Inc.
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@ -184,10 +184,11 @@ struct ncr53c9x_tinfo {
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};
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/* Look up a lun in a tinfo */
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#define TINFO_LUN(t, l) ((((l) < NCR_NLUN) && (((t)->lun[(l)]) != NULL)) ? \
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((t)->lun[(l)]) : \
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ncr53c9x_lunsearch((t), (int64_t)(l)))
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#define TINFO_LUN(t, l) ( \
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(((l) < NCR_NLUN) && (((t)->lun[(l)]) != NULL)) \
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? ((t)->lun[(l)]) \
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: ncr53c9x_lunsearch((t), (int64_t)(l)) \
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)
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/* Register a linenumber (for debugging) */
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#define LOGLINE(p)
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@ -244,19 +245,19 @@ struct ncr53c9x_softc;
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*/
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struct ncr53c9x_glue {
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/* Mandatory entry points. */
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u_char (*gl_read_reg) __P((struct ncr53c9x_softc *, int));
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void (*gl_write_reg) __P((struct ncr53c9x_softc *, int, u_char));
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int (*gl_dma_isintr) __P((struct ncr53c9x_softc *));
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void (*gl_dma_reset) __P((struct ncr53c9x_softc *));
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int (*gl_dma_intr) __P((struct ncr53c9x_softc *));
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int (*gl_dma_setup) __P((struct ncr53c9x_softc *,
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caddr_t *, size_t *, int, size_t *));
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void (*gl_dma_go) __P((struct ncr53c9x_softc *));
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void (*gl_dma_stop) __P((struct ncr53c9x_softc *));
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int (*gl_dma_isactive) __P((struct ncr53c9x_softc *));
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u_char (*gl_read_reg)(struct ncr53c9x_softc *, int);
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void (*gl_write_reg)(struct ncr53c9x_softc *, int, u_char);
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int (*gl_dma_isintr)(struct ncr53c9x_softc *);
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void (*gl_dma_reset)(struct ncr53c9x_softc *);
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int (*gl_dma_intr)(struct ncr53c9x_softc *);
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int (*gl_dma_setup)(struct ncr53c9x_softc *,
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caddr_t *, size_t *, int, size_t *);
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void (*gl_dma_go)(struct ncr53c9x_softc *);
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void (*gl_dma_stop)(struct ncr53c9x_softc *);
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int (*gl_dma_isactive)(struct ncr53c9x_softc *);
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/* Optional entry points. */
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void (*gl_clear_latched_intr) __P((struct ncr53c9x_softc *));
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void (*gl_clear_latched_intr)(struct ncr53c9x_softc *);
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};
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struct ncr53c9x_softc {
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@ -394,16 +395,16 @@ struct ncr53c9x_softc {
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* Macros to read and write the chip's registers.
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*/
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#define NCR_READ_REG(sc, reg) \
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(*(sc)->sc_glue->gl_read_reg)((sc), (reg))
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(*(sc)->sc_glue->gl_read_reg)((sc), (reg))
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#define NCR_WRITE_REG(sc, reg, val) \
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(*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val))
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(*(sc)->sc_glue->gl_write_reg)((sc), (reg), (val))
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#ifdef NCR53C9X_DEBUG
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#define NCRCMD(sc, cmd) do { \
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if (ncr53c9x_debug & NCR_SHOWCCMDS) \
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#define NCRCMD(sc, cmd) do { \
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if ((ncr53c9x_debug & NCR_SHOWCCMDS) != 0) \
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printf("<cmd:0x%x %d>", (unsigned)cmd, __LINE__); \
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sc->sc_lastcmd = cmd; \
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NCR_WRITE_REG(sc, NCR_CMD, cmd); \
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sc->sc_lastcmd = cmd; \
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NCR_WRITE_REG(sc, NCR_CMD, cmd); \
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} while (0)
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#else
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#define NCRCMD(sc, cmd) NCR_WRITE_REG(sc, NCR_CMD, cmd)
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@ -427,12 +428,12 @@ struct ncr53c9x_softc {
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#define ncr53c9x_cpb2stp(sc, cpb) \
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((250 * (cpb)) / (sc)->sc_freq)
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void ncr53c9x_attach __P((struct ncr53c9x_softc *,
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struct scsipi_adapter *, struct scsipi_device *));
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int ncr53c9x_detach __P((struct ncr53c9x_softc *, int));
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int ncr53c9x_scsi_cmd __P((struct scsipi_xfer *));
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void ncr53c9x_reset __P((struct ncr53c9x_softc *));
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int ncr53c9x_intr __P((void *));
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void ncr53c9x_init __P((struct ncr53c9x_softc *, int));
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void ncr53c9x_attach(struct ncr53c9x_softc *,
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struct scsipi_adapter *, struct scsipi_device *);
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int ncr53c9x_detach(struct ncr53c9x_softc *, int);
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int ncr53c9x_scsi_cmd(struct scsipi_xfer *);
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void ncr53c9x_reset(struct ncr53c9x_softc *);
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int ncr53c9x_intr(void *);
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void ncr53c9x_init(struct ncr53c9x_softc *, int);
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extern int ncr53c9x_dmaselect;
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