DTS files for the Mediatek ATLAS board
This commit is contained in:
matt
parent
0b3b62abbe
commit
58727f35a1
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/*
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* Copyright (c) 2014-2015 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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#include "mtkmercury.dtsi"
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/ {
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memory@00000000 {
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device_type = "memory";
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reg = <0 0x40000000 0 0x18000000>;
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};
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aliases {
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serial0 = &uart0;
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};
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/* chosen */
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chosen {
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stdout-path = "serial0:921600n8";
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};
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};
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/* reg = <0 0x40000000 0 0x20000000>; */
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/* bootargs = "console=ttyS0,921600n1 root=/dev/ram initrd=0x44000200,0x200000"; */
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&pwrap {
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status = "okay";
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pmic: mt6392 {
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compatible = "mediatek,mt6392";
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mediatek,system-power-controller;
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mt6392keys: mt6392keys {
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compatible = "mediatek,mt6392-keys";
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mediatek,pwrkey-code = <116>;
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mediatek,homekey-code = <114>;
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mediatek,long-press-mode = <0>;
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mediatek,long-press-duration = <0>;
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};
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mt6392pmic: mt6392pmic {
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compatible = "mediatek,mt6392-pmic";
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};
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mt6392regulator: mt6392regulator {
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compatible = "mediatek,mt6392-regulator";
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mt6392_vproc_reg: buck_vproc {
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regulator-name = "vproc";
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regulator-min-microvolt = < 700000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <12500>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vsys_reg: buck_vsys {
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regulator-name = "vsys";
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regulator-min-microvolt = <1400000>;
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regulator-max-microvolt = <2987500>;
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regulator-ramp-delay = <25000>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vcore_reg: buck_vcore {
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regulator-name = "vcore";
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regulator-min-microvolt = < 700000>;
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regulator-max-microvolt = <1350000>;
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regulator-ramp-delay = <12500>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vxo22_reg: ldo_vxo22 {
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regulator-name = "vxo22";
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regulator-min-microvolt = <2200000>;
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regulator-max-microvolt = <2200000>;
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regulator-enable-ramp-delay = <110>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vaud22_reg: ldo_vaud22 {
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regulator-name = "vaud22";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2200000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vcama_reg: ldo_vcama {
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regulator-name = "vcama";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vaud28_reg: ldo_vaud28 {
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regulator-name = "vaud28";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vadc18_reg: ldo_vadc18 {
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regulator-name = "vadc18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vcn35_reg: ldo_vcn35 {
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regulator-name = "vcn35";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3600000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vio28_reg: ldo_vio28 {
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regulator-name = "vio28";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vusb_reg: ldo_vusb {
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regulator-name = "vusb";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vmc_reg: ldo_vmc {
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regulator-name = "vmc";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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regulator-boot-on;
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};
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mt6392_vmch_reg: ldo_vmch {
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regulator-name = "vmch";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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regulator-boot-on;
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};
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mt6392_vemc3v3_reg: ldo_vemc3v3 {
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regulator-name = "vemc3v3";
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regulator-min-microvolt = <3000000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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regulator-boot-on;
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};
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mt6392_vgp1_reg: ldo_vgp1 {
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regulator-name = "vgp1";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vgp2_reg: ldo_vgp2 {
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regulator-name = "vgp2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vcn18_reg: ldo_vcn18 {
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regulator-name = "vcn18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vcamaf_reg: ldo_vcamaf {
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regulator-name = "vcamaf";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <3300000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vm_reg: ldo_vm {
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regulator-name = "vm";
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regulator-min-microvolt = <1240000>;
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regulator-max-microvolt = <1390000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vio18_reg: ldo_vio18 {
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regulator-name = "vio18";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <264>;
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regulator-always-on;
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regulator-boot-on;
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};
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mt6392_vcamd_reg: ldo_vcamd {
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regulator-name = "vcamd";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vcamio_reg: ldo_vcamio {
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regulator-name = "vcamio";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vm25_reg: ldo_vm25 {
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regulator-name = "vm25";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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regulator-enable-ramp-delay = <264>;
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};
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mt6392_vefuse_reg: ldo_vefuse {
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regulator-name = "vefuse";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <2000000>;
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regulator-enable-ramp-delay = <264>;
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};
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};
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pio6392: pinctrl@c000 {
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compatible = "mediatek,mt6392-pinctrl";
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pins-are-numbered;
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gpio-controller;
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#gpio-cells = <2>;
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};
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typec: typec {
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compatible = "mediatek,mt6392-typec";
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status = "disabled";
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};
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};
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};
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&feth {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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};
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&u2port0 {
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status = "okay";
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};
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&usb1 {
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status = "okay";
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};
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&u2port1 {
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status = "okay";
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};
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@ -0,0 +1,285 @@
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/*
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* Copyright (c) 2017 MediaTek Inc.
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* Author: Eddie Huang <eddie.huang@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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model = "Mercury";
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compatible = "mediatek,mercury";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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next-level-cache = <&L2_0>;
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enable-method = "psci";
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x1>;
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next-level-cache = <&L2_0>;
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enable-method = "psci";
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x2>;
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next-level-cache = <&L2_0>;
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enable-method = "psci";
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x3>;
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next-level-cache = <&L2_0>;
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enable-method = "psci";
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};
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L2_0: l2-cache0 {
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compatible = "cache";
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};
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};
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psci {
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compatible = "arm,psci";
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method = "smc";
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cpu_on = <0x84000003>;
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};
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clocks {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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clk26m: clk26m {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <26000000>;
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};
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clk32k: clk32k {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32000>;
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};
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uart_clk: dummy26m {
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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#clock-cells = <0>;
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};
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupt-parent = <&gic>;
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <13000000>;
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};
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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compatible = "simple-bus";
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ranges;
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topckgen: topckgen@10000000 {
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compatible = "mediatek,mercury-topckgen", "syscon";
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reg = <0 0x10000000 0 0x1000>;
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#clock-cells = <1>;
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};
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pio: pinctrl@10005000 {
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compatible = "mediatek,mercury-pinctrl";
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reg = <0 0x10005000 0 0x1000>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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eint: interrupt-controller@1000b000 {
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compatible = "mediatek,mercury-eint";
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reg = <0 0x1000b000 0 0x1000>;
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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};
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gic: interrupt-controller@10310000 {
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compatible = "arm,gic-400";
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interrupt-controller;
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#interrupt-cells = <3>;
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interrupt-parent = <&gic>;
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reg = <0 0x10310000 0 0x1000>,
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<0 0x10320000 0 0x1000>,
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<0 0x10340000 0 0x2000>,
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<0 0x10360000 0 0x2000>;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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pwrap: pwrap@1000f000 {
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compatible = "mediatek,mercury-pwrap";
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reg = <0 0x1000f000 0 0x1000>;
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reg-names = "pwrap";
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interrupts = <GIC_SPI 204 IRQ_TYPE_LEVEL_LOW>;
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};
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uart0: uart0@11005000 {
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compatible = "mediatek,mercury-uart";
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reg = <0 0x11005000 0 0x1000>; /* UART base */
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>; /* UART IRQ */
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};
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uart1: uart1@11006000 {
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compatible = "mediatek,mercury-uart";
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reg = <0 0x11006000 0 0x1000>; /* UART base */
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_LOW>; /* UART IRQ */
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};
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uart2: uart2@11007000 {
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compatible = "mediatek,mercury-uart";
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reg = <0 0x11007000 0 0x1000>; /* UART base */
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interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_LOW>; /* UART IRQ */
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};
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pwm: pwm@11008000 {
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compatible = "mediatek,mercury-pwm";
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reg = <0 0x11008000 0 0x1000>;
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interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_LOW>;
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};
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i2c0: i2c@11009000 {
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compatible = "mediatek,mercury-i2c";
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reg = <0 0x11009000 0 0x90>,
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<0 0x11000180 0 0x80>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_LOW>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c1: i2c@1100a000 {
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compatible = "mediatek,mercury-i2c";
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reg = <0 0x1100a000 0 0x90>,
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<0 0x11000200 0 0x80>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_LOW>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c2: i2c@1100b000 {
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compatible = "mediatek,mercury-i2c";
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reg = <0 0x1100b000 0 0x90>,
|
||||
<0 0x11000280 0 0x80>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
spi: spi@1100c000 {
|
||||
compatible = "mediatek,mercury-spi";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0 0x1100c000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
feth: feth@11180000 {
|
||||
compatible = "mediatek,mercury-feth";
|
||||
reg = <0 0x11180080 0 0x1000>;
|
||||
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@11120000 {
|
||||
compatible = "mediatek,mercury-mmc";
|
||||
reg = <0 0x11120000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
mmc1: mmc@11130000 {
|
||||
compatible = "mediatek,mercury-mmc";
|
||||
reg = <0 0x11130000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
||||
usb0: usb0@11100000 {
|
||||
compatible = "mediatek,mercury-usb20";
|
||||
reg = <0 0x11100000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupts-names = "usb0_in_72";
|
||||
/* clocks = <&topckgen CLK_TOP_USB_PHY48M>, */
|
||||
/* <&topckgen CLK_TOP_USBIF>, */
|
||||
/* <&topckgen CLK_TOP_USB>, */
|
||||
/* <&topckgen CLK_TOP_USB_1P>; */
|
||||
/* clock-names = "usbpll", "usbmcu", "usb", "icusb"; */
|
||||
phys = <&u2port0 0>;
|
||||
phy-names = "usb0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
u2port0: usb-phy0@11110800 {
|
||||
compatible = "mediatek,mercury-usb20-phy";
|
||||
reg = <0 0x11110800 0 0x800>;
|
||||
reg-names = "port0";
|
||||
/* clocks = <&clk26m>; */
|
||||
/* clock-names = "ref"; */
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usb1: usb1@11190000 {
|
||||
compatible = "mediatek,mercury-usb20";
|
||||
reg = <0 0x11190000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 210 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupts-names = "usb1_in_210";
|
||||
/* clocks = <&topckgen CLK_TOP_USB_PHY48M>, */
|
||||
/* <&topckgen CLK_TOP_USBIF>, */
|
||||
/* <&topckgen CLK_TOP_USB>, */
|
||||
/* <&topckgen CLK_TOP_USB_1P>; */
|
||||
/* clock-names = "usbpll", "usbmcu", "usb", "icusb"; */
|
||||
phys = <&u2port1 0>;
|
||||
phy-names = "usb1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
u2port1: usb-phy1@11110900 {
|
||||
compatible = "mediatek,mercury-usb20-phy";
|
||||
reg = <0 0x11110900 0 0x800>;
|
||||
reg-names = "port1";
|
||||
/* clocks = <&clk26m>; */
|
||||
/* clock-names = "ref"; */
|
||||
#phy-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Reference in New Issue