I'm not positive that the mips_ipl_si_to_sr assignments are correct - but
at least the thing compiles now.
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@ -1,4 +1,4 @@
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/* $NetBSD: malta_intr.c,v 1.15 2007/10/17 19:54:15 garbled Exp $ */
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/* $NetBSD: malta_intr.c,v 1.16 2008/01/08 14:28:35 dogcow Exp $ */
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/*
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* Copyright 2001, 2002 Wasabi Systems, Inc.
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@ -40,7 +40,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: malta_intr.c,v 1.15 2007/10/17 19:54:15 garbled Exp $");
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__KERNEL_RCSID(0, "$NetBSD: malta_intr.c,v 1.16 2008/01/08 14:28:35 dogcow Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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@ -66,27 +66,10 @@ __KERNEL_RCSID(0, "$NetBSD: malta_intr.c,v 1.15 2007/10/17 19:54:15 garbled Exp
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const uint32_t ipl_sr_bits[_IPL_N] = {
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0, /* 0: IPL_NONE */
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MIPS_SOFT_INT_MASK_0, /* 1: IPL_SOFT */
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MIPS_SOFT_INT_MASK_0, /* 2: IPL_SOFTCLOCK */
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MIPS_SOFT_INT_MASK_0, /* 1: IPL_VM */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1, /* 3: IPL_SOFTNET */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1, /* 4: IPL_SOFTSERIAL */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0, /* 5: IPL_BIO */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0, /* 6: IPL_NET */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0, /* 7: IPL_{TTY,SERIAL} */
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MIPS_SOFT_INT_MASK_1, /* 3: IPL_SCHED */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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@ -95,7 +78,7 @@ const uint32_t ipl_sr_bits[_IPL_N] = {
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MIPS_INT_MASK_2|
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MIPS_INT_MASK_3|
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MIPS_INT_MASK_4|
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MIPS_INT_MASK_5, /* 8: IPL_{CLOCK,HIGH} */
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MIPS_INT_MASK_5, /* 8: IPL_HIGH */
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};
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/*
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@ -103,11 +86,9 @@ const uint32_t ipl_sr_bits[_IPL_N] = {
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* given software interrupt priority level.
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* Hardware ipls are port/board specific.
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*/
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const uint32_t mips_ipl_si_to_sr[SI_NQUEUES] = {
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[SI_SOFT] = MIPS_SOFT_INT_MASK_0,
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[SI_SOFTCLOCK] = MIPS_SOFT_INT_MASK_0,
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[SI_SOFTNET] = MIPS_SOFT_INT_MASK_1,
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[SI_SOFTSERIAL] = MIPS_SOFT_INT_MASK_1,
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const uint32_t mips_ipl_si_to_sr[2] = {
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MIPS_SOFT_INT_MASK_0,
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MIPS_SOFT_INT_MASK_1, /* XXX is this right with the new softints? */
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};
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struct malta_cpuintr {
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