These have been moved to evbarm/awin or conf/*.awin
This commit is contained in:
matt
parent
1dfddc4fb8
commit
57cc604bb7
@ -1,12 +0,0 @@
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# $NetBSD: files.cubie,v 1.1 2013/09/03 06:12:00 matt Exp $
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#
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# CUBIEBOARD evaluation board configuration info
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#
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file arch/evbarm/cubie/cubie_machdep.c
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# Kernel boot arguments
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defparam opt_machdep.h BOOT_ARGS
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# CPU support and integrated peripherals
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include "arch/arm/allwinner/files.awin"
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@ -1,40 +0,0 @@
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# $NetBSD: mk.cubie,v 1.4 2014/08/29 07:29:07 matt Exp $
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CPPFLAGS+= -mcpu=cortex-a8 -mfpu=neon
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.if !empty(MACHINE_ARCH:M*eb)
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EXTRA_LINKFLAGS+= --be8
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.endif
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SYSTEM_FIRST_OBJ= cubie_start.o
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SYSTEM_FIRST_SFILE= ${THISARM}/cubie/cubie_start.S
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COPTS.cubie_machdep.c+= -DBOARDTYPE=${BOARDTYPE}
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GENASSYM_EXTRAS+= ${THISARM}/cubie/genassym.cf
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_OSRELEASE!= ${HOST_SH} $S/conf/osrelease.sh
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KERNEL_BASE_PHYS?=$(LOADADDRESS)
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KERNEL_BASE_VIRT?=$(LOADADDRESS)
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MKUBOOTIMAGEARGS= -A arm -T kernel
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MKUBOOTIMAGEARGS+= -a $(KERNEL_BASE_PHYS) -e $(KERNEL_BASE_PHYS)
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MKUBOOTIMAGEARGS+= -n "NetBSD/$(BOARDTYPE) ${_OSRELEASE}"
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MKUBOOTIMAGEARGS_NONE= ${MKUBOOTIMAGEARGS} -C none
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MKUBOOTIMAGEARGS_GZ= ${MKUBOOTIMAGEARGS} -C gz
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SYSTEM_LD_TAIL_EXTRA+=; \
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echo ${OBJCOPY} -S -O binary $@ $@.bin; \
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${OBJCOPY} -S -O binary $@ $@.bin; \
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echo ${TOOL_GZIP} -9c $@.bin > $@.bin.gz; \
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${TOOL_GZIP} -9c $@.bin > $@.bin.gz; \
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echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} $@.bin.gz $@.gz.ub; \
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${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_GZ} $@.bin.gz $@.gz.ub; \
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echo ${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} $@.bin $@.ub; \
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${TOOL_MKUBOOTIMAGE} ${MKUBOOTIMAGEARGS_NONE} $@.bin $@.ub; \
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echo
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EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin@}
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EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.ub@}
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EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.bin.gz@}
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EXTRA_KERNELS+= ${KERNELS:@.KERNEL.@${.KERNEL.}.gz.ub@}
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@ -1,29 +0,0 @@
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# $NetBSD: std.cubie,v 1.4 2014/08/24 07:59:22 jnemeth Exp $
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#
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# standard NetBSD/evbarm for CUBIEBOARD options
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machine evbarm arm
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include "arch/evbarm/conf/std.evbarm"
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# Pull in CUBIEBOARD config definitions.
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include "arch/evbarm/conf/files.cubie"
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# To support easy transit to ../arch/arm/arm32
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options MODULAR
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options MODULAR_DEFAULT_AUTOLOAD
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options __HAVE_CPU_COUNTER
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options CORTEX_PMC
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options __HAVE_FAST_SOFTINTS # should be in types.h
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options ARM_HAS_VBAR
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options __HAVE_MM_MD_DIRECT_MAPPED_PHYS
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options TPIDRPRW_IS_CURCPU
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options KERNEL_BASE_EXT=0x80000000
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options FPU_VFP
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makeoptions KERNEL_BASE_PHYS="0x40007800"
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makeoptions KERNEL_BASE_VIRT="0x80007800"
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makeoptions BOARDTYPE="cubie"
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makeoptions BOARDMKFRAG="${THISARM}/conf/mk.cubie"
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options ARM_INTR_IMPL="<arch/arm/allwinner/awin_intr.h>"
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options ARM_GENERIC_TODR
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@ -1,655 +0,0 @@
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/* $NetBSD: cubie_machdep.c,v 1.21 2014/08/29 07:29:07 matt Exp $ */
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/*
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* Machine dependent functions for kernel setup for TI OSK5912 board.
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* Based on lubbock_machdep.c which in turn was based on iq80310_machhdep.c
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*
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* Copyright (c) 2002, 2003, 2005 Genetec Corporation. All rights reserved.
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* Written by Hiroyuki Bessho for Genetec Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Genetec Corporation may not be used to endorse or
|
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* promote products derived from this software without specific prior
|
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY GENETEC CORPORATION ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL GENETEC CORPORATION
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Copyright (c) 2001 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Jason R. Thorpe for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
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||||
* 3. All advertising materials mentioning features or use of this software
|
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
|
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* or promote products derived from this software without specific prior
|
||||
* written permission.
|
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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* Copyright (c) 1997,1998 Causality Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
|
||||
* endorse or promote products derived from this software without specific
|
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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*
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* Copyright (c) 2007 Microsoft
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Microsoft
|
||||
*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
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* SUCH DAMAGE.
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||||
*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: cubie_machdep.c,v 1.21 2014/08/29 07:29:07 matt Exp $");
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#include "opt_machdep.h"
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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#include "opt_ipkdb.h"
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#include "opt_md.h"
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#include "opt_com.h"
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#include "opt_allwinner.h"
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#include "opt_arm_debug.h"
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#include "com.h"
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#include "ukbd.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/device.h>
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#include <sys/exec.h>
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#include <sys/kernel.h>
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#include <sys/ksyms.h>
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#include <sys/msgbuf.h>
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#include <sys/proc.h>
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#include <sys/reboot.h>
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#include <sys/termios.h>
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#include <sys/gpio.h>
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#include <uvm/uvm_extern.h>
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#include <sys/conf.h>
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#include <dev/cons.h>
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#include <dev/md.h>
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#include <machine/db_machdep.h>
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#include <ddb/db_sym.h>
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#include <ddb/db_extern.h>
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#ifdef KGDB
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#include <sys/kgdb.h>
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#endif
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#include <machine/bootconfig.h>
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#include <arm/armreg.h>
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#include <arm/undefined.h>
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#include <arm/arm32/machdep.h>
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#include <arm/mainbus/mainbus.h>
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#include <dev/ic/ns16550reg.h>
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#include <dev/ic/comreg.h>
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#include <arm/allwinner/awin_reg.h>
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#include <arm/allwinner/awin_var.h>
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#include <evbarm/include/autoconf.h>
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#include <evbarm/cubie/platform.h>
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#include <dev/i2c/i2cvar.h>
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#include <dev/i2c/ddcreg.h>
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#include <dev/usb/ukbdvar.h>
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#include <net/if_ether.h>
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BootConfig bootconfig; /* Boot config storage */
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static char bootargs[MAX_BOOT_STRING];
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char *boot_args = NULL;
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char *boot_file = NULL;
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static uint8_t uboot_enaddr[ETHER_ADDR_LEN];
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bool cubietruck_p;
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/*
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* uboot_args are filled in by cubie_start.S and must be in .data
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* and not .bss since .bss is cleared after uboot_args are filled in.
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*/
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uintptr_t uboot_args[4] = { 0 };
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/* Same things, but for the free (unused by the kernel) memory. */
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extern char KERNEL_BASE_phys[]; /* physical start of kernel */
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extern char _end[]; /* physical end of kernel */
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#if NAWIN_FB > 0
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#if NCOM > 0
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int use_fb_console = false;
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#else
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int use_fb_console = true;
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#endif
|
||||
#endif
|
||||
|
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/*
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* Macros to translate between physical and virtual for a subset of the
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* kernel address space. *Not* for general use.
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*/
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#define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys)
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#define AWIN_CORE_VOFFSET (AWIN_CORE_VBASE - AWIN_CORE_PBASE)
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/* Prototypes */
|
||||
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void consinit(void);
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#ifdef KGDB
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static void kgdb_port_init(void);
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#endif
|
||||
|
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static void cubie_device_register(device_t, void *);
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|
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#if NCOM > 0
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#endif
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||||
|
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/*
|
||||
* Static device mappings. These peripheral registers are mapped at
|
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* fixed virtual addresses very early in initarm() so that we can use
|
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* them while booting the kernel, and stay at the same address
|
||||
* throughout whole kernel's life time.
|
||||
*
|
||||
* We use this table twice; once with bootstrap page table, and once
|
||||
* with kernel's page table which we build up in initarm().
|
||||
*
|
||||
* Since we map these registers into the bootstrap page table using
|
||||
* pmap_devmap_bootstrap() which calls pmap_map_chunk(), we map
|
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* registers segment-aligned and segment-rounded in order to avoid
|
||||
* using the 2nd page tables.
|
||||
*/
|
||||
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||||
#define _A(a) ((a) & ~L1_S_OFFSET)
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#define _S(s) (((s) + L1_S_SIZE - 1) & ~(L1_S_SIZE-1))
|
||||
|
||||
static const struct pmap_devmap devmap[] = {
|
||||
{
|
||||
/*
|
||||
* Map all of core area, this gets us everything and
|
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* it's only 3MB.
|
||||
*/
|
||||
.pd_va = _A(AWIN_CORE_VBASE),
|
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.pd_pa = _A(AWIN_CORE_PBASE),
|
||||
.pd_size = _S(AWIN_CORE_SIZE),
|
||||
.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
|
||||
.pd_cache = PTE_NOCACHE
|
||||
},
|
||||
{
|
||||
/*
|
||||
* Map all 1MB of SRAM area.
|
||||
*/
|
||||
.pd_va = _A(AWIN_SRAM_VBASE),
|
||||
.pd_pa = _A(AWIN_SRAM_PBASE),
|
||||
.pd_size = _S(AWIN_SRAM_SIZE),
|
||||
.pd_prot = VM_PROT_READ|VM_PROT_WRITE,
|
||||
.pd_cache = PTE_CACHE
|
||||
},
|
||||
{0}
|
||||
};
|
||||
|
||||
#undef _A
|
||||
#undef _S
|
||||
|
||||
#ifdef PMAP_NEED_ALLOC_POOLPAGE
|
||||
static struct boot_physmem bp_highgig = {
|
||||
.bp_start = AWIN_SDRAM_PBASE / NBPG,
|
||||
.bp_pages = (KERNEL_VM_BASE - KERNEL_BASE) / NBPG,
|
||||
.bp_freelist = VM_FREELIST_ISADMA,
|
||||
.bp_flags = 0,
|
||||
};
|
||||
#endif
|
||||
|
||||
/*
|
||||
* u_int initarm(...)
|
||||
*
|
||||
* Initial entry point on startup. This gets called before main() is
|
||||
* entered.
|
||||
* It should be responsible for setting up everything that must be
|
||||
* in place when main is called.
|
||||
* This includes
|
||||
* Taking a copy of the boot configuration structure.
|
||||
* Initialising the physical console so characters can be printed.
|
||||
* Setting up page tables for the kernel
|
||||
* Relocating the kernel to the bottom of physical memory
|
||||
*/
|
||||
u_int
|
||||
initarm(void *arg)
|
||||
{
|
||||
pmap_devmap_register(devmap);
|
||||
awin_bootstrap(AWIN_CORE_VBASE, CONADDR_VA);
|
||||
|
||||
/* Heads up ... Setup the CPU / MMU / TLB functions. */
|
||||
if (set_cpufuncs())
|
||||
panic("cpu not recognized!");
|
||||
|
||||
/* The console is going to try to map things. Give pmap a devmap. */
|
||||
consinit();
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("\nuboot arg = %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR", %#"PRIxPTR"\n",
|
||||
uboot_args[0], uboot_args[1], uboot_args[2], uboot_args[3]);
|
||||
#endif
|
||||
|
||||
#ifdef KGDB
|
||||
kgdb_port_init();
|
||||
#endif
|
||||
|
||||
cpu_reset_address = awin_wdog_reset;
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
/* Talk to the user */
|
||||
printf("\nNetBSD/evbarm (" __STRING(BOARDTYPE) ") booting ...\n");
|
||||
#endif
|
||||
|
||||
const uint8_t *uboot_bootinfo = (void*)uboot_args[0];
|
||||
|
||||
#ifdef BOOT_ARGS
|
||||
char mi_bootargs[] = BOOT_ARGS;
|
||||
parse_mi_bootargs(mi_bootargs);
|
||||
#endif
|
||||
|
||||
#ifdef VERBOSE_INIT_ARM
|
||||
printf("initarm: Configuring system ...\n");
|
||||
|
||||
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA9) || defined(CPU_CORTEXA15)
|
||||
if (!CPU_ID_CORTEX_A8_P(curcpu()->ci_arm_cpuid)) {
|
||||
printf("initarm: cbar=%#x\n", armreg_cbar_read());
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Set up the variables that define the availability of physical
|
||||
* memory.
|
||||
*/
|
||||
psize_t ram_size = awin_memprobe();
|
||||
|
||||
/* the cubietruck has 2GB whereas the cubieboards only has 1GB */
|
||||
cubietruck_p = (ram_size == 0x80000000);
|
||||
|
||||
/*
|
||||
* If MEMSIZE specified less than what we really have, limit ourselves
|
||||
* to that.
|
||||
*/
|
||||
#ifdef MEMSIZE
|
||||
if (ram_size == 0 || ram_size > (unsigned)MEMSIZE * 1024 * 1024)
|
||||
ram_size = (unsigned)MEMSIZE * 1024 * 1024;
|
||||
#else
|
||||
KASSERTMSG(ram_size > 0, "RAM size unknown and MEMSIZE undefined");
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Configure DMA tags
|
||||
*/
|
||||
awin_dma_bootstrap(ram_size);
|
||||
|
||||
/* Fake bootconfig structure for the benefit of pmap.c. */
|
||||
bootconfig.dramblocks = 1;
|
||||
bootconfig.dram[0].address = AWIN_SDRAM_PBASE;
|
||||
bootconfig.dram[0].pages = ram_size / PAGE_SIZE;
|
||||
|
||||
#ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
|
||||
const bool mapallmem_p = true;
|
||||
#ifndef PMAP_NEED_ALLOC_POOLPAGE
|
||||
if (ram_size > KERNEL_VM_BASE - KERNEL_BASE) {
|
||||
printf("%s: dropping RAM size from %luMB to %uMB\n",
|
||||
__func__, (unsigned long) (ram_size >> 20),
|
||||
(KERNEL_VM_BASE - KERNEL_BASE) >> 20);
|
||||
ram_size = KERNEL_VM_BASE - KERNEL_BASE;
|
||||
}
|
||||
#endif
|
||||
#else
|
||||
const bool mapallmem_p = false;
|
||||
#endif
|
||||
KASSERT((armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0);
|
||||
|
||||
arm32_bootmem_init(bootconfig.dram[0].address, ram_size,
|
||||
KERNEL_BASE_PHYS);
|
||||
arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_LOW, 0, devmap,
|
||||
mapallmem_p);
|
||||
|
||||
if (mapallmem_p) {
|
||||
/*
|
||||
* "bootargs" env variable is passed as 4th argument
|
||||
* to kernel but it's using the physical address and
|
||||
* we to convert that to a virtual address.
|
||||
*/
|
||||
if (uboot_args[3] - AWIN_SDRAM_PBASE < ram_size) {
|
||||
const char * const args = (const char *)
|
||||
(uboot_args[3] + KERNEL_BASE_VOFFSET);
|
||||
strlcpy(bootargs, args, sizeof(bootargs));
|
||||
}
|
||||
if (uboot_args[0]
|
||||
&& uboot_args[0] - AWIN_SDRAM_PBASE < ram_size) {
|
||||
uboot_bootinfo =
|
||||
(void*)(uboot_args[0] + KERNEL_BASE_VOFFSET);
|
||||
}
|
||||
}
|
||||
|
||||
/* copy u-boot bootinfo ethernet address */
|
||||
memcpy(uboot_enaddr, uboot_bootinfo + 0x250, sizeof(uboot_enaddr));
|
||||
|
||||
boot_args = bootargs;
|
||||
parse_mi_bootargs(boot_args);
|
||||
|
||||
/* we've a specific device_register routine */
|
||||
evbarm_device_register = cubie_device_register;
|
||||
|
||||
#if NAWIN_FB > 0
|
||||
char *ptr;
|
||||
if (get_bootconf_option(boot_args, "console",
|
||||
BOOTOPT_TYPE_STRING, &ptr) && strncmp(ptr, "fb", 2) == 0) {
|
||||
use_fb_console = true;
|
||||
}
|
||||
#endif
|
||||
/*
|
||||
* If we couldn't map all of memory via TTBR1, limit the memory the
|
||||
* kernel can allocate from to be from the highest available 1GB.
|
||||
*/
|
||||
#ifdef PMAP_NEED_ALLOC_POOLPAGE
|
||||
if (atop(ram_size) > bp_highgig.bp_pages) {
|
||||
bp_highgig.bp_start += atop(ram_size) - bp_highgig.bp_pages;
|
||||
arm_poolpage_vmfreelist = bp_highgig.bp_freelist;
|
||||
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE,
|
||||
&bp_highgig, 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
return initarm_common(KERNEL_VM_BASE, KERNEL_VM_SIZE, NULL, 0);
|
||||
|
||||
}
|
||||
|
||||
#if NCOM > 0
|
||||
#ifndef CONADDR
|
||||
#define CONADDR (AWIN_CORE_PBASE + AWIN_UART0_OFFSET)
|
||||
#endif
|
||||
#ifndef CONSPEED
|
||||
#define CONSPEED 115200
|
||||
#endif
|
||||
#ifndef CONMODE
|
||||
#define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB | HUPCL)) | CS8) /* 8N1 */
|
||||
#endif
|
||||
|
||||
__CTASSERT(AWIN_CORE_PBASE + AWIN_UART0_OFFSET <= CONADDR);
|
||||
__CTASSERT(CONADDR <= AWIN_CORE_PBASE + AWIN_UART7_OFFSET);
|
||||
__CTASSERT(CONADDR % AWIN_UART_SIZE == 0);
|
||||
static const bus_addr_t conaddr = CONADDR;
|
||||
static const int conspeed = CONSPEED;
|
||||
static const int conmode = CONMODE;
|
||||
#endif
|
||||
|
||||
void
|
||||
consinit(void)
|
||||
{
|
||||
bus_space_tag_t bst = &awin_a4x_bs_tag;
|
||||
#if NCOM > 0
|
||||
bus_space_handle_t bh;
|
||||
#endif
|
||||
static int consinit_called = 0;
|
||||
|
||||
if (consinit_called != 0)
|
||||
return;
|
||||
|
||||
consinit_called = 1;
|
||||
|
||||
#if NCOM > 0
|
||||
if (bus_space_map(bst, conaddr, AWIN_UART_SIZE, 0, &bh))
|
||||
panic("Serial console can not be mapped.");
|
||||
|
||||
if (comcnattach(bst, conaddr, conspeed, AWIN_UART_FREQ,
|
||||
COM_TYPE_NORMAL, conmode))
|
||||
panic("Serial console can not be initialized.");
|
||||
|
||||
bus_space_unmap(bst, bh, AWIN_UART_SIZE);
|
||||
#else
|
||||
#error only COM console is supported
|
||||
|
||||
#if NUKBD > 0
|
||||
ukbd_cnattach(); /* allow USB keyboard to become console */
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef KGDB
|
||||
#ifndef KGDB_DEVADDR
|
||||
#error Specify the address of the kgdb UART with the KGDB_DEVADDR option.
|
||||
#endif
|
||||
#ifndef KGDB_DEVRATE
|
||||
#define KGDB_DEVRATE 115200
|
||||
#endif
|
||||
|
||||
#ifndef KGDB_DEVMODE
|
||||
#define KGDB_DEVMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */
|
||||
#endif
|
||||
|
||||
__CTASSERT(KGDB_DEVADDR != CONADDR);
|
||||
__CTASSERT(AWIN_CORE_PBASE + AWIN_UART0_OFFSET <= KGDB_DEVADDR);
|
||||
__CTASSERT(KGDB_DEVADDR <= AWIN_CORE_PBASE + AWIN_UART7_OFFSET);
|
||||
__CTASSERT(KGDB_DEVADDR % AWIN_UART_SIZE == 0);
|
||||
|
||||
static const vaddr_t comkgdbaddr = KGDB_DEVADDR;
|
||||
static const int comkgdbspeed = KGDB_DEVRATE;
|
||||
static const int comkgdbmode = KGDB_DEVMODE;
|
||||
|
||||
void
|
||||
static kgdb_port_init(void)
|
||||
{
|
||||
bus_space_tag_t bst = &awin_a4x_bs_tag;
|
||||
static bool kgdbsinit_called;
|
||||
|
||||
if (kgdbsinit_called)
|
||||
return;
|
||||
|
||||
kgdbsinit_called = true;
|
||||
|
||||
bus_space_handle_t bh;
|
||||
if (bus_space_map(bst, comkgdbaddr, AWIN_UART_SIZE, 0, &bh))
|
||||
panic("kgdb port can not be mapped.");
|
||||
|
||||
if (com_kgdb_attach(bst, comkgdbaddr, comkgdbspeed, AWIN_REF_FREQ,
|
||||
COM_TYPE_NORMAL, comkgdbmode))
|
||||
panic("KGDB uart can not be initialized.");
|
||||
|
||||
bus_space_unmap(bst, bh, AWIN_UART_SIZE);
|
||||
}
|
||||
#endif
|
||||
|
||||
void
|
||||
cubie_device_register(device_t self, void *aux)
|
||||
{
|
||||
prop_dictionary_t dict = device_properties(self);
|
||||
|
||||
if (device_is_a(self, "armperiph")
|
||||
&& device_is_a(device_parent(self), "mainbus")) {
|
||||
/*
|
||||
* XXX KLUDGE ALERT XXX
|
||||
* The iot mainbus supplies is completely wrong since it scales
|
||||
* addresses by 2. The simpliest remedy is to replace with our
|
||||
* bus space used for the armcore regisers (which armperiph uses).
|
||||
*/
|
||||
struct mainbus_attach_args * const mb = aux;
|
||||
mb->mb_iot = &awin_bs_tag;
|
||||
return;
|
||||
}
|
||||
|
||||
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15)
|
||||
if (device_is_a(self, "armgtmr")) {
|
||||
/*
|
||||
* The frequency of the generic timer is the reference
|
||||
* frequency.
|
||||
*/
|
||||
prop_dictionary_set_uint32(dict, "frequency", AWIN_REF_FREQ);
|
||||
return;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (device_is_a(self, "awinio")) {
|
||||
if (cubietruck_p) {
|
||||
prop_dictionary_set_bool(dict, "no-awe", true);
|
||||
} else {
|
||||
prop_dictionary_set_bool(dict, "no-awge", true);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (device_is_a(self, "awingpio")) {
|
||||
/*
|
||||
* These are GPIOs being used for various functions.
|
||||
*/
|
||||
prop_dictionary_set_cstring(dict, "satapwren",
|
||||
(cubietruck_p ? ">PH12" : ">PB8"));
|
||||
prop_dictionary_set_cstring(dict, "usb0drv",
|
||||
(cubietruck_p ? ">PH17" : ">PB2"));
|
||||
prop_dictionary_set_cstring(dict, "usb2drv", ">PH3");
|
||||
prop_dictionary_set_cstring(dict, "usb0iddet",
|
||||
(cubietruck_p ? "<PH19" : "<PH4"));
|
||||
prop_dictionary_set_cstring(dict, "usb0vbusdet",
|
||||
(cubietruck_p ? "<PH22" : "<PH5"));
|
||||
prop_dictionary_set_cstring(dict, "usb1drv", ">PH6");
|
||||
prop_dictionary_set_cstring(dict, "status-led1", ">PH21");
|
||||
prop_dictionary_set_cstring(dict, "status-led2", ">PH20");
|
||||
if (cubietruck_p) {
|
||||
prop_dictionary_set_cstring(dict, "status-led3", ">PH11");
|
||||
prop_dictionary_set_cstring(dict, "status-led4", ">PH7");
|
||||
} else {
|
||||
prop_dictionary_set_cstring(dict, "hdd5ven", ">PH17");
|
||||
prop_dictionary_set_cstring(dict, "emacpwren", ">PH19");
|
||||
}
|
||||
prop_dictionary_set_cstring(dict, "mmc0detect", "<PH1");
|
||||
|
||||
/*
|
||||
* These pins have no connections.
|
||||
*/
|
||||
prop_dictionary_set_uint32(dict, "nc-b", 0x0003d0e8);
|
||||
prop_dictionary_set_uint32(dict, "nc-c", 0x00ff0000);
|
||||
prop_dictionary_set_uint32(dict, "nc-h", 0x03c53f04);
|
||||
prop_dictionary_set_uint32(dict, "nc-i", 0x003fc03f);
|
||||
return;
|
||||
}
|
||||
if (device_is_a(self, "awge") || device_is_a(self, "awe")) {
|
||||
prop_data_t blob =
|
||||
prop_data_create_data(uboot_enaddr, ETHER_ADDR_LEN);
|
||||
prop_dictionary_set(dict, "mac-address", blob);
|
||||
prop_object_release(blob);
|
||||
}
|
||||
|
||||
if (device_is_a(self, "ehci")) {
|
||||
return;
|
||||
}
|
||||
|
||||
if (device_is_a(self, "ahcisata")) {
|
||||
/* PIO PB<8> / PIO PH<12> output */
|
||||
prop_dictionary_set_cstring(dict, "power-gpio", "satapwren");
|
||||
return;
|
||||
}
|
||||
|
||||
if (device_is_a(self, "awinmmc")) {
|
||||
struct awinio_attach_args * const aio = aux;
|
||||
if (aio->aio_loc.loc_port == 0) {
|
||||
prop_dictionary_set_cstring(dict,
|
||||
"detect-gpio", "mmc0detect");
|
||||
prop_dictionary_set_cstring(dict,
|
||||
"led-gpio", "status-led2");
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
if (device_is_a(self, "com")) {
|
||||
#if NAWIN_FB > 0
|
||||
if (use_fb_console)
|
||||
prop_dictionary_set_bool(dict, "is_console", false);
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
}
|
||||
@ -1,280 +0,0 @@
|
||||
/*-
|
||||
* Copyright (c) 2014 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This code is derived from software contributed to The NetBSD Foundation
|
||||
* by Matt Thomas of 3am Software Foundry.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include "opt_allwinner.h"
|
||||
#include "opt_com.h"
|
||||
#include "opt_cpuoptions.h"
|
||||
#include "opt_cputypes.h"
|
||||
#include "opt_multiprocessor.h"
|
||||
#include "opt_arm_debug.h"
|
||||
|
||||
#include <arm/asm.h>
|
||||
#include <arm/armreg.h>
|
||||
#include "assym.h"
|
||||
|
||||
#include <arm/allwinner/awin_reg.h>
|
||||
#include <evbarm/cubie/platform.h>
|
||||
|
||||
RCSID("$NetBSD: cubie_start.S,v 1.10 2014/08/28 06:36:48 skrll Exp $")
|
||||
|
||||
#if defined(VERBOSE_INIT_ARM)
|
||||
#define XPUTC(n) mov r0, n; bl xputc
|
||||
#if KERNEL_BASE_VOFFSET == 0
|
||||
#define XPUTC2(n) mov r0, n; bl xputc
|
||||
#else
|
||||
#define XPUTC2(n) mov r0, n; blx r11
|
||||
#endif
|
||||
#ifdef __ARMEB__
|
||||
#define COM_BSWAP
|
||||
#endif
|
||||
#define COM_MULT 4
|
||||
#define XPUTC_COM 1
|
||||
#else
|
||||
#define XPUTC(n)
|
||||
#define XPUTC2(n)
|
||||
#endif
|
||||
|
||||
#define INIT_MEMSIZE 128
|
||||
#define TEMP_L1_TABLE (KERNEL_BASE - KERNEL_BASE_VOFFSET + INIT_MEMSIZE * L1_S_SIZE - L1_TABLE_SIZE)
|
||||
|
||||
#define MD_CPU_HATCH _C_LABEL(awin_cpu_hatch)
|
||||
|
||||
/*
|
||||
* Kernel start routine for CUBIE (Allwinner) boards.
|
||||
* At this point, this code has been loaded into SDRAM
|
||||
* and the MMU maybe on or maybe off.
|
||||
*/
|
||||
#ifdef KERNEL_BASES_EQUAL
|
||||
.text
|
||||
#else
|
||||
.section .start,"ax",%progbits
|
||||
#endif
|
||||
|
||||
.global _C_LABEL(cubie_start)
|
||||
_C_LABEL(cubie_start):
|
||||
#ifdef __ARMEB__
|
||||
setend be /* force big endian */
|
||||
#endif
|
||||
mov r9, #0
|
||||
|
||||
/* Move into supervisor mode and disable IRQs/FIQs. */
|
||||
cpsid if, #PSR_SVC32_MODE
|
||||
|
||||
/*
|
||||
* Save any arguments passed to us.
|
||||
*/
|
||||
movw r4, #:lower16:uboot_args
|
||||
movt r4, #:upper16:uboot_args
|
||||
#if KERNEL_BASE_VOFFSET != 0
|
||||
/*
|
||||
* But since .start is at 0x40000000 and .text is at 0x8000000, we
|
||||
* can't directly use the address that the linker gave us directly.
|
||||
* We have to adjust the address the linker gave us to get the to
|
||||
* the physical address.
|
||||
*/
|
||||
sub r4, r4, #KERNEL_BASE_VOFFSET
|
||||
#endif
|
||||
|
||||
stmia r4, {r0-r3} // Save the arguments
|
||||
|
||||
/*
|
||||
* Turn on the SMP bit
|
||||
*/
|
||||
bl cortex_init
|
||||
|
||||
/*
|
||||
* Set up a preliminary mapping in the MMU to allow us to run
|
||||
* at KERNEL_BASE with caches on.
|
||||
*/
|
||||
movw r0, #:lower16:TEMP_L1_TABLE
|
||||
movt r0, #:upper16:TEMP_L1_TABLE
|
||||
movw r1, #:lower16:.Lmmu_init_table
|
||||
movt r1, #:upper16:.Lmmu_init_table
|
||||
bl arm_boot_l1pt_init
|
||||
XPUTC(#68)
|
||||
|
||||
/*
|
||||
* Turn on the MMU, Caches, etc. Return to new enabled address space.
|
||||
*/
|
||||
movw r0, #:lower16:TEMP_L1_TABLE
|
||||
movt r0, #:upper16:TEMP_L1_TABLE
|
||||
#if KERNEL_BASE_VOFFSET == 0
|
||||
bl arm_cpuinit
|
||||
#else
|
||||
/*
|
||||
* After the MMU is on, we can execute in the normal .text segment
|
||||
* so setup the lr to be in .text. Cache the address for xputc
|
||||
* before we go.
|
||||
*/
|
||||
#if defined(VERBOSE_INIT_ARM)
|
||||
adr r11, xputc @ for XPUTC2
|
||||
#endif
|
||||
movw lr, #:lower16:1f
|
||||
movt lr, #:upper16:1f
|
||||
b arm_cpuinit
|
||||
.pushsection .text,"ax",%progbits
|
||||
1:
|
||||
#endif
|
||||
XPUTC2(#90)
|
||||
|
||||
#if defined(MULTIPROCESSOR)
|
||||
// Now spin up the second processors into the same state we are now.
|
||||
XPUTC2(#77)
|
||||
XPUTC2(#80)
|
||||
XPUTC2(#60)
|
||||
// Make sure the cache is flushed out to RAM for the other CPUs
|
||||
bl _C_LABEL(armv7_dcache_wbinv_all)
|
||||
bl a20_mpinit
|
||||
XPUTC2(#62)
|
||||
#endif /* MULTIPROCESSOR */
|
||||
XPUTC2(#13)
|
||||
XPUTC2(#10)
|
||||
|
||||
/*
|
||||
* Jump to start in locore.S, which in turn will call initarm and main.
|
||||
*/
|
||||
b start
|
||||
|
||||
/* NOTREACHED */
|
||||
|
||||
#ifndef KERNEL_BASES_EQUAL
|
||||
.popsection
|
||||
#endif
|
||||
|
||||
#include <arm/cortex/a9_mpsubr.S>
|
||||
|
||||
#if defined(MULTIPROCESSOR)
|
||||
#ifndef KERNEL_BASES_EQUAL
|
||||
.pushsection .text,"ax",%progbits
|
||||
#endif
|
||||
a20_mpinit:
|
||||
mov r4, lr // because we call gtmr_bootdelay
|
||||
movw r5, #:lower16:(AWIN_CORE_PBASE+AWIN_CPUCFG_OFFSET)
|
||||
movt r5, #:upper16:(AWIN_CORE_PBASE+AWIN_CPUCFG_OFFSET)
|
||||
|
||||
/* Set where the other CPU(s) are going to execute */
|
||||
movw r1, #:lower16:cortex_mpstart
|
||||
movt r1, #:upper16:cortex_mpstart
|
||||
str r1, [r5, #AWIN_CPUCFG_PRIVATE_REG]
|
||||
dsb
|
||||
|
||||
/* Assert CPU core reset */
|
||||
mov r1, #0
|
||||
str r1, [r5, #AWIN_CPUCFG_CPU1_RST_CTRL_REG]
|
||||
dsb
|
||||
|
||||
/* Ensure CPU1 reset also invalidates its L1 caches */
|
||||
ldr r1, [r5, #AWIN_CPUCFG_GENCTRL_REG]
|
||||
bic r1, r1, #(1 << 1)
|
||||
str r1, [r5, #AWIN_CPUCFG_GENCTRL_REG]
|
||||
dsb
|
||||
|
||||
/* Hold DBGPWRDUP signal low */
|
||||
ldr r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
|
||||
bic r1, r1, #(1 << 1)
|
||||
str r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
|
||||
dsb
|
||||
|
||||
/* Ramp up power to CPU1 */
|
||||
movw r1, #0xff
|
||||
1: str r1, [r5, #AWIN_CPUCFG_CPU1_PWRCLAMP_REG]
|
||||
dsb
|
||||
lsrs r1, r1, #1
|
||||
bne 1b
|
||||
|
||||
/* We need to wait (at least) 10ms */
|
||||
mov r0, #0x3b000 // 10.06ms
|
||||
bl _C_LABEL(gtmr_bootdelay)
|
||||
|
||||
/* Clear power-off gating */
|
||||
ldr r1, [r5, #AWIN_CPUCFG_CPU1_PWROFF_REG]
|
||||
bic r1, r1, #(1 << 1)
|
||||
str r1, [r5, #AWIN_CPUCFG_CPU1_PWROFF_REG]
|
||||
dsb
|
||||
|
||||
/* Bring CPU1 out of reset */
|
||||
ldr r1, [r5, #AWIN_CPUCFG_CPU1_RST_CTRL_REG]
|
||||
orr r1, r1, #(AWIN_CPUCFG_CPU_RST_CTRL_CORE_RESET|AWIN_CPUCFG_CPU_RST_CTRL_RESET)
|
||||
str r1, [r5, #AWIN_CPUCFG_CPU1_RST_CTRL_REG]
|
||||
dsb
|
||||
|
||||
/* Reassert DBGPWRDUP signal */
|
||||
ldr r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
|
||||
orr r1, r1, #(1 << 1)
|
||||
str r1, [r5, #AWIN_CPUCFG_DBGCTRL1_REG]
|
||||
dsb
|
||||
|
||||
//
|
||||
// Wait up a second for CPU1 to hatch.
|
||||
//
|
||||
movw r6, #:lower16:arm_cpu_hatched
|
||||
movt r6, #:upper16:arm_cpu_hatched
|
||||
mov r5, #200 // 200 x 5ms
|
||||
|
||||
1: dmb // memory barrier
|
||||
ldr r0, [r6] // load hatched
|
||||
tst r0, #2 // our bit set yet?
|
||||
bxne r4 // yes, return
|
||||
subs r5, r5, #1 // decrement count
|
||||
bxeq r4 // 0? return
|
||||
mov r0, #0x1d800 // 5.03ms
|
||||
bl _C_LABEL(gtmr_bootdelay)
|
||||
b 1b
|
||||
ASEND(a20_mpinit)
|
||||
#ifndef KERNEL_BASES_EQUAL
|
||||
.popsection
|
||||
#endif
|
||||
#endif /* MULTIPROCESSOR */
|
||||
|
||||
.Lmmu_init_table:
|
||||
/* Map KERNEL_BASE VA to SDRAM PA, write-back cacheable, shareable */
|
||||
MMU_INIT(KERNEL_BASE, KERNEL_BASE - KERNEL_BASE_VOFFSET, INIT_MEMSIZE,
|
||||
L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
|
||||
|
||||
#if KERNEL_BASE_VOFFSET != 0
|
||||
/* Map memory 1:1 VA to PA, write-back cacheable, shareable */
|
||||
MMU_INIT(KERNEL_BASE - KERNEL_BASE_VOFFSET,
|
||||
KERNEL_BASE - KERNEL_BASE_VOFFSET, INIT_MEMSIZE,
|
||||
L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_CACHEABLE)
|
||||
#endif
|
||||
|
||||
/* Map AWIN CORE (so console will work) */
|
||||
MMU_INIT(AWIN_CORE_VBASE, AWIN_CORE_PBASE,
|
||||
(AWIN_CORE_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
|
||||
L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
|
||||
|
||||
/* Map AWIN CORE (so console will work) */
|
||||
MMU_INIT(AWIN_CORE_PBASE, AWIN_CORE_PBASE,
|
||||
(AWIN_CORE_SIZE + L1_S_SIZE - 1) / L1_S_SIZE,
|
||||
L1_S_PROTO_armv7 | L1_S_APv7_KRW | L1_S_V6_XN)
|
||||
|
||||
/* end of table */
|
||||
MMU_INIT(0, 0, 0, 0)
|
||||
|
||||
END(_C_LABEL(cubie_start))
|
||||
@ -1,38 +0,0 @@
|
||||
# $NetBSD: genassym.cf,v 1.1 2013/09/03 18:01:33 matt Exp $
|
||||
|
||||
#-
|
||||
# Copyright (c) 2013 The NetBSD Foundation, Inc.
|
||||
# All rights reserved.
|
||||
#
|
||||
# This code is derived from software contributed to The NetBSD Foundation
|
||||
# by Matt Thomas of 3am Software Foundry.
|
||||
#
|
||||
# Redistribution and use in source and binary forms, with or without
|
||||
# modification, are permitted provided that the following conditions
|
||||
# are met:
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
# ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
# TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
# PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
# BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
# POSSIBILITY OF SUCH DAMAGE.
|
||||
#
|
||||
|
||||
include <dev/ic/ns16550reg.h>
|
||||
include <dev/ic/comreg.h>
|
||||
|
||||
define LSR_TXRDY LSR_TXRDY
|
||||
define LSR_TSRE LSR_TSRE
|
||||
define COM_DATA com_data
|
||||
define COM_LSR com_lsr
|
||||
@ -1,54 +0,0 @@
|
||||
/* $NetBSD: platform.h,v 1.2 2014/03/03 03:06:13 matt Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2007 Microsoft
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. All advertising materials mentioning features or use of this software
|
||||
* must display the following acknowledgement:
|
||||
* This product includes software developed by Microsoft
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTERS BE LIABLE FOR ANY DIRECT,
|
||||
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _EVBARM_CUBIE_PLATFORM_H
|
||||
#define _EVBARM_CUBIE_PLATFORM_H
|
||||
|
||||
#include <arm/allwinner/awin_reg.h>
|
||||
|
||||
/*
|
||||
* Memory may be mapped VA:PA starting at 0x80000000:0x40000000
|
||||
* Kernel VM space: 576MB at KERNEL_VM_BASE
|
||||
*/
|
||||
#define KERNEL_VM_BASE 0xc0000000
|
||||
#define KERNEL_VM_SIZE 0x24000000
|
||||
|
||||
/*
|
||||
* We devmap IO starting at KERNEL_VM_BASE + KERNEL_VM_SIZE
|
||||
*/
|
||||
#define AWIN_KERNEL_IO_VBASE (KERNEL_VM_BASE + KERNEL_VM_SIZE)
|
||||
#define AWIN_CORE_VBASE AWIN_KERNEL_IO_VBASE
|
||||
#define AWIN_SRAM_VBASE (AWIN_CORE_VBASE + AWIN_CORE_SIZE)
|
||||
#define AWIN_KERNEL_IO_VEND (AWIN_SRAM_VBASE + AWIN_SRAM_SIZE)
|
||||
#define CONADDR_VA ((CONADDR - AWIN_CORE_PBASE) + AWIN_CORE_VBASE)
|
||||
#ifndef _LOCORE
|
||||
CTASSERT(AWIN_KERNEL_IO_VEND <= VM_MAX_KERNEL_ADDRESS);
|
||||
#endif
|
||||
#endif /* _EVBARM_CUBIE_PLATFORM_H */
|
||||
Loading…
Reference in New Issue
Block a user