Support for 4ch/6ch audio playback with VT8233/VT8235.
This commit is contained in:
kent
parent
706c1ce906
commit
565a6b3384
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@ -1,4 +1,4 @@
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/* $NetBSD: auvia.c,v 1.26 2002/10/08 13:10:24 kent Exp $ */
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/* $NetBSD: auvia.c,v 1.27 2002/10/16 15:27:28 kent Exp $ */
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/*-
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* Copyright (c) 2000 The NetBSD Foundation, Inc.
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@ -47,7 +47,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: auvia.c,v 1.26 2002/10/08 13:10:24 kent Exp $");
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__KERNEL_RCSID(0, "$NetBSD: auvia.c,v 1.27 2002/10/16 15:27:28 kent Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -90,7 +90,9 @@ int auvia_match(struct device *, struct cfdata *, void *);
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void auvia_attach(struct device *, struct device *, void *);
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int auvia_open(void *, int);
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void auvia_close(void *);
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int auvia_query_encoding(void *addr, struct audio_encoding *fp);
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int auvia_query_encoding(void *, struct audio_encoding *);
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void auvia_set_params_sub(struct auvia_softc *, struct auvia_softc_chan *,
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struct audio_params *);
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int auvia_set_params(void *, int, int, struct audio_params *,
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struct audio_params *);
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int auvia_round_blocksize(void *, int);
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@ -130,6 +132,7 @@ CFATTACH_DECL(auvia, sizeof (struct auvia_softc),
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#define AUVIA_PLAY_BASE 0x00
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#define AUVIA_RECORD_BASE 0x10
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/* *_RP_* are offsets from AUVIA_PLAY_BASE or AUVIA_RECORD_BASE */
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#define AUVIA_RP_STAT 0x00
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#define AUVIA_RPSTAT_INTR 0x03
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#define AUVIA_RP_CONTROL 0x01
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@ -140,7 +143,7 @@ CFATTACH_DECL(auvia, sizeof (struct auvia_softc),
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#define AUVIA_RPCTRL_STOP 0x04
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#define AUVIA_RPCTRL_EOL 0x02
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#define AUVIA_RPCTRL_FLAG 0x01
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#define AUVIA_RP_MODE 0x02
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#define AUVIA_RP_MODE 0x02 /* 82c686 specific */
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#define AUVIA_RPMODE_INTR_FLAG 0x01
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#define AUVIA_RPMODE_INTR_EOL 0x02
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#define AUVIA_RPMODE_STEREO 0x10
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@ -157,12 +160,30 @@ CFATTACH_DECL(auvia, sizeof (struct auvia_softc),
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#define VIA_RP_DMAOPS_COUNT 0x0c
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#define VIA8233_MP_BASE 0x40
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/* STAT, CONTROL, DMAOPS_BASE, DMAOPS_COUNT are valid */
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#define VIA8233_OFF_MP_FORMAT 0x02
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#define VIA8233_MP_FORMAT_8BIT 0x00
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#define VIA8233_MP_FORMAT_16BIT 0x80
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#define VIA8233_MP_FORMAT_CHANNLE_MASK 0x70 /* 1, 2, 4, 6 */
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#define VIA8233_OFF_MP_SCRATCH 0x03
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#define VIA8233_OFF_MP_STOP 0x08
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#define AUVIA_CODEC_CTL 0x80
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#define AUVIA_CODEC_READ 0x00800000
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#define AUVIA_CODEC_BUSY 0x01000000
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#define AUVIA_CODEC_PRIVALID 0x02000000
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#define AUVIA_CODEC_INDEX(x) ((x)<<16)
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#define CH_WRITE1(sc, ch, off, v) \
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bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off), v)
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#define CH_WRITE4(sc, ch, off, v) \
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bus_space_write_4((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off), v)
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#define CH_READ1(sc, ch, off) \
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bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off))
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#define CH_READ4(sc, ch, off) \
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bus_space_read_4((sc)->sc_iot, (sc)->sc_ioh, (ch)->sc_base + (off))
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#define TIMEOUT 50
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struct audio_hw_if auvia_hw_if = {
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@ -228,16 +249,19 @@ auvia_attach(struct device *parent, struct device *self, void *aux)
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struct pci_attach_args *pa = aux;
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struct auvia_softc *sc = (struct auvia_softc *) self;
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const char *intrstr = NULL;
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struct mixer_ctrl ctl;
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pci_chipset_tag_t pc = pa->pa_pc;
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pcitag_t pt = pa->pa_tag;
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pci_intr_handle_t ih;
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bus_size_t iosize;
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pcireg_t pr;
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int r, i;
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int r;
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if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_VIATECH_VT8233_AC97)
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sc->sc_play.sc_base = AUVIA_PLAY_BASE;
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sc->sc_record.sc_base = AUVIA_RECORD_BASE;
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if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_VIATECH_VT8233_AC97) {
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sc->sc_flags |= AUVIA_FLAGS_VT8233;
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sc->sc_play.sc_base = VIA8233_MP_BASE;
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}
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if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0, &sc->sc_iot,
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&sc->sc_ioh, NULL, &iosize)) {
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@ -319,37 +343,6 @@ auvia_attach(struct device *parent, struct device *self, void *aux)
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return;
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}
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/* disable mutes */
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for (i = 0; i < 4; i++) {
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static struct {
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char *class, *device;
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} d[] = {
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{ AudioCoutputs, AudioNmaster},
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{ AudioCinputs, AudioNdac},
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{ AudioCinputs, AudioNcd},
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{ AudioCinputs, AudioNline},
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{ AudioCrecord, AudioNvolume},
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};
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ctl.type = AUDIO_MIXER_ENUM;
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ctl.un.ord = 0;
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ctl.dev = sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if,
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d[i].class, d[i].device, AudioNmute);
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auvia_set_port(sc, &ctl);
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}
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/* set a reasonable default volume */
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ctl.type = AUDIO_MIXER_VALUE;
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ctl.un.value.num_channels = 2;
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ctl.un.value.level[AUDIO_MIXER_LEVEL_LEFT] = \
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ctl.un.value.level[AUDIO_MIXER_LEVEL_RIGHT] = 199;
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ctl.dev = sc->codec_if->vtbl->get_portnum_by_name(sc->codec_if,
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AudioCoutputs, AudioNmaster, NULL);
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auvia_set_port(sc, &ctl);
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audio_attach_mi(&auvia_hw_if, sc, &sc->sc_dev);
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}
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@ -540,16 +533,58 @@ auvia_query_encoding(void *addr, struct audio_encoding *fp)
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}
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}
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void
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auvia_set_params_sub(struct auvia_softc *sc, struct auvia_softc_chan *ch,
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struct audio_params *p)
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{
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u_int32_t v;
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u_int16_t regval;
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if (!(sc->sc_flags & AUVIA_FLAGS_VT8233)) {
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regval = (p->channels == 2 ? AUVIA_RPMODE_STEREO : 0)
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| (p->precision * p->factor == 16 ?
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AUVIA_RPMODE_16BIT : 0)
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| AUVIA_RPMODE_INTR_FLAG | AUVIA_RPMODE_INTR_EOL
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| AUVIA_RPMODE_AUTOSTART;
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ch->sc_reg = regval;
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} else if (ch->sc_base != VIA8233_MP_BASE) {
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v = CH_READ4(sc, ch, VIA8233_RP_RATEFMT);
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v &= ~(VIA8233_RATEFMT_48K | VIA8233_RATEFMT_STEREO
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| VIA8233_RATEFMT_16BIT);
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v |= VIA8233_RATEFMT_48K * (p->sample_rate / 20)
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/ (48000 / 20);
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if (p->channels == 2)
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v |= VIA8233_RATEFMT_STEREO;
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if (p->precision == 16)
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v |= VIA8233_RATEFMT_16BIT;
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CH_WRITE4(sc, ch, VIA8233_RP_RATEFMT, v);
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} else {
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static const u_int32_t slottab[7] =
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{ 0, 0xff000011, 0xff000021, 0,
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0xff004321, 0, 0xff436521};
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regval = (p->hw_precision == 16
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? VIA8233_MP_FORMAT_16BIT : VIA8233_MP_FORMAT_8BIT)
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| (p->hw_channels << 4);
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CH_WRITE1(sc, ch, VIA8233_OFF_MP_FORMAT, regval);
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CH_WRITE4(sc, ch, VIA8233_OFF_MP_STOP, slottab[p->hw_channels]);
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}
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}
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int
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auvia_set_params(void *addr, int setmode, int usemode,
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struct audio_params *play, struct audio_params *rec)
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{
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struct auvia_softc *sc = addr;
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struct auvia_softc_chan *ch;
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struct audio_params *p;
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u_int16_t regval;
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int reg, mode, base;
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struct ac97_codec_if* codec;
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int reg, mode;
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u_int16_t ext_id;
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codec = sc->codec_if;
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/* for mode in (RECORD, PLAY) */
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for (mode = AUMODE_RECORD; mode != -1;
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mode = mode == AUMODE_RECORD ? AUMODE_PLAY : -1) {
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@ -558,43 +593,54 @@ auvia_set_params(void *addr, int setmode, int usemode,
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if (mode == AUMODE_PLAY ) {
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p = play;
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base = AUVIA_PLAY_BASE;
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ch = &sc->sc_play;
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} else {
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p = rec;
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base = AUVIA_RECORD_BASE;
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ch = &sc->sc_record;
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}
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if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
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u_int32_t v = bus_space_read_4(sc->sc_iot, sc->sc_ioh,
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base + VIA8233_RP_RATEFMT) & ~(VIA8233_RATEFMT_48K
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| VIA8233_RATEFMT_STEREO | VIA8233_RATEFMT_16BIT);
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v |= VIA8233_RATEFMT_48K * (p->sample_rate / 20)
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/ (48000 / 20);
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if (p->channels == 2)
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v |= VIA8233_RATEFMT_STEREO;
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if( p->precision == 16)
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v |= VIA8233_RATEFMT_16BIT;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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base + VIA8233_RP_RATEFMT, v);
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if (ch->sc_base == VIA8233_MP_BASE) {
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ext_id = codec->vtbl->get_extcaps(codec);
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if (p->channels == 1) {
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/* ok */
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} else if (p->channels == 2) {
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/* ok */
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} else if (p->channels == 4
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&& ext_id & AC97_EXT_AUDIO_SDAC) {
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/* ok */
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#define BITS_6CH (AC97_EXT_AUDIO_SDAC | AC97_EXT_AUDIO_CDAC | AC97_EXT_AUDIO_LDAC)
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} else if (p->channels == 6
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&& (ext_id & BITS_6CH) == BITS_6CH) {
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/* ok */
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} else {
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return (EINVAL);
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}
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} else {
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if (p->channels != 1 && p->channels != 2)
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return (EINVAL);
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}
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if (p->sample_rate < 4000 || p->sample_rate > 48000 ||
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(p->precision != 8 && p->precision != 16) ||
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(p->channels != 1 && p->channels != 2))
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(p->precision != 8 && p->precision != 16))
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return (EINVAL);
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reg = mode == AUMODE_PLAY ?
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AC97_REG_PCM_FRONT_DAC_RATE : AC97_REG_PCM_LR_ADC_RATE;
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if (IS_FIXED_RATE(sc->codec_if)) {
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if (IS_FIXED_RATE(codec)) {
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/* Enable aurateconv */
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p->hw_sample_rate = AC97_SINGLE_RATE;
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} else {
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if (sc->codec_if->vtbl->set_rate(sc->codec_if, reg,
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&p->sample_rate))
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if (codec->vtbl->set_rate(codec, reg, &p->sample_rate))
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return (EINVAL);
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reg = AC97_REG_PCM_SURR_DAC_RATE;
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if (p->channels >= 4
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&& codec->vtbl->set_rate(codec, reg,
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&p->sample_rate))
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return (EINVAL);
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reg = AC97_REG_PCM_LFE_DAC_RATE;
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if (p->channels == 6
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&& codec->vtbl->set_rate(codec, reg,
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&p->sample_rate))
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return (EINVAL);
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}
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@ -602,14 +648,19 @@ auvia_set_params(void *addr, int setmode, int usemode,
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p->sw_code = 0;
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switch (p->encoding) {
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case AUDIO_ENCODING_SLINEAR_BE:
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if (p->precision == 16)
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if (p->precision == 16) {
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p->sw_code = swap_bytes;
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else
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p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
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} else {
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p->sw_code = change_sign8;
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p->hw_encoding = AUDIO_ENCODING_ULINEAR;
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}
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break;
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case AUDIO_ENCODING_SLINEAR_LE:
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if (p->precision != 16)
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if (p->precision != 16) {
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p->sw_code = change_sign8;
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p->hw_encoding = AUDIO_ENCODING_ULINEAR;
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}
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break;
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case AUDIO_ENCODING_ULINEAR_BE:
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if (p->precision == 16) {
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@ -617,41 +668,45 @@ auvia_set_params(void *addr, int setmode, int usemode,
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p->sw_code = swap_bytes_change_sign16_le;
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else
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p->sw_code = change_sign16_swap_bytes_le;
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p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
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}
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break;
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case AUDIO_ENCODING_ULINEAR_LE:
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if (p->precision == 16)
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if (p->precision == 16) {
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p->sw_code = change_sign16_le;
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p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
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}
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break;
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case AUDIO_ENCODING_ULAW:
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if (p->precision != 8)
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return (EINVAL);
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if (mode == AUMODE_PLAY) {
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p->factor = 2;
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p->sw_code = mulaw_to_slinear16_le;
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} else
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p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
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p->hw_precision = 16;
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} else {
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p->sw_code = ulinear8_to_mulaw;
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p->hw_encoding = AUDIO_ENCODING_ULINEAR;
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}
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break;
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case AUDIO_ENCODING_ALAW:
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if (p->precision != 8)
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return (EINVAL);
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if (mode == AUMODE_PLAY) {
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p->factor = 2;
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p->sw_code = alaw_to_slinear16_le;
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} else
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p->hw_encoding = AUDIO_ENCODING_SLINEAR_LE;
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p->hw_precision = 16;
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} else {
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p->sw_code = ulinear8_to_alaw;
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p->hw_encoding = AUDIO_ENCODING_ULINEAR;
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}
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break;
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default:
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return (EINVAL);
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}
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regval = (p->channels == 2 ? AUVIA_RPMODE_STEREO : 0)
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| (p->precision * p->factor == 16 ?
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AUVIA_RPMODE_16BIT : 0)
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| AUVIA_RPMODE_INTR_FLAG | AUVIA_RPMODE_INTR_EOL
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| AUVIA_RPMODE_AUTOSTART;
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if (mode == AUMODE_PLAY) {
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sc->sc_play.sc_reg = regval;
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} else {
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sc->sc_record.sc_reg = regval;
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}
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auvia_set_params_sub(sc, ch, p);
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}
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return 0;
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@ -669,10 +724,9 @@ int
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auvia_halt_output(void *addr)
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{
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struct auvia_softc *sc = addr;
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struct auvia_softc_chan *ch = &(sc->sc_play);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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AUVIA_PLAY_BASE + AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
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CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
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return 0;
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}
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@ -681,10 +735,9 @@ int
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auvia_halt_input(void *addr)
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{
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struct auvia_softc *sc = addr;
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struct auvia_softc_chan *ch = &(sc->sc_record);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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AUVIA_PLAY_BASE + AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
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CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_TERMINATE);
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return 0;
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}
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@ -949,24 +1002,20 @@ auvia_trigger_output(void *addr, void *start, void *end,
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ch->sc_intr = intr;
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ch->sc_arg = arg;
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bus_space_write_4(sc->sc_iot, sc->sc_ioh,
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AUVIA_PLAY_BASE + AUVIA_RP_DMAOPS_BASE,
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CH_WRITE4(sc, ch, AUVIA_RP_DMAOPS_BASE,
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ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr);
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if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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AUVIA_PLAY_BASE + VIA8233_RP_DXS_LVOL, 0);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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AUVIA_PLAY_BASE + VIA8233_RP_DXS_RVOL, 0);
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bus_space_write_1(sc->sc_iot, sc->sc_ioh,
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AUVIA_PLAY_BASE + AUVIA_RP_CONTROL,
|
||||
if (ch->sc_base != VIA8233_MP_BASE) {
|
||||
CH_WRITE1(sc, ch, VIA8233_RP_DXS_LVOL, 0);
|
||||
CH_WRITE1(sc, ch, VIA8233_RP_DXS_RVOL, 0);
|
||||
}
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_CONTROL,
|
||||
AUVIA_RPCTRL_START | AUVIA_RPCTRL_AUTOSTART |
|
||||
AUVIA_RPCTRL_STOP | AUVIA_RPCTRL_EOL | AUVIA_RPCTRL_FLAG);
|
||||
} else {
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_PLAY_BASE + AUVIA_RP_MODE, ch->sc_reg);
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_PLAY_BASE + AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_MODE, ch->sc_reg);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -996,24 +1045,18 @@ auvia_trigger_input(void *addr, void *start, void *end,
|
|||
ch->sc_intr = intr;
|
||||
ch->sc_arg = arg;
|
||||
|
||||
bus_space_write_4(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + AUVIA_RP_DMAOPS_BASE,
|
||||
ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr);
|
||||
CH_WRITE4(sc, ch, AUVIA_RP_DMAOPS_BASE,
|
||||
ch->sc_dma_ops_dma->map->dm_segs[0].ds_addr);
|
||||
|
||||
if (sc->sc_flags & AUVIA_FLAGS_VT8233) {
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + VIA8233_RP_DXS_LVOL, 0);
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + VIA8233_RP_DXS_RVOL, 0);
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + AUVIA_RP_CONTROL,
|
||||
CH_WRITE1(sc, ch, VIA8233_RP_DXS_LVOL, 0);
|
||||
CH_WRITE1(sc, ch, VIA8233_RP_DXS_RVOL, 0);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_CONTROL,
|
||||
AUVIA_RPCTRL_START | AUVIA_RPCTRL_AUTOSTART |
|
||||
AUVIA_RPCTRL_STOP | AUVIA_RPCTRL_EOL | AUVIA_RPCTRL_FLAG);
|
||||
} else {
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + AUVIA_RP_MODE, ch->sc_reg);
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_MODE, ch->sc_reg);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_CONTROL, AUVIA_RPCTRL_START);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
|
@ -1024,32 +1067,31 @@ int
|
|||
auvia_intr(void *arg)
|
||||
{
|
||||
struct auvia_softc *sc = arg;
|
||||
struct auvia_softc_chan *ch;
|
||||
u_int8_t r;
|
||||
int rval;
|
||||
|
||||
rval = 0;
|
||||
|
||||
r = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + AUVIA_RP_STAT);
|
||||
ch = &sc->sc_record;
|
||||
r = CH_READ1(sc, ch, AUVIA_RP_STAT);
|
||||
if (r & AUVIA_RPSTAT_INTR) {
|
||||
if (sc->sc_record.sc_intr)
|
||||
sc->sc_record.sc_intr(sc->sc_record.sc_arg);
|
||||
|
||||
/* clear interrupts */
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_RECORD_BASE + AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);
|
||||
rval = 1;
|
||||
}
|
||||
|
||||
r = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_PLAY_BASE + AUVIA_RP_STAT);
|
||||
ch = &sc->sc_play;
|
||||
r = CH_READ1(sc, ch, AUVIA_RP_STAT);
|
||||
if (r & AUVIA_RPSTAT_INTR) {
|
||||
if (sc->sc_play.sc_intr)
|
||||
sc->sc_play.sc_intr(sc->sc_play.sc_arg);
|
||||
|
||||
/* clear interrupts */
|
||||
bus_space_write_1(sc->sc_iot, sc->sc_ioh,
|
||||
AUVIA_PLAY_BASE + AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);
|
||||
CH_WRITE1(sc, ch, AUVIA_RP_STAT, AUVIA_RPSTAT_INTR);
|
||||
rval = 1;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: auviavar.h,v 1.4 2002/10/08 13:10:24 kent Exp $ */
|
||||
/* $NetBSD: auviavar.h,v 1.5 2002/10/16 15:27:28 kent Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2000 The NetBSD Foundation, Inc.
|
||||
|
|
@ -47,6 +47,7 @@ struct auvia_softc_chan {
|
|||
struct auvia_dma_op *sc_dma_ops;
|
||||
struct auvia_dma *sc_dma_ops_dma;
|
||||
u_int16_t sc_dma_op_count;
|
||||
int sc_base;
|
||||
u_int16_t sc_reg;
|
||||
};
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue