If the frontend passes in sc->irq=0, set PCIC_INTR_ENABLE. Also, don't clear
that bit all over the bloody place
This commit is contained in:
parent
244c38a2ae
commit
55ff1b2294
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@ -1,4 +1,4 @@
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/* $NetBSD: i82365.c,v 1.72 2003/01/31 00:26:30 thorpej Exp $ */
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/* $NetBSD: i82365.c,v 1.73 2003/09/02 22:44:08 mycroft Exp $ */
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/*
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* Copyright (c) 2000 Christian E. Hopps. All rights reserved.
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@ -31,7 +31,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: i82365.c,v 1.72 2003/01/31 00:26:30 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: i82365.c,v 1.73 2003/09/02 22:44:08 mycroft Exp $");
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#define PCICDEBUG
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@ -442,6 +442,8 @@ pcic_attach_socket_finish(h)
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/* steer above mgmt interrupt to configured place */
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intr = pcic_read(h, PCIC_INTR);
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intr &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
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if (sc->irq == 0)
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intr |= PCIC_INTR_ENABLE;
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pcic_write(h, PCIC_INTR, intr);
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/* power down the socket */
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@ -1421,7 +1423,7 @@ pcic_chip_socket_enable(pch)
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/* disable interrupts */
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intr = pcic_read(h, PCIC_INTR);
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intr &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
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intr &= ~PCIC_INTR_IRQ_MASK;
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pcic_write(h, PCIC_INTR, intr);
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/* power down the socket to reset it, clear the card reset pin */
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@ -1557,7 +1559,7 @@ pcic_chip_socket_disable(pch)
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/* disable interrupts */
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intr = pcic_read(h, PCIC_INTR);
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intr &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
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intr &= ~PCIC_INTR_IRQ_MASK;
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pcic_write(h, PCIC_INTR, intr);
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/* power down the socket */
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@ -1,4 +1,4 @@
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/* $NetBSD: i82365_isasubr.c,v 1.31 2003/01/06 13:05:13 wiz Exp $ */
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/* $NetBSD: i82365_isasubr.c,v 1.32 2003/09/02 22:44:09 mycroft Exp $ */
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/*
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* Copyright (c) 2000 Christian E. Hopps. All rights reserved.
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: i82365_isasubr.c,v 1.31 2003/01/06 13:05:13 wiz Exp $");
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__KERNEL_RCSID(0, "$NetBSD: i82365_isasubr.c,v 1.32 2003/09/02 22:44:09 mycroft Exp $");
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#define PCICISADEBUG
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@ -496,7 +496,7 @@ pcic_isa_chip_intr_establish(pch, pf, ipl, fct, arg)
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h->ih_irq = irq;
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if (h->flags & PCIC_FLAG_ENABLED) {
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reg = pcic_read(h, PCIC_INTR);
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reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
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reg &= ~PCIC_INTR_IRQ_MASK;
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pcic_write(h, PCIC_INTR, reg | irq);
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}
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h->ih_irq = 0;
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if (h->flags & PCIC_FLAG_ENABLED) {
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reg = pcic_read(h, PCIC_INTR);
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reg &= ~(PCIC_INTR_IRQ_MASK | PCIC_INTR_ENABLE);
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reg &= ~PCIC_INTR_IRQ_MASK;
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pcic_write(h, PCIC_INTR, reg);
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}
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}
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