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move back get_com_freq() to sscom.c with #ifdef CPU_{S3C2800,S3C2410}

This commit is contained in:
bsh 2003-10-05 06:57:20 +00:00
parent e3ac3a4d0c
commit 55f95bf493
3 changed files with 49 additions and 59 deletions
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28
sys/arch/evbarm/stand/board/smdk2410.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: smdk2410.c,v 1.1 2003/09/03 03:18:30 mycroft Exp $ */
/* $NetBSD: smdk2410.c,v 1.2 2003/10/05 06:57:20 bsh Exp $ */
/*
* Copyright (c) 2003 By Noon Software, Inc. All rights reserved.
@ -63,29 +63,3 @@ mem_init(void)
start, (start + size) - 1, heap);
setheap((void *)heap, (void *)(heap + HEAP_SIZE - 1));
}
long get_com_freq(void);
long
get_com_freq(void)
{
long clk;
uint32_t pllcon = *(volatile uint32_t *)(S3C2410_CLKMAN_BASE+CLKMAN_MPLLCON);
uint32_t clkdivn = *(volatile uint32_t *)(S3C2410_CLKMAN_BASE+CLKMAN_CLKDIVN);
int mdiv = (pllcon & PLLCON_MDIV_MASK) >> PLLCON_MDIV_SHIFT;
int pdiv = (pllcon & PLLCON_PDIV_MASK) >> PLLCON_PDIV_SHIFT;
int sdiv = (pllcon & PLLCON_SDIV_MASK) >> PLLCON_SDIV_SHIFT;
#if XTAL_CLK < 1000 /* in MHz */
clk = (XTAL_CLK * 1000000 * (8 + mdiv)) / ((pdiv + 2) << sdiv);
#else /* in Hz */
clk = (XTAL_CLK * (8 + mdiv)) / ((pdiv + 2) << sdiv);
#endif
if (clkdivn & CLKDIVN_HDIVN)
clk /= 2;
if (clkdivn & CLKDIVN_PDIVN)
clk /= 2;
return clk;
}

30
sys/arch/evbarm/stand/board/smdk2800.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: smdk2800.c,v 1.2 2003/09/03 03:18:31 mycroft Exp $ */
/* $NetBSD: smdk2800.c,v 1.3 2003/10/05 06:57:20 bsh Exp $ */
/*
* Copyright (c) 2002, 2003 Fujitsu Component Limited
@ -102,31 +102,3 @@ get_flash_info(void *addr, struct flash_info *info)
return 0;
}
#endif
long get_com_freq(void);
long
get_com_freq(void)
{
long clk;
uint16_t clkcon = *(volatile uint16_t*)(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON);
uint32_t pllcon = *(volatile uint32_t*)(S3C2800_CLKMAN_BASE+CLKMAN_PLLCON);
int mdiv = (pllcon & PLLCON_MDIV_MASK) >> PLLCON_MDIV_SHIFT;
int pdiv = (pllcon & PLLCON_PDIV_MASK) >> PLLCON_PDIV_SHIFT;
int sdiv = (pllcon & PLLCON_SDIV_MASK) >> PLLCON_SDIV_SHIFT;
#if XTAL_CLK < 1000 /* in MHz */
clk = (XTAL_CLK * 1000000 * (8 + mdiv)) / ((pdiv + 2) << sdiv);
#else /* in Hz */
clk = (XTAL_CLK * (8 + mdiv)) / ((pdiv + 2) << sdiv);
#endif
/*printf( "M=%d P=%d S=%d\n", mdiv, pdiv, sdiv);*/
if (clkcon & CLKCON_HCLK)
clk /= 2;
if (clkcon & CLKCON_PCLK)
clk /= 2;
return clk;
}

50
sys/arch/evbarm/stand/board/sscom.c
View File

@ -1,4 +1,4 @@
/* $NetBSD: sscom.c,v 1.2 2003/09/03 03:18:31 mycroft Exp $ */
/* $NetBSD: sscom.c,v 1.3 2003/10/05 06:57:20 bsh Exp $ */
/*
@ -74,8 +74,12 @@
#include <sys/types.h>
#include <arch/arm/s3c2xx0/s3c2xx0reg.h>
#include <arch/arm/s3c2xx0/s3c24x0reg.h>
#ifdef CPU_S3C2410
#include <arch/arm/s3c2xx0/s3c2410reg.h>
#endif
#ifdef CPU_S3C2800
#include <arch/arm/s3c2xx0/s3c2800reg.h>
#endif
#include <lib/libsa/stand.h>
#include "board.h"
@ -91,7 +95,7 @@
#define ISSET(t,f) ((t) & (f))
long get_com_freq(void);
static long get_com_freq(void);
static int
sscomspeed(long speed)
@ -180,3 +184,43 @@ putchar(int c)
iputchar('\r');
iputchar(c);
}
#define read_reg(addr) (*(volatile uint32_t *)(addr))
static long
get_com_freq(void)
{
long clk;
#ifdef CPU_S3C2800
uint32_t pllcon = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_PLLCON);
uint32_t div = read_reg(S3C2800_CLKMAN_BASE+CLKMAN_CLKCON);
#define HDIV CLKCON_HCLK
#define PDIV CLKCON_PCLK
#endif
#ifdef CPU_S3C2410
uint32_t pllcon = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_MPLLCON);
uint32_t div = read_reg(S3C2410_CLKMAN_BASE+CLKMAN_CLKDIVN);
#define HDIV CLKDIVN_HDIVN
#define PDIV CLKDIVN_PDIVN
#endif
int mdiv = (pllcon & PLLCON_MDIV_MASK) >> PLLCON_MDIV_SHIFT;
int pdiv = (pllcon & PLLCON_PDIV_MASK) >> PLLCON_PDIV_SHIFT;
int sdiv = (pllcon & PLLCON_SDIV_MASK) >> PLLCON_SDIV_SHIFT;
#if XTAL_CLK < 1000 /* in MHz */
clk = (XTAL_CLK * 1000000 * (8 + mdiv)) / ((pdiv + 2) << sdiv);
#else /* in Hz */
clk = (XTAL_CLK * (8 + mdiv)) / ((pdiv + 2) << sdiv);
#endif
/*printf( "M=%d P=%d S=%d\n", mdiv, pdiv, sdiv);*/
if (div & HDIV)
clk /= 2;
if (div & PDIV)
clk /= 2;
return clk;
}