Add in 12160 (Ultra3) support. Turn back on fast posting for the new
generateion parallel SCSI cards (1240/1080/1280/12160). Split up nvram reading routines to be more readable. Fix topology reporting- 2200 has connected topology in mailbox 6 when you're done getting your loop id (supported: Private Loop (NL Port), N-Port, F-Port, FL-Port). The 2100 doens't report this, but we can synthesize it to be either NL-Port or FL-Port. Add in some connection mode async events.
This commit is contained in:
mjacob
parent
56e16448ad
commit
55a78c1ee4
646
sys/dev/ic/isp.c
646
sys/dev/ic/isp.c
@ -1,4 +1,4 @@
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/* $NetBSD: isp.c,v 1.48 2000/01/14 08:46:37 mjacob Exp $ */
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/* $NetBSD: isp.c,v 1.49 2000/02/12 02:32:21 mjacob Exp $ */
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/*
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* Copyright (C) 1997, 1998, 1999 National Aeronautics & Space Administration
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* All rights reserved.
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@ -95,6 +95,11 @@ static void isp_update_bus __P((struct ispsoftc *, int));
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static void isp_setdfltparm __P((struct ispsoftc *, int));
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static int isp_read_nvram __P((struct ispsoftc *));
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static void isp_rdnvram_word __P((struct ispsoftc *, int, u_int16_t *));
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static void isp_parse_nvram_1020 __P((struct ispsoftc *, u_int8_t *));
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static void isp_parse_nvram_1080 __P((struct ispsoftc *, int, u_int8_t *));
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static void isp_parse_nvram_12160 __P((struct ispsoftc *, int, u_int8_t *));
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static void isp_parse_nvram_2100 __P((struct ispsoftc *, u_int8_t *));
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/*
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* Reset Hardware.
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@ -188,7 +193,15 @@ isp_reset(isp)
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isp->isp_clock = 100;
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if (IS_1280(isp))
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revname = "1280";
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else if (IS_1080(isp))
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revname = "1080";
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else if (IS_12160(isp))
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revname = "12160";
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else
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revname = "<UNKLVD>";
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l = ISP_READ(isp, SXP_PINS_DIFF) & ISP1080_MODE_MASK;
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switch (l) {
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case ISP1080_LVD_MODE:
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@ -209,9 +222,8 @@ isp_reset(isp)
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break;
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}
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if (IS_1280(isp)) {
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if (IS_DUALBUS(isp)) {
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sdp++;
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revname[1] = '2';
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l = ISP_READ(isp, SXP_PINS_DIFF|SXP_BANK1_SELECT);
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l &= ISP1080_MODE_MASK;
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switch(l) {
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@ -802,8 +814,10 @@ isp_scsi_init(isp)
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mbs.param[1] = 0;
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if (IS_ULTRA2(isp))
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mbs.param[1] |= FW_FEATURE_LVD_NOTIFY;
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if (IS_ULTRA2(isp) || IS_1240(isp))
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mbs.param[1] |= FW_FEATURE_FAST_POST;
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#ifndef ISP_NO_FASTPOST_SCSI
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if ((ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(4, 55, 0) &&
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else if ((ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(4, 55, 0) &&
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(ISP_FW_REVX(isp->isp_fwrev) < ISP_FW_REV(5, 0, 0))) ||
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(ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(7, 55, 0))) {
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mbs.param[1] |= FW_FEATURE_FAST_POST;
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@ -1058,6 +1072,18 @@ isp_fibre_init(isp)
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icbp->icb_retry_delay = fcp->isp_retry_delay;
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icbp->icb_retry_count = fcp->isp_retry_count;
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icbp->icb_hardaddr = loopid;
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#ifdef PRET_A_PORTE
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if (IS_2200(isp)) {
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icbp->icb_fwoptions |= ICBOPT_EXTENDED;
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/*
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* Prefer or force Point-To-Point instead Loop?
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*/
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if (isp->isp_confopts & ISP_CFG_NPORT)
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icbp->icb_xfwoptions = ICBXOPT_PTP_2_LOOP;
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else
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icbp->icb_xfwoptions = ICBXOPT_LOOP_2_PTP;
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}
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#endif
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icbp->icb_logintime = 60; /* 60 second login timeout */
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if (fcp->isp_nodewwn) {
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@ -1237,7 +1263,6 @@ isp_fclink_test(isp, waitdelay)
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"N-Port to N-Port",
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"F Port"
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};
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char *tname;
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mbreg_t mbs;
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int count, topo = -1;
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u_int8_t lwfs;
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@ -1282,19 +1307,13 @@ isp_fclink_test(isp, waitdelay)
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return (-1);
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}
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fcp->isp_loopid = mbs.param[1];
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if (isp->isp_type == ISP_HA_FC_2200) {
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if (ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(2, 0, 14)) {
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if (IS_2200(isp)) {
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topo = (int) mbs.param[6];
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}
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} else if (isp->isp_type == ISP_HA_FC_2100) {
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if (ISP_FW_REVX(isp->isp_fwrev) >= ISP_FW_REV(1, 17, 26)) {
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topo = (int) mbs.param[6];
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}
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}
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if (topo < 0 || topo > 3)
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tname = "unknown";
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else
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tname = toponames[topo];
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topo = 0;
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} else {
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topo = 0;
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}
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/*
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* If we're not on a fabric, the low 8 bits will be our AL_PA.
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@ -1304,11 +1323,16 @@ isp_fclink_test(isp, waitdelay)
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#if defined(ISP2100_FABRIC)
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fcp->isp_onfabric = 0;
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if (isp_getpdb(isp, FL_PORT_ID, &pdb) == 0) {
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if (IS_2100(isp))
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topo = 1;
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fcp->isp_portid = mbs.param[2] | (((int)mbs.param[3]) << 16);
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fcp->isp_onfabric = 1;
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CFGPRINTF("%s: Loop ID %d, AL_PA 0x%x, Port ID 0x%x Loop State "
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"0x%x topology %s\n", isp->isp_name, fcp->isp_loopid,
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fcp->isp_alpa, fcp->isp_portid, fcp->isp_loopstate, tname);
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"0x%x topology '%s'\n", isp->isp_name, fcp->isp_loopid,
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fcp->isp_alpa, fcp->isp_portid, fcp->isp_loopstate,
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toponames[topo]);
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/*
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* Make sure we're logged out of all fabric devices.
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@ -1328,9 +1352,9 @@ isp_fclink_test(isp, waitdelay)
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}
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} else
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#endif
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CFGPRINTF("%s: Loop ID %d, ALPA 0x%x Loop State 0x%x topology %s\n",
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CFGPRINTF("%s: Loop ID %d, ALPA 0x%x Loop State 0x%x topology '%s'\n",
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isp->isp_name, fcp->isp_loopid, fcp->isp_alpa, fcp->isp_loopstate,
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tname);
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toponames[topo]);
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return (0);
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}
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@ -2711,6 +2735,37 @@ isp_parse_async(isp, mbox)
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isp_async(isp, ISPASYNC_CHANGE_NOTIFY, NULL);
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break;
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case ASYNC_PTPMODE:
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PRINTF("%s: Point-to-Point mode\n", isp->isp_name);
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break;
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case ASYNC_CONNMODE:
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mbox = ISP_READ(isp, OUTMAILBOX1);
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switch (mbox) {
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case ISP_CONN_LOOP:
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PRINTF("%s: Point-to-Point -> Loop mode\n",
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isp->isp_name);
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break;
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case ISP_CONN_PTP:
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PRINTF("%s: Loop -> Point-to-Point mode\n",
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isp->isp_name);
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break;
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case ISP_CONN_BADLIP:
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PRINTF("%s: Point-to-Point -> Loop mode (1)\n",
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isp->isp_name);
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break;
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case ISP_CONN_FATAL:
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PRINTF("%s: FATAL CONNECTION ERROR\n", isp->isp_name);
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isp_restart(isp);
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/* no point continuing after this */
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return (-1);
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case ISP_CONN_LOOPBACK:
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PRINTF("%s: Looped Back in Point-to-Point mode\n",
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isp->isp_name);
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}
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break;
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default:
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PRINTF("%s: unknown async code 0x%x\n", isp->isp_name, mbox);
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break;
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@ -3443,6 +3498,12 @@ command_known:
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}
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}
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if (IS_2200(isp)) {
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if (opcode == MBOX_GET_LOOP_ID) {
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mbp->param[6] = ISP_READ(isp, OUTMAILBOX6);
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}
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}
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switch (outparam) {
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case 8: mbp->param[7] = ISP_READ(isp, OUTMAILBOX7);
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case 7: mbp->param[6] = ISP_READ(isp, OUTMAILBOX6);
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@ -4018,13 +4079,10 @@ isp_restart(isp)
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/*
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* NVRAM Routines
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*/
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static int
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isp_read_nvram(isp)
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struct ispsoftc *isp;
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{
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static char *tru = "true";
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static char *not = "false";
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int i, amt;
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u_int8_t csum, minversion;
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union {
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@ -4077,124 +4135,101 @@ isp_read_nvram(isp)
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return (-1);
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}
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if (IS_ULTRA2(isp)) {
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int bus;
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sdparam *sdp = (sdparam *) isp->isp_param;
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for (bus = 0; bus < (IS_DUALBUS(isp)? 2 : 1); bus++, sdp++) {
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sdp->isp_fifo_threshold =
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ISP1080_NVRAM_FIFO_THRESHOLD(nvram_data);
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sdp->isp_initiator_id =
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ISP1080_NVRAM_INITIATOR_ID(nvram_data, bus);
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sdp->isp_bus_reset_delay =
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ISP1080_NVRAM_BUS_RESET_DELAY(nvram_data, bus);
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sdp->isp_retry_count =
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ISP1080_NVRAM_BUS_RETRY_COUNT(nvram_data, bus);
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sdp->isp_retry_delay =
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ISP1080_NVRAM_BUS_RETRY_DELAY(nvram_data, bus);
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sdp->isp_async_data_setup =
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ISP1080_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data,
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bus);
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sdp->isp_req_ack_active_neg =
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ISP1080_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data,
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bus);
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sdp->isp_data_line_active_neg =
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ISP1080_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data,
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bus);
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sdp->isp_data_dma_burst_enabl =
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ISP1080_NVRAM_BURST_ENABLE(nvram_data);
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sdp->isp_cmd_dma_burst_enable =
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ISP1080_NVRAM_BURST_ENABLE(nvram_data);
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sdp->isp_selection_timeout =
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ISP1080_NVRAM_SELECTION_TIMEOUT(nvram_data, bus);
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sdp->isp_max_queue_depth =
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ISP1080_NVRAM_MAX_QUEUE_DEPTH(nvram_data, bus);
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if (isp->isp_dblev >= 3) {
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PRINTF("%s: ISP1080 bus %d NVRAM values:\n",
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isp->isp_name, bus);
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PRINTF(" Initiator ID = %d\n",
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sdp->isp_initiator_id);
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PRINTF(" Fifo Threshold = 0x%x\n",
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sdp->isp_fifo_threshold);
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PRINTF(" Bus Reset Delay = %d\n",
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sdp->isp_bus_reset_delay);
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PRINTF(" Retry Count = %d\n",
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sdp->isp_retry_count);
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PRINTF(" Retry Delay = %d\n",
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sdp->isp_retry_delay);
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PRINTF(" Tag Age Limit = %d\n",
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sdp->isp_tag_aging);
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PRINTF(" Selection Timeout = %d\n",
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sdp->isp_selection_timeout);
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PRINTF(" Max Queue Depth = %d\n",
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sdp->isp_max_queue_depth);
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PRINTF(" Async Data Setup = 0x%x\n",
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sdp->isp_async_data_setup);
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PRINTF(" REQ/ACK Active Negation = %s\n",
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sdp->isp_req_ack_active_neg? tru : not);
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PRINTF(" Data Line Active Negation = %s\n",
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sdp->isp_data_line_active_neg? tru : not);
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PRINTF(" Cmd DMA Burst Enable = %s\n",
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sdp->isp_cmd_dma_burst_enable? tru : not);
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}
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for (i = 0; i < MAX_TARGETS; i++) {
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sdp->isp_devparam[i].dev_enable =
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ISP1080_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i, bus);
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sdp->isp_devparam[i].exc_throttle =
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ISP1080_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i, bus);
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sdp->isp_devparam[i].sync_offset =
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ISP1080_NVRAM_TGT_SYNC_OFFSET(nvram_data, i, bus);
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sdp->isp_devparam[i].sync_period =
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ISP1080_NVRAM_TGT_SYNC_PERIOD(nvram_data, i, bus);
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sdp->isp_devparam[i].dev_flags = 0;
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if (ISP1080_NVRAM_TGT_RENEG(nvram_data, i, bus))
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sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
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if (ISP1080_NVRAM_TGT_QFRZ(nvram_data, i, bus)) {
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PRINTF("%s: not supporting QFRZ option "
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"for target %d bus %d\n",
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isp->isp_name, i, bus);
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}
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sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
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if (ISP1080_NVRAM_TGT_ARQ(nvram_data, i, bus) == 0) {
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PRINTF("%s: not disabling ARQ option "
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"for target %d bus %d\n",
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isp->isp_name, i, bus);
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}
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if (ISP1080_NVRAM_TGT_TQING(nvram_data, i, bus))
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sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
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if (ISP1080_NVRAM_TGT_SYNC(nvram_data, i, bus))
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sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
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if (ISP1080_NVRAM_TGT_WIDE(nvram_data, i, bus))
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sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
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if (ISP1080_NVRAM_TGT_PARITY(nvram_data, i, bus))
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sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
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if (ISP1080_NVRAM_TGT_DISC(nvram_data, i, bus))
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sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
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sdp->isp_devparam[i].cur_dflags = 0;
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if (isp->isp_dblev >= 3) {
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PRINTF(" Target %d: Ena %d Throttle "
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"%d Offset %d Period %d Flags "
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"0x%x\n", i,
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sdp->isp_devparam[i].dev_enable,
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sdp->isp_devparam[i].exc_throttle,
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sdp->isp_devparam[i].sync_offset,
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sdp->isp_devparam[i].sync_period,
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sdp->isp_devparam[i].dev_flags);
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}
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}
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}
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if (IS_ULTRA3(isp)) {
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isp_parse_nvram_12160(isp, 0, nvram_data);
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isp_parse_nvram_12160(isp, 1, nvram_data);
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} else if (IS_1080(isp)) {
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isp_parse_nvram_1080(isp, 0, nvram_data);
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} else if (IS_1280(isp) || IS_1240(isp)) {
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isp_parse_nvram_1080(isp, 0, nvram_data);
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isp_parse_nvram_1080(isp, 1, nvram_data);
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} else if (IS_SCSI(isp)) {
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isp_parse_nvram_1020(isp, nvram_data);
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} else {
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isp_parse_nvram_2100(isp, nvram_data);
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}
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IDPRINTF(3, ("%s: NVRAM is valid\n", isp->isp_name));
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return (0);
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#undef nvram_data
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#undef nvram_words
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}
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static void
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isp_rdnvram_word(isp, wo, rp)
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struct ispsoftc *isp;
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int wo;
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u_int16_t *rp;
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{
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int i, cbits;
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u_int16_t bit, rqst;
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ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT);
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SYS_DELAY(2);
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ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT|BIU_NVRAM_CLOCK);
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SYS_DELAY(2);
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if (IS_FC(isp)) {
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wo &= ((ISP2100_NVRAM_SIZE >> 1) - 1);
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rqst = (ISP_NVRAM_READ << 8) | wo;
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cbits = 10;
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} else if (IS_ULTRA2(isp)) {
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wo &= ((ISP1080_NVRAM_SIZE >> 1) - 1);
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rqst = (ISP_NVRAM_READ << 8) | wo;
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cbits = 10;
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} else {
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wo &= ((ISP_NVRAM_SIZE >> 1) - 1);
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rqst = (ISP_NVRAM_READ << 6) | wo;
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cbits = 8;
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}
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/*
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* Clock the word select request out...
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*/
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for (i = cbits; i >= 0; i--) {
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if ((rqst >> i) & 1) {
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bit = BIU_NVRAM_SELECT | BIU_NVRAM_DATAOUT;
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} else {
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bit = BIU_NVRAM_SELECT;
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}
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ISP_WRITE(isp, BIU_NVRAM, bit);
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SYS_DELAY(2);
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ISP_WRITE(isp, BIU_NVRAM, bit | BIU_NVRAM_CLOCK);
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SYS_DELAY(2);
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ISP_WRITE(isp, BIU_NVRAM, bit);
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SYS_DELAY(2);
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}
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/*
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* Now read the result back in (bits come back in MSB format).
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*/
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*rp = 0;
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for (i = 0; i < 16; i++) {
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u_int16_t rv;
|
||||
*rp <<= 1;
|
||||
ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT|BIU_NVRAM_CLOCK);
|
||||
SYS_DELAY(2);
|
||||
rv = ISP_READ(isp, BIU_NVRAM);
|
||||
if (rv & BIU_NVRAM_DATAIN) {
|
||||
*rp |= 1;
|
||||
}
|
||||
SYS_DELAY(2);
|
||||
ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT);
|
||||
SYS_DELAY(2);
|
||||
}
|
||||
ISP_WRITE(isp, BIU_NVRAM, 0);
|
||||
SYS_DELAY(2);
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
*rp = ((*rp >> 8) | ((*rp & 0xff) << 8));
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
isp_parse_nvram_1020(isp, nvram_data)
|
||||
struct ispsoftc *isp;
|
||||
u_int8_t *nvram_data;
|
||||
{
|
||||
int i;
|
||||
static char *tru = "true";
|
||||
static char *not = "false";
|
||||
sdparam *sdp = (sdparam *) isp->isp_param;
|
||||
|
||||
sdp->isp_fifo_threshold =
|
||||
@ -4338,7 +4373,264 @@ isp_read_nvram(isp)
|
||||
sdp->isp_devparam[i].dev_flags);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
}
|
||||
|
||||
static void
|
||||
isp_parse_nvram_1080(isp, bus, nvram_data)
|
||||
struct ispsoftc *isp;
|
||||
int bus;
|
||||
u_int8_t *nvram_data;
|
||||
{
|
||||
static char *tru = "true";
|
||||
static char *not = "false";
|
||||
int i;
|
||||
sdparam *sdp = (sdparam *) isp->isp_param;
|
||||
sdp += bus;
|
||||
|
||||
sdp->isp_fifo_threshold =
|
||||
ISP1080_NVRAM_FIFO_THRESHOLD(nvram_data);
|
||||
|
||||
sdp->isp_initiator_id =
|
||||
ISP1080_NVRAM_INITIATOR_ID(nvram_data, bus);
|
||||
|
||||
sdp->isp_bus_reset_delay =
|
||||
ISP1080_NVRAM_BUS_RESET_DELAY(nvram_data, bus);
|
||||
|
||||
sdp->isp_retry_count =
|
||||
ISP1080_NVRAM_BUS_RETRY_COUNT(nvram_data, bus);
|
||||
|
||||
sdp->isp_retry_delay =
|
||||
ISP1080_NVRAM_BUS_RETRY_DELAY(nvram_data, bus);
|
||||
|
||||
sdp->isp_async_data_setup =
|
||||
ISP1080_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data,
|
||||
bus);
|
||||
|
||||
sdp->isp_req_ack_active_neg =
|
||||
ISP1080_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data,
|
||||
bus);
|
||||
|
||||
sdp->isp_data_line_active_neg =
|
||||
ISP1080_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data,
|
||||
bus);
|
||||
|
||||
sdp->isp_data_dma_burst_enabl =
|
||||
ISP1080_NVRAM_BURST_ENABLE(nvram_data);
|
||||
|
||||
sdp->isp_cmd_dma_burst_enable =
|
||||
ISP1080_NVRAM_BURST_ENABLE(nvram_data);
|
||||
|
||||
sdp->isp_selection_timeout =
|
||||
ISP1080_NVRAM_SELECTION_TIMEOUT(nvram_data, bus);
|
||||
|
||||
sdp->isp_max_queue_depth =
|
||||
ISP1080_NVRAM_MAX_QUEUE_DEPTH(nvram_data, bus);
|
||||
|
||||
if (isp->isp_dblev >= 3) {
|
||||
PRINTF("%s: ISP1080 bus %d NVRAM values:\n",
|
||||
isp->isp_name, bus);
|
||||
PRINTF(" Initiator ID = %d\n",
|
||||
sdp->isp_initiator_id);
|
||||
PRINTF(" Fifo Threshold = 0x%x\n",
|
||||
sdp->isp_fifo_threshold);
|
||||
PRINTF(" Bus Reset Delay = %d\n",
|
||||
sdp->isp_bus_reset_delay);
|
||||
PRINTF(" Retry Count = %d\n",
|
||||
sdp->isp_retry_count);
|
||||
PRINTF(" Retry Delay = %d\n",
|
||||
sdp->isp_retry_delay);
|
||||
PRINTF(" Tag Age Limit = %d\n",
|
||||
sdp->isp_tag_aging);
|
||||
PRINTF(" Selection Timeout = %d\n",
|
||||
sdp->isp_selection_timeout);
|
||||
PRINTF(" Max Queue Depth = %d\n",
|
||||
sdp->isp_max_queue_depth);
|
||||
PRINTF(" Async Data Setup = 0x%x\n",
|
||||
sdp->isp_async_data_setup);
|
||||
PRINTF(" REQ/ACK Active Negation = %s\n",
|
||||
sdp->isp_req_ack_active_neg? tru : not);
|
||||
PRINTF(" Data Line Active Negation = %s\n",
|
||||
sdp->isp_data_line_active_neg? tru : not);
|
||||
PRINTF(" Cmd DMA Burst Enable = %s\n",
|
||||
sdp->isp_cmd_dma_burst_enable? tru : not);
|
||||
}
|
||||
for (i = 0; i < MAX_TARGETS; i++) {
|
||||
sdp->isp_devparam[i].dev_enable =
|
||||
ISP1080_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].exc_throttle =
|
||||
ISP1080_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].sync_offset =
|
||||
ISP1080_NVRAM_TGT_SYNC_OFFSET(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].sync_period =
|
||||
ISP1080_NVRAM_TGT_SYNC_PERIOD(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].dev_flags = 0;
|
||||
if (ISP1080_NVRAM_TGT_RENEG(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
|
||||
if (ISP1080_NVRAM_TGT_QFRZ(nvram_data, i, bus)) {
|
||||
PRINTF("%s: not supporting QFRZ option "
|
||||
"for target %d bus %d\n",
|
||||
isp->isp_name, i, bus);
|
||||
}
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
|
||||
if (ISP1080_NVRAM_TGT_ARQ(nvram_data, i, bus) == 0) {
|
||||
PRINTF("%s: not disabling ARQ option "
|
||||
"for target %d bus %d\n",
|
||||
isp->isp_name, i, bus);
|
||||
}
|
||||
if (ISP1080_NVRAM_TGT_TQING(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
|
||||
if (ISP1080_NVRAM_TGT_SYNC(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
|
||||
if (ISP1080_NVRAM_TGT_WIDE(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
|
||||
if (ISP1080_NVRAM_TGT_PARITY(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
|
||||
if (ISP1080_NVRAM_TGT_DISC(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
|
||||
sdp->isp_devparam[i].cur_dflags = 0;
|
||||
if (isp->isp_dblev >= 3) {
|
||||
PRINTF(" Target %d: Ena %d Throttle "
|
||||
"%d Offset %d Period %d Flags "
|
||||
"0x%x\n", i,
|
||||
sdp->isp_devparam[i].dev_enable,
|
||||
sdp->isp_devparam[i].exc_throttle,
|
||||
sdp->isp_devparam[i].sync_offset,
|
||||
sdp->isp_devparam[i].sync_period,
|
||||
sdp->isp_devparam[i].dev_flags);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
isp_parse_nvram_12160(isp, bus, nvram_data)
|
||||
struct ispsoftc *isp;
|
||||
int bus;
|
||||
u_int8_t *nvram_data;
|
||||
{
|
||||
static char *tru = "true";
|
||||
static char *not = "false";
|
||||
sdparam *sdp = (sdparam *) isp->isp_param;
|
||||
int i;
|
||||
|
||||
sdp += bus;
|
||||
|
||||
sdp->isp_fifo_threshold =
|
||||
ISP12160_NVRAM_FIFO_THRESHOLD(nvram_data);
|
||||
|
||||
sdp->isp_initiator_id =
|
||||
ISP12160_NVRAM_INITIATOR_ID(nvram_data, bus);
|
||||
|
||||
sdp->isp_bus_reset_delay =
|
||||
ISP12160_NVRAM_BUS_RESET_DELAY(nvram_data, bus);
|
||||
|
||||
sdp->isp_retry_count =
|
||||
ISP12160_NVRAM_BUS_RETRY_COUNT(nvram_data, bus);
|
||||
|
||||
sdp->isp_retry_delay =
|
||||
ISP12160_NVRAM_BUS_RETRY_DELAY(nvram_data, bus);
|
||||
|
||||
sdp->isp_async_data_setup =
|
||||
ISP12160_NVRAM_ASYNC_DATA_SETUP_TIME(nvram_data,
|
||||
bus);
|
||||
|
||||
sdp->isp_req_ack_active_neg =
|
||||
ISP12160_NVRAM_REQ_ACK_ACTIVE_NEGATION(nvram_data,
|
||||
bus);
|
||||
|
||||
sdp->isp_data_line_active_neg =
|
||||
ISP12160_NVRAM_DATA_LINE_ACTIVE_NEGATION(nvram_data,
|
||||
bus);
|
||||
|
||||
sdp->isp_data_dma_burst_enabl =
|
||||
ISP12160_NVRAM_BURST_ENABLE(nvram_data);
|
||||
|
||||
sdp->isp_cmd_dma_burst_enable =
|
||||
ISP12160_NVRAM_BURST_ENABLE(nvram_data);
|
||||
|
||||
sdp->isp_selection_timeout =
|
||||
ISP12160_NVRAM_SELECTION_TIMEOUT(nvram_data, bus);
|
||||
|
||||
sdp->isp_max_queue_depth =
|
||||
ISP12160_NVRAM_MAX_QUEUE_DEPTH(nvram_data, bus);
|
||||
|
||||
if (isp->isp_dblev >= 3) {
|
||||
PRINTF("%s: ISP12160 bus %d NVRAM values:\n",
|
||||
isp->isp_name, bus);
|
||||
PRINTF(" Initiator ID = %d\n",
|
||||
sdp->isp_initiator_id);
|
||||
PRINTF(" Fifo Threshold = 0x%x\n",
|
||||
sdp->isp_fifo_threshold);
|
||||
PRINTF(" Bus Reset Delay = %d\n",
|
||||
sdp->isp_bus_reset_delay);
|
||||
PRINTF(" Retry Count = %d\n",
|
||||
sdp->isp_retry_count);
|
||||
PRINTF(" Retry Delay = %d\n",
|
||||
sdp->isp_retry_delay);
|
||||
PRINTF(" Tag Age Limit = %d\n",
|
||||
sdp->isp_tag_aging);
|
||||
PRINTF(" Selection Timeout = %d\n",
|
||||
sdp->isp_selection_timeout);
|
||||
PRINTF(" Max Queue Depth = %d\n",
|
||||
sdp->isp_max_queue_depth);
|
||||
PRINTF(" Async Data Setup = 0x%x\n",
|
||||
sdp->isp_async_data_setup);
|
||||
PRINTF(" REQ/ACK Active Negation = %s\n",
|
||||
sdp->isp_req_ack_active_neg? tru : not);
|
||||
PRINTF(" Data Line Active Negation = %s\n",
|
||||
sdp->isp_data_line_active_neg? tru : not);
|
||||
PRINTF(" Cmd DMA Burst Enable = %s\n",
|
||||
sdp->isp_cmd_dma_burst_enable? tru : not);
|
||||
}
|
||||
|
||||
for (i = 0; i < MAX_TARGETS; i++) {
|
||||
sdp->isp_devparam[i].dev_enable =
|
||||
ISP12160_NVRAM_TGT_DEVICE_ENABLE(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].exc_throttle =
|
||||
ISP12160_NVRAM_TGT_EXEC_THROTTLE(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].sync_offset =
|
||||
ISP12160_NVRAM_TGT_SYNC_OFFSET(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].sync_period =
|
||||
ISP12160_NVRAM_TGT_SYNC_PERIOD(nvram_data, i, bus);
|
||||
sdp->isp_devparam[i].dev_flags = 0;
|
||||
if (ISP12160_NVRAM_TGT_RENEG(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_RENEG;
|
||||
if (ISP12160_NVRAM_TGT_QFRZ(nvram_data, i, bus)) {
|
||||
PRINTF("%s: not supporting QFRZ option "
|
||||
"for target %d bus %d\n", isp->isp_name, i, bus);
|
||||
}
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_ARQ;
|
||||
if (ISP12160_NVRAM_TGT_ARQ(nvram_data, i, bus) == 0) {
|
||||
PRINTF("%s: not disabling ARQ option "
|
||||
"for target %d bus %d\n", isp->isp_name, i, bus);
|
||||
}
|
||||
if (ISP12160_NVRAM_TGT_TQING(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_TQING;
|
||||
if (ISP12160_NVRAM_TGT_SYNC(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_SYNC;
|
||||
if (ISP12160_NVRAM_TGT_WIDE(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_WIDE;
|
||||
if (ISP12160_NVRAM_TGT_PARITY(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_PARITY;
|
||||
if (ISP12160_NVRAM_TGT_DISC(nvram_data, i, bus))
|
||||
sdp->isp_devparam[i].dev_flags |= DPARM_DISC;
|
||||
sdp->isp_devparam[i].cur_dflags = 0;
|
||||
if (isp->isp_dblev >= 3) {
|
||||
PRINTF(" Target %d: Ena %d Throttle %d Offset %d "
|
||||
"Period %d Flags 0x%x\n", i,
|
||||
sdp->isp_devparam[i].dev_enable,
|
||||
sdp->isp_devparam[i].exc_throttle,
|
||||
sdp->isp_devparam[i].sync_offset,
|
||||
sdp->isp_devparam[i].sync_period,
|
||||
sdp->isp_devparam[i].dev_flags);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
isp_parse_nvram_2100(isp, nvram_data)
|
||||
struct ispsoftc *isp;
|
||||
u_int8_t *nvram_data;
|
||||
{
|
||||
fcparam *fcp = (fcparam *) isp->isp_param;
|
||||
union {
|
||||
struct {
|
||||
@ -4354,6 +4646,7 @@ isp_read_nvram(isp)
|
||||
} wwnstore;
|
||||
|
||||
wwnstore.full64 = ISP2100_NVRAM_NODE_NAME(nvram_data);
|
||||
|
||||
/*
|
||||
* Broken PTI cards with nothing in the top nibble. Pah.
|
||||
*/
|
||||
@ -4417,75 +4710,4 @@ isp_read_nvram(isp)
|
||||
PRINTF(" HBA Options = 0x%x\n",
|
||||
ISP2100_NVRAM_HBA_OPTIONS(nvram_data));
|
||||
}
|
||||
}
|
||||
IDPRINTF(3, ("%s: NVRAM is valid\n", isp->isp_name));
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
isp_rdnvram_word(isp, wo, rp)
|
||||
struct ispsoftc *isp;
|
||||
int wo;
|
||||
u_int16_t *rp;
|
||||
{
|
||||
int i, cbits;
|
||||
u_int16_t bit, rqst;
|
||||
|
||||
ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT);
|
||||
SYS_DELAY(2);
|
||||
ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT|BIU_NVRAM_CLOCK);
|
||||
SYS_DELAY(2);
|
||||
|
||||
if (IS_FC(isp)) {
|
||||
wo &= ((ISP2100_NVRAM_SIZE >> 1) - 1);
|
||||
rqst = (ISP_NVRAM_READ << 8) | wo;
|
||||
cbits = 10;
|
||||
} else if (IS_ULTRA2(isp)) {
|
||||
wo &= ((ISP1080_NVRAM_SIZE >> 1) - 1);
|
||||
rqst = (ISP_NVRAM_READ << 8) | wo;
|
||||
cbits = 10;
|
||||
} else {
|
||||
wo &= ((ISP_NVRAM_SIZE >> 1) - 1);
|
||||
rqst = (ISP_NVRAM_READ << 6) | wo;
|
||||
cbits = 8;
|
||||
}
|
||||
|
||||
/*
|
||||
* Clock the word select request out...
|
||||
*/
|
||||
for (i = cbits; i >= 0; i--) {
|
||||
if ((rqst >> i) & 1) {
|
||||
bit = BIU_NVRAM_SELECT | BIU_NVRAM_DATAOUT;
|
||||
} else {
|
||||
bit = BIU_NVRAM_SELECT;
|
||||
}
|
||||
ISP_WRITE(isp, BIU_NVRAM, bit);
|
||||
SYS_DELAY(2);
|
||||
ISP_WRITE(isp, BIU_NVRAM, bit | BIU_NVRAM_CLOCK);
|
||||
SYS_DELAY(2);
|
||||
ISP_WRITE(isp, BIU_NVRAM, bit);
|
||||
SYS_DELAY(2);
|
||||
}
|
||||
/*
|
||||
* Now read the result back in (bits come back in MSB format).
|
||||
*/
|
||||
*rp = 0;
|
||||
for (i = 0; i < 16; i++) {
|
||||
u_int16_t rv;
|
||||
*rp <<= 1;
|
||||
ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT|BIU_NVRAM_CLOCK);
|
||||
SYS_DELAY(2);
|
||||
rv = ISP_READ(isp, BIU_NVRAM);
|
||||
if (rv & BIU_NVRAM_DATAIN) {
|
||||
*rp |= 1;
|
||||
}
|
||||
SYS_DELAY(2);
|
||||
ISP_WRITE(isp, BIU_NVRAM, BIU_NVRAM_SELECT);
|
||||
SYS_DELAY(2);
|
||||
}
|
||||
ISP_WRITE(isp, BIU_NVRAM, 0);
|
||||
SYS_DELAY(2);
|
||||
#if BYTE_ORDER == BIG_ENDIAN
|
||||
*rp = ((*rp >> 8) | ((*rp & 0xff) << 8));
|
||||
#endif
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user