Add code to support machines that don't use NEWINTR.

sys/arch/evbarm/include/intr.h

@@ -1,4 +1,4 @@
-/* 	$NetBSD: intr.h,v 1.2 2001/09/05 17:00:20 matt Exp $	*/
+/* 	$NetBSD: intr.h,v 1.3 2001/10/27 16:07:45 rearnsha Exp $	*/
 
 /*
  * Copyright (c) 1997 Mark Brinicombe.
@@ -36,6 +36,7 @@
 #ifndef _EVBARM_INTR_H_
 #define _EVBARM_INTR_H_
 
+#ifdef NEWINTR
 /* Define the various Interrupt Priority Levels */
 
 /* Interrupt Priority Levels are mutually exclusive. */
@@ -138,4 +139,43 @@ struct fiqhandler {
 
 #endif	/* _KERNEL */
 
+#else	/* NEWINTR */
+/* This should go away when we port the Integrator code to use NEWINTR */
+
+/* Define the various Interrupt Priority Levels */
+
+/* Hardware Interrupt Priority Levels are not mutually exclusive. */
+
+#define IPL_BIO		0	/* block I/O */
+#define IPL_NET		1	/* network */
+#define IPL_TTY		2	/* terminal */
+#define IPL_IMP		3	/* memory allocation */
+#define IPL_AUDIO	4	/* audio */
+#define IPL_CLOCK	5	/* clock */
+#define IPL_STATCLOCK	6	/* statclock */
+#define IPL_HIGH	7	/*  */
+#define IPL_SERIAL	8	/* serial */
+#define IPL_NONE	9
+
+#define IPL_LEVELS	9
+
+#define	IST_UNUSABLE	-1	/* interrupt cannot be used */
+#define	IST_NONE	0	/* none (dummy) */
+#define	IST_PULSE	1	/* pulsed */
+#define	IST_EDGE	2	/* edge-triggered */
+#define	IST_LEVEL	3	/* level-triggered */
+
+/* Software interrupt priority levels */
+
+#define SOFTIRQ_CLOCK	0
+#define SOFTIRQ_NET	1
+#define SOFTIRQ_SERIAL	2
+
+#define SOFTIRQ_BIT(x)	(1 << x)
+
+#include <machine/irqhandler.h>
+#include <machine/psl.h>
+
+#endif	/* NEWINTR */
+
 #endif	/* _EVBARM_INTR_H */