%x -> 0x%x

This commit is contained in:
fair 1997-07-29 09:41:53 +00:00
parent 240cc2913e
commit 53adf300b3
12 changed files with 104 additions and 102 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: autoconf.c,v 1.72 1997/05/24 20:17:04 pk Exp $ */
/* $NetBSD: autoconf.c,v 1.73 1997/07/29 09:41:53 fair Exp $ */
/*
* Copyright (c) 1996
@ -643,6 +643,8 @@ bootpath_fake(bp, cp)
/*
* print out the bootpath
* the %x isn't 0x%x because the Sun EPROMs do it this way, and
* consistency with the EPROMs is probably better here.
*/
static void
@ -1478,7 +1480,7 @@ getprop(node, name, buf, bufsiz)
no = promvec->pv_nodeops;
len = no->no_proplen(node, name);
if (len > bufsiz) {
printf("node %x property %s length %d > %d\n",
printf("node 0x%x property %s length %d > %d\n",
node, name, len, bufsiz);
#ifdef DEBUG
panic("getprop");

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@ -1,4 +1,4 @@
/* $NetBSD: cache.c,v 1.32 1997/07/20 18:48:35 pk Exp $ */
/* $NetBSD: cache.c,v 1.33 1997/07/29 09:41:56 fair Exp $ */
/*
* Copyright (c) 1996
@ -414,7 +414,7 @@ sun4_vcache_flush_page(va)
#ifdef DEBUG
if (va & PGOFSET)
panic("cache_flush_page: asked to flush misaligned va %x",va);
panic("cache_flush_page: asked to flush misaligned va 0x%x",va);
#endif
cachestats.cs_npgflush++;
@ -590,7 +590,7 @@ srmmu_vcache_flush_page(va)
#ifdef DEBUG
if (va & PGOFSET)
panic("cache_flush_page: asked to flush misaligned va %x",va);
panic("cache_flush_page: asked to flush misaligned va 0x%x",va);
#endif
cachestats.cs_npgflush++;

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@ -1,4 +1,4 @@
/* $NetBSD: cpu.c,v 1.51 1997/07/08 22:14:42 pk Exp $ */
/* $NetBSD: cpu.c,v 1.52 1997/07/29 09:41:58 fair Exp $ */
/*
* Copyright (c) 1996
@ -1192,6 +1192,6 @@ fsrtoname(impl, vers, fver, buf)
(p->iu_vers == vers || p->iu_vers == ANY) &&
(p->fpu_vers == fver))
return (p->name);
sprintf(buf, "version %x", fver);
sprintf(buf, "version 0x%x", fver);
return (buf);
}

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@ -1,4 +1,4 @@
/* $NetBSD: db_trace.c,v 1.8 1996/04/04 23:25:35 pk Exp $ */
/* $NetBSD: db_trace.c,v 1.9 1997/07/29 09:42:00 fair Exp $ */
/*
* Mach Operating System
@ -90,8 +90,8 @@ db_stack_trace_cmd(addr, have_addr, count, modif)
* actual arguments somewhat...
*/
for (i=0; i < 5; i++)
db_printf("%x, ", frame->fr_arg[i]);
db_printf("%x) at ", frame->fr_arg[i]);
db_printf("0x%x, ", frame->fr_arg[i]);
db_printf("0x%x) at ", frame->fr_arg[i]);
db_printsym(pc, DB_STGY_PROC);
db_printf("\n");

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@ -1,4 +1,4 @@
/* $NetBSD: emul.c,v 1.2 1997/03/15 00:39:51 christos Exp $ */
/* $NetBSD: emul.c,v 1.3 1997/07/29 09:42:01 fair Exp $ */
/*
* Copyright (c) 1997 Christos Zoulas. All rights reserved.
@ -167,7 +167,7 @@ muldiv(tf, code, rd, rs1, rs2)
op.num = code->i_op3.i_op3;
#ifdef DEBUG_EMUL
uprintf("muldiv %x: %c%s%s %c%d, %c%d, ", code->i_int,
uprintf("muldiv 0x%x: %c%s%s %c%d, %c%d, ", code->i_int,
"us"[op.bits.sgn], op.bits.div ? "div" : "mul",
op.bits.cc ? "cc" : "", REGNAME(code->i_op3.i_rd),
REGNAME(code->i_op3.i_rs1));
@ -296,7 +296,7 @@ fixalign(p, tf)
rs1 += rs2;
#ifdef DEBUG_EMUL
uprintf("memalign %x: %s%c%c %c%d, %c%d, ", code.i_int,
uprintf("memalign 0x%x: %s%c%c %c%d, %c%d, ", code.i_int,
op.bits.st ? "st" : "ld", "us"[op.bits.sgn],
"w*hd"[op.bits.sz], op.bits.fl ? 'f' : REGNAME(code.i_op3.i_rd),
REGNAME(code.i_op3.i_rs1));
@ -427,7 +427,7 @@ emulinstr(pc, tf)
default:
if ((code.i_op3.i_op3 & 0x2a) != 0xa) {
DPRINTF(("emulinstr: Unsupported op3 %x\n",
DPRINTF(("emulinstr: Unsupported op3 0x%x\n",
code.i_op3.i_op3));
return SIGILL;
}

View File

@ -1,4 +1,4 @@
/* $NetBSD: intr.c,v 1.19 1997/04/03 17:25:18 christos Exp $ */
/* $NetBSD: intr.c,v 1.20 1997/07/29 09:42:03 fair Exp $ */
/*
* Copyright (c) 1992, 1993
@ -96,7 +96,7 @@ strayintr(fp)
static int straytime, nstray;
int timesince;
printf("stray interrupt ipl %x pc=%x npc=%x psr=%b\n",
printf("stray interrupt ipl 0x%x pc=0x%x npc=0x%x psr=%b\n",
fp->ipl, fp->pc, fp->npc, fp->psr, PSR_BITS);
timesince = time.tv_sec - straytime;
if (timesince <= 10) {
@ -238,7 +238,7 @@ intr_establish(level, ih)
if (tv->tv_instr[0] != I_MOVi(I_L3, level) ||
tv->tv_instr[1] != I_BA(0, displ) ||
tv->tv_instr[2] != I_RDPSR(I_L0))
panic("intr_establish(%d, %p)\n%x %x %x != %x %x %x",
panic("intr_establish(%d, %p)\n0x%x 0x%x 0x%x != 0x%x 0x%x 0x%x",
level, ih,
tv->tv_instr[0], tv->tv_instr[1], tv->tv_instr[2],
I_MOVi(I_L3, level), I_BA(0, displ), I_RDPSR(I_L0));
@ -287,7 +287,7 @@ intr_fasttrap(level, vec)
if (tv->tv_instr[0] != I_MOVi(I_L3, level) ||
tv->tv_instr[1] != I_BA(0, displ) ||
tv->tv_instr[2] != I_RDPSR(I_L0))
panic("intr_fasttrap(%d, %p)\n%x %x %x != %x %x %x",
panic("intr_fasttrap(%d, %p)\n0x%x 0x%x 0x%x != 0x%x 0x%x 0x%x",
level, vec,
tv->tv_instr[0], tv->tv_instr[1], tv->tv_instr[2],
I_MOVi(I_L3, level), I_BA(0, displ), I_RDPSR(I_L0));

View File

@ -1,4 +1,4 @@
/* $NetBSD: iommu.c,v 1.12 1997/07/02 14:39:24 pk Exp $ */
/* $NetBSD: iommu.c,v 1.13 1997/07/29 09:42:04 fair Exp $ */
/*
* Copyright (c) 1996
@ -236,7 +236,7 @@ iommu_attach(parent, self, aux)
IOMMU_FLUSHALL(sc);
splx(s);
printf(": version %x/%x, page-size %d, range %dMB\n",
printf(": version 0x%x/0x%x, page-size %d, range %dMB\n",
(sc->sc_reg->io_cr & IOMMU_CTL_VER) >> 24,
(sc->sc_reg->io_cr & IOMMU_CTL_IMPL) >> 28,
sc->sc_pagesize,
@ -316,8 +316,8 @@ iommu_error()
struct iommu_softc *sc = X;
struct iommureg *iop = sc->sc_reg;
printf("iommu: afsr %x, afar %x\n", iop->io_afsr, iop->io_afar);
printf("iommu: mfsr %x, mfar %x\n", iop->io_mfsr, iop->io_mfar);
printf("iommu: afsr 0x%x, afar 0x%x\n", iop->io_afsr, iop->io_afar);
printf("iommu: mfsr 0x%x, mfar 0x%x\n", iop->io_mfsr, iop->io_mfar);
}
int
iommu_alloc(va, len)

View File

@ -1,4 +1,4 @@
/* $NetBSD: machdep.c,v 1.81 1997/06/12 15:46:46 mrg Exp $ */
/* $NetBSD: machdep.c,v 1.82 1997/07/29 09:42:06 fair Exp $ */
/*
* Copyright (c) 1992, 1993
@ -776,7 +776,7 @@ dumpsys()
cpu_dumpconf();
if (dumplo <= 0)
return;
printf("\ndumping to dev %x, offset %ld\n", dumpdev, dumplo);
printf("\ndumping to dev 0x%x, offset %ld\n", dumpdev, dumplo);
psize = (*bdevsw[major(dumpdev)].d_psize)(dumpdev);
printf("dump ");
@ -863,7 +863,7 @@ stackdump()
printf("Frame pointer is at %p\n", fp);
printf("Call traceback:\n");
while (fp && ((u_long)fp >> PGSHIFT) == ((u_long)sfp >> PGSHIFT)) {
printf(" pc = %x args = (%x, %x, %x, %x, %x, %x, %x) fp = %p\n",
printf(" pc = 0x%x args = (0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x) fp = %p\n",
fp->fr_pc, fp->fr_arg[0], fp->fr_arg[1], fp->fr_arg[2],
fp->fr_arg[3], fp->fr_arg[4], fp->fr_arg[5], fp->fr_arg[6],
fp->fr_fp);
@ -959,7 +959,7 @@ oldmon_w_trace(va)
printf("stop at %lx\n", stop);
fp = (struct frame *) va;
while (round_up((u_long) fp) == stop) {
printf(" %x(%x, %x, %x, %x, %x, %x, %x) fp %p\n", fp->fr_pc,
printf(" 0x%x(0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x) fp %p\n", fp->fr_pc,
fp->fr_arg[0], fp->fr_arg[1], fp->fr_arg[2], fp->fr_arg[3],
fp->fr_arg[4], fp->fr_arg[5], fp->fr_arg[6], fp->fr_fp);
fp = fp->fr_fp;

View File

@ -1,4 +1,4 @@
/* $NetBSD: memreg.c,v 1.20 1997/05/24 20:16:03 pk Exp $ */
/* $NetBSD: memreg.c,v 1.21 1997/07/29 09:42:08 fair Exp $ */
/*
* Copyright (c) 1992, 1993
@ -138,7 +138,7 @@ memerr(issync, ser, sva, aer, ava)
#if defined(SUN4)
case CPU_SUN4:
if (par_err_reg) {
printf("mem err: ser=%s sva=%x\n",
printf("mem err: ser=%s sva=0x%x\n",
bitmask_snprintf(ser, SER_BITS, bits,
sizeof(bits)), sva);
printf("parity error register = %s\n",
@ -158,10 +158,10 @@ memerr(issync, ser, sva, aer, ava)
#if defined(SUN4C)
case CPU_SUN4C:
printf("%ssync mem arr: ser=%s sva=%x ",
printf("%ssync mem arr: ser=%s sva=0x%x ",
issync ? "" : "a", bitmask_snprintf(ser, SER_BITS,
bits, sizeof(bits)), sva);
printf("aer=%s ava=%x\n", bitmask_snprintf(aer & 0xff,
printf("aer=%s ava=0x%x\n", bitmask_snprintf(aer & 0xff,
AER_BITS, bits, sizeof(bits)), ava);
if (par_err_reg)
printf("parity error register = %s\n",
@ -207,21 +207,21 @@ hardmemerr4m(issync, fsr, faddr)
case 1:
if ((fsr & SFSR_FT) == SFSR_FT_NONE)
return;
printf("mem err: sfsr=%s sfaddr=%x\n", bitmask_snprintf(fsr,
printf("mem err: sfsr=%s sfaddr=0x%x\n", bitmask_snprintf(fsr,
SFSR_BITS, bits, sizeof(bits)), faddr);
break;
case 0:
if (!(fsr & AFSR_AFO))
return;
printf("async (HS) mem err: afsr=%s afaddr=%x physaddr=%x%x\n",
printf("async (HS) mem err: afsr=%s afaddr=0x%x physaddr=0x%x%x\n",
bitmask_snprintf(fsr, AFSR_BITS, bits, sizeof(bits)),
faddr, (fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
break;
default: /* unknown; print both decodings*/
printf("unknown mem err: if sync, fsr=%s fva=%x; ",
printf("unknown mem err: if sync, fsr=%s fva=0x%x; ",
bitmask_snprintf(fsr, SFSR_BITS, bits, sizeof(bits)),
faddr);
printf("if async, fsr=%s fa=%x pa=%x%x", bitmask_snprintf(fsr,
printf("if async, fsr=%s fa=0x%x pa=0x%x%x", bitmask_snprintf(fsr,
AFSR_BITS, bits, sizeof(bits)), faddr,
(fsr & AFSR_AFA) >> AFSR_AFA_RSHIFT, faddr);
break;
@ -310,10 +310,10 @@ memerr4m(type, sfsr, sfva, afsr, afva, tf)
oldtype = 0;
addrold = sfva;
} else /* something we don't know about?!? */ {
printf("unknown fatal memory error, type=%d, sfsr=%s, sfva=%x",
printf("unknown fatal memory error, type=%d, sfsr=%s, sfva=0x%x",
type, bitmask_snprintf(sfsr, SFSR_BITS, bits, sizeof(bits)),
sfva);
printf(", afsr=%s, afaddr=%x\n", bitmask_snprintf(afsr,
printf(", afsr=%s, afaddr=0x%x\n", bitmask_snprintf(afsr,
AFSR_BITS, bits, sizeof(bits)), afva);
panic("memerr4m");
}

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@ -1,4 +1,4 @@
/* $NetBSD: pmap.c,v 1.90 1997/07/16 15:35:23 pk Exp $ */
/* $NetBSD: pmap.c,v 1.91 1997/07/29 09:42:11 fair Exp $ */
/*
* Copyright (c) 1996
@ -1297,7 +1297,7 @@ me_alloc(mh, newpm, newvreg, newvseg)
panic("me_alloc: stealing from kernel");
#ifdef DEBUG
if (pmapdebug & (PDB_MMU_ALLOC | PDB_MMU_STEAL))
printf("me_alloc: stealing pmeg %x from pmap %p\n",
printf("me_alloc: stealing pmeg 0x%x from pmap %p\n",
me->me_cookie, pm);
#endif
/*
@ -1497,7 +1497,7 @@ region_alloc(mh, newpm, newvr)
if (me->me_pmap != NULL)
panic("region_alloc: freelist entry has pmap");
if (pmapdebug & PDB_MMUREG_ALLOC)
printf("region_alloc: got smeg %x\n", me->me_cookie);
printf("region_alloc: got smeg 0x%x\n", me->me_cookie);
#endif
TAILQ_INSERT_TAIL(mh, me, me_list);
@ -1523,7 +1523,7 @@ region_alloc(mh, newpm, newvr)
panic("region_alloc: stealing from kernel");
#ifdef DEBUG
if (pmapdebug & (PDB_MMUREG_ALLOC | PDB_MMUREG_STEAL))
printf("region_alloc: stealing smeg %x from pmap %p\n",
printf("region_alloc: stealing smeg 0x%x from pmap %p\n",
me->me_cookie, pm);
#endif
/*
@ -1580,7 +1580,7 @@ region_free(pm, smeg)
#ifdef DEBUG
if (pmapdebug & PDB_MMUREG_ALLOC)
printf("region_free: freeing smeg %x from pmap %p\n",
printf("region_free: freeing smeg 0x%x from pmap %p\n",
me->me_cookie, pm);
if (me->me_cookie != smeg)
panic("region_free: wrong mmuentry");
@ -1636,7 +1636,7 @@ mmu_pagein(pm, va, prot)
rp = &pm->pm_regmap[vr];
#ifdef DEBUG
if (pm == pmap_kernel())
printf("mmu_pagein: kernel wants map at va %x, vr %d, vs %d\n", va, vr, vs);
printf("mmu_pagein: kernel wants map at va 0x%x, vr %d, vs %d\n", va, vr, vs);
#endif
/* return 0 if we have no PMEGs to load */
@ -2178,7 +2178,7 @@ pv_link4_4c(pv, pm, va)
#ifdef DEBUG
if (pmapdebug & PDB_CACHESTUFF)
printf(
"pv_link: badalias: pid %d, %lx<=>%lx, pa %lx\n",
"pv_link: badalias: pid %d, 0x%lx<=>0x%lx, pa 0x%lx\n",
curproc ? curproc->p_pid : -1,
va, npv->pv_va,
vm_first_phys + (pv-pv_table)*NBPG);
@ -2457,7 +2457,7 @@ pv_link4m(pv, pm, va)
#ifdef DEBUG
if (pmapdebug & PDB_CACHESTUFF)
printf(
"pv_link: badalias: pid %d, %lx<=>%lx, pa %lx\n",
"pv_link: badalias: pid %d, 0x%lx<=>0x%lx, pa 0x%lx\n",
curproc ? curproc->p_pid : -1,
va, npv->pv_va,
vm_first_phys + (pv-pv_table)*NBPG);
@ -3411,7 +3411,7 @@ pass2:
/* This chunk overlaps the previous in pv_table[] */
sva += PAGE_SIZE;
if (sva < eva)
panic("pmap_init: sva(%lx) < eva(%lx)",
panic("pmap_init: sva(0x%lx) < eva(0x%lx)",
sva, eva);
}
eva = round_page(va + len);
@ -3694,7 +3694,7 @@ pmap_remove(pm, va, endva)
#ifdef DEBUG
if (pmapdebug & PDB_REMOVE)
printf("pmap_remove(%p, %lx, %lx)\n", pm, va, endva);
printf("pmap_remove(%p, 0x%lx, 0x%lx)\n", pm, va, endva);
#endif
if (pm == pmap_kernel()) {
@ -3906,7 +3906,7 @@ pmap_rmk4m(pm, va, endva, vr, vs)
#ifdef DEBUG
if ((pmapdebug & PDB_SANITYCHK) &&
(getpte4m(va) & SRMMU_TETYPE) == SRMMU_TEPTE)
panic("pmap_rmk: Spurious kTLB entry for %lx",
panic("pmap_rmk: Spurious kTLB entry for 0x%lx",
va);
#endif
va += NBPG;
@ -4182,7 +4182,7 @@ pmap_rmu4m(pm, va, endva, vr, vs)
if ((pmapdebug & PDB_SANITYCHK) &&
pm->pm_ctx &&
(getpte4m(va) & SRMMU_TEPTE) == SRMMU_TEPTE)
panic("pmap_rmu: Spurious uTLB entry for %lx",
panic("pmap_rmu: Spurious uTLB entry for 0x%lx",
va);
#endif
continue;
@ -4259,10 +4259,10 @@ pmap_page_protect4_4c(pa, prot)
#ifdef DEBUG
if (!pmap_pa_exists(pa))
panic("pmap_page_protect: no such address: %lx", pa);
panic("pmap_page_protect: no such address: 0x%lx", pa);
if ((pmapdebug & PDB_CHANGEPROT) ||
(pmapdebug & PDB_REMOVE && prot == VM_PROT_NONE))
printf("pmap_page_protect(%lx, %x)\n", pa, prot);
printf("pmap_page_protect(0x%lx, 0x%x)\n", pa, prot);
#endif
/*
* Skip unmanaged pages, or operations that do not take
@ -4346,7 +4346,7 @@ pmap_page_protect4_4c(pa, prot)
tpte = getpte4(pteva);
if ((tpte & PG_V) == 0)
panic("pmap_page_protect !PG_V: ctx %d, va %x, pte %x",
panic("pmap_page_protect !PG_V: ctx %d, va 0x%x, pte 0x%x",
pm->pm_ctxnum, va, tpte);
flags |= MR4_4C(tpte);
@ -4549,7 +4549,7 @@ pmap_changeprot4_4c(pm, va, prot, wired)
#ifdef DEBUG
if (pmapdebug & PDB_CHANGEPROT)
printf("pmap_changeprot(%p, %lx, %x, %x)\n",
printf("pmap_changeprot(%p, 0x%lx, 0x%x, 0x%x)\n",
pm, va, prot, wired);
#endif
@ -4660,7 +4660,7 @@ pmap_page_protect4m(pa, prot)
panic("pmap_page_protect: no such address: 0x%lx", pa);
if ((pmapdebug & PDB_CHANGEPROT) ||
(pmapdebug & PDB_REMOVE && prot == VM_PROT_NONE))
printf("pmap_page_protect(%lx, %x)\n", pa, prot);
printf("pmap_page_protect(0x%lx, 0x%x)\n", pa, prot);
#endif
/*
* Skip unmanaged pages, or operations that do not take
@ -4876,7 +4876,7 @@ pmap_changeprot4m(pm, va, prot, wired)
#ifdef DEBUG
if (pmapdebug & PDB_CHANGEPROT)
printf("pmap_changeprot(%p, %lx, %x, %x)\n",
printf("pmap_changeprot(%p, 0x%lx, 0x%x, 0x%x)\n",
pm, va, prot, wired);
#endif
@ -4952,7 +4952,7 @@ pmap_enter4_4c(pm, va, pa, prot, wired)
if (VA_INHOLE(va)) {
#ifdef DEBUG
printf("pmap_enter: pm %p, va %lx, pa %lx: in MMU hole\n",
printf("pmap_enter: pm %p, va 0x%lx, pa 0x%lx: in MMU hole\n",
pm, va, pa);
#endif
return;
@ -4960,7 +4960,7 @@ pmap_enter4_4c(pm, va, pa, prot, wired)
#ifdef DEBUG
if (pmapdebug & PDB_ENTER)
printf("pmap_enter(%p, %lx, %lx, %x, %x)\n",
printf("pmap_enter(%p, 0x%lx, 0x%lx, 0x%x, 0x%x)\n",
pm, va, pa, prot, wired);
#endif
@ -4974,7 +4974,7 @@ pmap_enter4_4c(pm, va, pa, prot, wired)
if ((pteproto & PG_TYPE) == PG_OBMEM && managed(pa)) {
#ifdef DIAGNOSTIC
if (!pmap_pa_exists(pa))
panic("pmap_enter: no such address: %lx", pa);
panic("pmap_enter: no such address: 0x%lx", pa);
#endif
pv = pvhead(pa);
} else {
@ -5044,7 +5044,7 @@ pmap_enk4_4c(pm, va, prot, wired, pv, pteproto)
if ((tpte & PG_TYPE) == PG_OBMEM) {
#ifdef DEBUG
printf("pmap_enk: changing existing va=>pa entry: va %lx, pteproto %x\n",
printf("pmap_enk: changing existing va=>pa entry: va 0x%lx, pteproto 0x%x\n",
va, pteproto);
#endif
/*
@ -5149,7 +5149,7 @@ pmap_enu4_4c(pm, va, prot, wired, pv, pteproto)
#ifdef DEBUG
if (pm->pm_gap_end < pm->pm_gap_start) {
printf("pmap_enu: gap_start %x, gap_end %x",
printf("pmap_enu: gap_start 0x%x, gap_end 0x%x",
pm->pm_gap_start, pm->pm_gap_end);
panic("pmap_enu: gap botch");
}
@ -5238,7 +5238,7 @@ printf("pmap_enter: pte filled during sleep\n"); /* can this happen? */
* If old page was cached, flush cache.
*/
#if 0
printf("%s[%d]: pmap_enu: changing existing va(%x)=>pa entry\n",
printf("%s[%d]: pmap_enu: changing existing va(0x%x)=>pa entry\n",
curproc->p_comm, curproc->p_pid, va);
#endif
if ((tpte & PG_TYPE) == PG_OBMEM) {
@ -5318,7 +5318,7 @@ pmap_enter4m(pm, va, pa, prot, wired)
#ifdef DEBUG
if (pmapdebug & PDB_ENTER)
printf("pmap_enter(%p, %lx, %lx, %x, %x)\n",
printf("pmap_enter(%p, 0x%lx, 0x%lx, 0x%x, 0x%x)\n",
pm, va, pa, prot, wired);
#endif
@ -5346,7 +5346,7 @@ pmap_enter4m(pm, va, pa, prot, wired)
if ((pteproto & SRMMU_PGTYPE) == PG_SUN4M_OBMEM && managed(pa)) {
#ifdef DIAGNOSTIC
if (!pmap_pa_exists(pa))
panic("pmap_enter: no such address: %lx", pa);
panic("pmap_enter: no such address: 0x%lx", pa);
#endif
pv = pvhead(pa);
} else {
@ -5393,7 +5393,7 @@ pmap_enk4m(pm, va, prot, wired, pv, pteproto)
s = splpmap(); /* XXX way too conservative */
if (rp->rg_seg_ptps == NULL) /* enter new region */
panic("pmap_enk4m: missing kernel region table for va %lx",va);
panic("pmap_enk4m: missing kernel region table for va 0x%lx",va);
tpte = sp->sg_pte[VA_SUN4M_VPG(va)];
if ((tpte & SRMMU_TETYPE) == SRMMU_TEPTE) {
@ -5410,8 +5410,8 @@ pmap_enk4m(pm, va, prot, wired, pv, pteproto)
if ((tpte & SRMMU_PGTYPE) == PG_SUN4M_OBMEM) {
#ifdef DEBUG
printf("pmap_enk4m: changing existing va=>pa entry: va %lx, pteproto %x, "
"oldpte %x\n", va, pteproto, tpte);
printf("pmap_enk4m: changing existing va=>pa entry: va 0x%lx, pteproto 0x%x, "
"oldpte 0x%x\n", va, pteproto, tpte);
#endif
/*
* Switcheroo: changing pa for this va.
@ -5575,7 +5575,7 @@ printf("pmap_enter: pte filled during sleep\n"); /* can this happen? */
*/
#ifdef DEBUG
if (pmapdebug & PDB_SWITCHMAP)
printf("%s[%d]: pmap_enu: changing existing va(%x)=>pa(pte=%x) entry\n",
printf("%s[%d]: pmap_enu: changing existing va(0x%x)=>pa(pte=0x%x) entry\n",
curproc->p_comm, curproc->p_pid, (int)va, (int)pte);
#endif
if ((tpte & SRMMU_PGTYPE) == PG_SUN4M_OBMEM) {
@ -6333,7 +6333,7 @@ pm_check_u(s, pm)
(cpuinfo.ctx_tbl[pm->pm_ctxnum] != ((VA2PA((caddr_t)pm->pm_reg_ptps)
>> SRMMU_PPNPASHIFT) |
SRMMU_TEPTD)))
panic("%s: CHK(pmap %p): SRMMU region table at %x not installed "
panic("%s: CHK(pmap %p): SRMMU region table at 0x%x not installed "
"for context %d", s, pm, pm->pm_reg_ptps_pa, pm->pm_ctxnum);
#endif
@ -6412,13 +6412,13 @@ pm_check_k(s, pm) /* Note: not as extensive as pm_check_u. */
if (CPU_ISSUN4M &&
(pm->pm_reg_ptps == NULL ||
pm->pm_reg_ptps_pa != VA2PA((caddr_t)pm->pm_reg_ptps)))
panic("%s: CHK(pmap %p): no SRMMU region table or bad pa: tblva=%p, tblpa=%x",
panic("%s: CHK(pmap %p): no SRMMU region table or bad pa: tblva=%p, tblpa=0x%x",
s, pm, pm->pm_reg_ptps, pm->pm_reg_ptps_pa);
if (CPU_ISSUN4M &&
(cpuinfo.ctx_tbl[0] != ((VA2PA((caddr_t)pm->pm_reg_ptps) >>
SRMMU_PPNPASHIFT) | SRMMU_TEPTD)))
panic("%s: CHK(pmap %p): SRMMU region table at %x not installed "
panic("%s: CHK(pmap %p): SRMMU region table at 0x%x not installed "
"for context %d", s, pm, pm->pm_reg_ptps_pa, 0);
#endif
for (vr = NUREG; vr < NUREG+NKREG; vr++) {
@ -6751,7 +6751,7 @@ void print_fe_map(void)
for (i = 0xfe000000; i < 0xff000000; i+=4096) {
if (((pte = getpte4m(i)) & SRMMU_TETYPE) != SRMMU_TEPTE)
continue;
printf("0x%x -> 0x%x%x (pte %x)\n", i, pte >> 28,
printf("0x%x -> 0x%x%x (pte 0x%x)\n", i, pte >> 28,
(pte & ~0xff) << 4, pte);
}
printf("done\n");

View File

@ -1,4 +1,4 @@
/* $NetBSD: svr4_machdep.c,v 1.22 1997/07/06 19:32:39 christos Exp $ */
/* $NetBSD: svr4_machdep.c,v 1.23 1997/07/29 09:42:13 fair Exp $ */
/*
* Copyright (c) 1994 Christos Zoulas
@ -78,28 +78,28 @@ svr4_printcontext(fun, uc)
printf("%s at %p\n", fun, uc);
printf("Regs: ");
printf("PSR = %x ", r[SVR4_SPARC_PSR]);
printf("PC = %x ", r[SVR4_SPARC_PC]);
printf("nPC = %x ", r[SVR4_SPARC_nPC]);
printf("Y = %x ", r[SVR4_SPARC_Y]);
printf("G1 = %x ", r[SVR4_SPARC_G1]);
printf("G2 = %x ", r[SVR4_SPARC_G2]);
printf("G3 = %x ", r[SVR4_SPARC_G3]);
printf("G4 = %x ", r[SVR4_SPARC_G4]);
printf("G5 = %x ", r[SVR4_SPARC_G5]);
printf("G6 = %x ", r[SVR4_SPARC_G6]);
printf("G7 = %x ", r[SVR4_SPARC_G7]);
printf("O0 = %x ", r[SVR4_SPARC_O0]);
printf("O1 = %x ", r[SVR4_SPARC_O1]);
printf("O2 = %x ", r[SVR4_SPARC_O2]);
printf("O3 = %x ", r[SVR4_SPARC_O3]);
printf("O4 = %x ", r[SVR4_SPARC_O4]);
printf("O5 = %x ", r[SVR4_SPARC_O5]);
printf("O6 = %x ", r[SVR4_SPARC_O6]);
printf("O7 = %x ", r[SVR4_SPARC_O7]);
printf("PSR = 0x%x ", r[SVR4_SPARC_PSR]);
printf("PC = 0x%x ", r[SVR4_SPARC_PC]);
printf("nPC = 0x%x ", r[SVR4_SPARC_nPC]);
printf("Y = 0x%x ", r[SVR4_SPARC_Y]);
printf("G1 = 0x%x ", r[SVR4_SPARC_G1]);
printf("G2 = 0x%x ", r[SVR4_SPARC_G2]);
printf("G3 = 0x%x ", r[SVR4_SPARC_G3]);
printf("G4 = 0x%x ", r[SVR4_SPARC_G4]);
printf("G5 = 0x%x ", r[SVR4_SPARC_G5]);
printf("G6 = 0x%x ", r[SVR4_SPARC_G6]);
printf("G7 = 0x%x ", r[SVR4_SPARC_G7]);
printf("O0 = 0x%x ", r[SVR4_SPARC_O0]);
printf("O1 = 0x%x ", r[SVR4_SPARC_O1]);
printf("O2 = 0x%x ", r[SVR4_SPARC_O2]);
printf("O3 = 0x%x ", r[SVR4_SPARC_O3]);
printf("O4 = 0x%x ", r[SVR4_SPARC_O4]);
printf("O5 = 0x%x ", r[SVR4_SPARC_O5]);
printf("O6 = 0x%x ", r[SVR4_SPARC_O6]);
printf("O7 = 0x%x ", r[SVR4_SPARC_O7]);
printf("\n");
printf("Signal Stack: sp %p, size %d, flags %x\n",
printf("Signal Stack: sp %p, size %d, flags 0x%x\n",
s->ss_sp, s->ss_size, s->ss_flags);
printf("Flags: %lx\n", uc->uc_flags);

View File

@ -1,4 +1,4 @@
/* $NetBSD: trap.c,v 1.56 1997/07/06 21:34:45 pk Exp $ */
/* $NetBSD: trap.c,v 1.57 1997/07/29 09:42:15 fair Exp $ */
/*
* Copyright (c) 1996
@ -312,7 +312,7 @@ trap(type, psr, pc, tf)
return;
}
dopanic:
printf("trap type 0x%x: pc=%x npc=%x psr=%s\n",
printf("trap type 0x%x: pc=0x%x npc=0x%x psr=%s\n",
type, pc, tf->tf_npc, bitmask_snprintf(psr,
PSR_BITS, bits, sizeof(bits)));
panic(type < N_TRAP_TYPES ? trap_type[type] : T);
@ -330,7 +330,7 @@ trap(type, psr, pc, tf)
if (type < 0x80) {
if (!ignore_bogus_traps)
goto dopanic;
printf("trap type 0x%x: pc=%x npc=%x psr=%s\n",
printf("trap type 0x%x: pc=0x%x npc=0x%x psr=%s\n",
type, pc, tf->tf_npc, bitmask_snprintf(psr,
PSR_BITS, bits, sizeof(bits)));
trapsignal(p, SIGILL, type);
@ -434,7 +434,7 @@ badtrap:
panic("trap T_RWRET 1");
#ifdef DEBUG
if (rwindow_debug)
printf("%s[%d]: rwindow: pcb<-stack: %x\n",
printf("%s[%d]: rwindow: pcb<-stack: 0x%x\n",
p->p_comm, p->p_pid, tf->tf_out[6]);
#endif
if (read_rw(tf->tf_out[6], &pcb->pcb_rw[0]))
@ -456,7 +456,7 @@ badtrap:
*/
#ifdef DEBUG
if (rwindow_debug)
printf("%s[%d]: rwindow: T_WINUF 0: pcb<-stack: %x\n",
printf("%s[%d]: rwindow: T_WINUF 0: pcb<-stack: 0x%x\n",
p->p_comm, p->p_pid, tf->tf_out[6]);
#endif
write_user_windows();
@ -464,7 +464,7 @@ badtrap:
sigexit(p, SIGILL);
#ifdef DEBUG
if (rwindow_debug)
printf("%s[%d]: rwindow: T_WINUF 1: pcb<-stack: %x\n",
printf("%s[%d]: rwindow: T_WINUF 1: pcb<-stack: 0x%x\n",
p->p_comm, p->p_pid, pcb->pcb_rw[0].rw_in[6]);
#endif
if (read_rw(pcb->pcb_rw[0].rw_in[6], &pcb->pcb_rw[1]))
@ -594,7 +594,7 @@ rwindow_save(p)
do {
#ifdef DEBUG
if (rwindow_debug)
printf(" %x", rw[1].rw_in[6]);
printf(" 0x%x", rw[1].rw_in[6]);
#endif
if (copyout((caddr_t)rw, (caddr_t)rw[1].rw_in[6],
sizeof *rw))
@ -676,7 +676,7 @@ mem_access_fault(type, ser, v, pc, psr, tf)
extern char Lfsbail[];
if (type == T_TEXTFAULT) {
(void) splhigh();
printf("text fault: pc=%x ser=%s\n", pc,
printf("text fault: pc=0x%x ser=%s\n", pc,
bitmask_snprintf(ser, SER_BITS, bits, sizeof(bits)));
panic("kernel fault");
/* NOTREACHED */
@ -755,7 +755,7 @@ kfault:
(int)p->p_addr->u_pcb.pcb_onfault : 0;
if (!onfault) {
(void) splhigh();
printf("data fault: pc=%x addr=%x ser=%s\n",
printf("data fault: pc=0x%x addr=0x%x ser=%s\n",
pc, v, bitmask_snprintf(ser, SER_BITS,
bits, sizeof(bits)));
panic("kernel fault");
@ -914,7 +914,7 @@ mem_access_fault4m(type, sfsr, sfva, afsr, afva, tf)
extern char Lfsbail[];
if (sfsr & SFSR_AT_TEXT || type == T_TEXTFAULT) {
(void) splhigh();
printf("text fault: pc=%x sfsr=%s sfva=%x\n", pc,
printf("text fault: pc=0x%x sfsr=%s sfva=0x%x\n", pc,
bitmask_snprintf(sfsr, SFSR_BITS, bits,
sizeof(bits)), sfva);
panic("kernel fault");
@ -975,7 +975,7 @@ kfault:
(int)p->p_addr->u_pcb.pcb_onfault : 0;
if (!onfault) {
(void) splhigh();
printf("data fault: pc=%x addr=%x sfsr=%s\n",
printf("data fault: pc=0x%x addr=0x%x sfsr=%s\n",
pc, sfva, bitmask_snprintf(sfsr, SFSR_BITS,
bits, sizeof(bits)));
panic("kernel fault");