- When starting an ATA or ATAPI transfer, handle the case where (*dma_init)()
returns EINVAL, indicating that DMA cannot be done for this transfer. Fall back to PIO in this case. - Add a geodeide_dma_init() routine that checks to make sure that transfers start on a 16 byte boundary, returning EINVAL if not. Works around a chip bug that causes a hard system hang. Problem reported and patch tested by Erik Fair.
This commit is contained in:
thorpej
parent
053b017df8
commit
527d62e0a2
@ -1,4 +1,4 @@
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/* $NetBSD: ata_wdc.c,v 1.81 2005/06/07 13:45:11 peter Exp $ */
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/* $NetBSD: ata_wdc.c,v 1.82 2005/07/06 01:46:52 thorpej Exp $ */
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/*
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* Copyright (c) 1998, 2001, 2003 Manuel Bouyer.
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@ -66,7 +66,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.81 2005/06/07 13:45:11 peter Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ata_wdc.c,v 1.82 2005/07/06 01:46:52 thorpej Exp $");
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#ifndef ATADEBUG
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#define ATADEBUG
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@ -323,7 +323,7 @@ _wdc_ata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
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int wait_flags = (xfer->c_flags & C_POLL) ? AT_POLL : 0;
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u_int16_t cyl;
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u_int8_t head, sect, cmd = 0;
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int nblks;
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int nblks, error;
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int dma_flags = 0;
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ATADEBUG_PRINT(("_wdc_ata_bio_start %s:%d:%d\n",
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@ -397,10 +397,21 @@ again:
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cmd = (ata_bio->flags & ATA_READ) ?
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WDCC_READDMA : WDCC_WRITEDMA;
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/* Init the DMA channel. */
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if ((*wdc->dma_init)(wdc->dma_arg,
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error = (*wdc->dma_init)(wdc->dma_arg,
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chp->ch_channel, xfer->c_drive,
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(char *)xfer->c_databuf + xfer->c_skip,
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ata_bio->nbytes, dma_flags) != 0) {
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ata_bio->nbytes, dma_flags);
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if (error) {
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if (error == EINVAL) {
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/*
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* We can't do DMA on this transfer
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* for some reason. Fall back to
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* PIO.
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*/
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xfer->c_flags &= ~C_DMA;
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error = 0;
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goto do_pio;
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}
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ata_bio->error = ERR_DMA;
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ata_bio->r_error = 0;
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wdc_ata_bio_done(chp, xfer);
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@ -437,6 +448,7 @@ again:
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/* wait for irq */
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goto intr;
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} /* else not DMA */
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do_pio:
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ata_bio->nblks = min(nblks, ata_bio->multi);
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ata_bio->nbytes = ata_bio->nblks * ata_bio->lp->d_secsize;
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KASSERT(nblks == 1 || (ata_bio->flags & ATA_SINGLE) == 0);
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@ -1,4 +1,4 @@
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/* $NetBSD: geodeide.c,v 1.9 2005/06/25 05:04:01 fair Exp $ */
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/* $NetBSD: geodeide.c,v 1.10 2005/07/06 01:46:52 thorpej Exp $ */
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/*
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* Copyright (c) 2004 Manuel Bouyer.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.9 2005/06/25 05:04:01 fair Exp $");
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__KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.10 2005/07/06 01:46:52 thorpej Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -54,6 +54,7 @@ __KERNEL_RCSID(0, "$NetBSD: geodeide.c,v 1.9 2005/06/25 05:04:01 fair Exp $");
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static void geodeide_chip_map(struct pciide_softc *,
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struct pci_attach_args *);
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static void geodeide_setup_channel(struct ata_channel *);
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static int geodeide_dma_init(void *, int, int, void *, size_t, int);
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static int geodeide_match(struct device *, struct cfdata *, void *);
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static void geodeide_attach(struct device *, struct device *, void *);
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@ -120,6 +121,11 @@ geodeide_chip_map(struct pciide_softc *sc, struct pci_attach_args *pa)
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if (sc->sc_dma_ok) {
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sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA;
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sc->sc_wdcdev.irqack = pciide_irqack;
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/*
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* XXXJRT What chip revisions actually need the DMA
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* alignment work-around?
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*/
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sc->sc_wdcdev.dma_init = geodeide_dma_init;
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}
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sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
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sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
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@ -260,3 +266,18 @@ geodeide_setup_channel(struct ata_channel *chp)
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idedma_ctl);
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}
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}
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static int
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geodeide_dma_init(void *v, int channel, int drive, void *databuf,
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size_t datalen, int flags)
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{
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/*
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* If the buffer is not properly aligned, we can't allow DMA
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* and need to fall back to PIO.
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*/
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if (((uintptr_t)databuf) & 0xf)
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return (EINVAL);
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return (pciide_dma_init(v, channel, drive, databuf, datalen, flags));
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: atapi_wdc.c,v 1.94 2005/06/07 13:45:11 peter Exp $ */
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/* $NetBSD: atapi_wdc.c,v 1.95 2005/07/06 01:46:52 thorpej Exp $ */
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/*
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* Copyright (c) 1998, 2001 Manuel Bouyer.
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@ -30,7 +30,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.94 2005/06/07 13:45:11 peter Exp $");
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__KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.95 2005/07/06 01:46:52 thorpej Exp $");
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#ifndef ATADEBUG
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#define ATADEBUG
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@ -611,7 +611,7 @@ wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq)
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struct scsipi_xfer *sc_xfer = xfer->c_cmd;
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struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive];
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int len, phase, i, retries=0;
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int ire;
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int ire, error;
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int dma_flags = 0;
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void *cmd;
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@ -692,11 +692,22 @@ again:
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ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR);
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/* Init the DMA channel if necessary */
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if (xfer->c_flags & C_DMA) {
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if ((*wdc->dma_init)(wdc->dma_arg,
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error = (*wdc->dma_init)(wdc->dma_arg,
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chp->ch_channel, xfer->c_drive,
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xfer->c_databuf, xfer->c_bcount, dma_flags) != 0) {
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sc_xfer->error = XS_DRIVER_STUFFUP;
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break;
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xfer->c_databuf, xfer->c_bcount, dma_flags);
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if (error) {
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if (error == EINVAL) {
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/*
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* We can't do DMA on this transfer
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* for some reason. Fall back to
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* PIO.
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*/
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xfer->c_flags &= ~C_DMA;
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error = 0;
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} else {
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sc_xfer->error = XS_DRIVER_STUFFUP;
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break;
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}
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}
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}
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