Clarify what appear to the untrained eye to be two magic constants (the
address shift and access size shift), and allow them to be overridden by chip-specific code, if necessary.
This commit is contained in:
thorpej
parent
397e2cfc53
commit
51f4c69ad4
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_swiz_bus_io_chipdep.c,v 1.27 1998/08/30 23:29:10 cgd Exp $ */
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/* $NetBSD: pci_swiz_bus_io_chipdep.c,v 1.28 1999/12/07 05:44:57 thorpej Exp $ */
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/*-
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* Copyright (c) 1998 The NetBSD Foundation, Inc.
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@ -207,6 +207,14 @@ static long
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#define CHIP_IO_EX_STORE_SIZE(v) (sizeof __C(CHIP, _io_ex_storage))
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#endif
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#ifndef CHIP_ADDR_SHIFT
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#define CHIP_ADDR_SHIFT 5
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#endif
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#ifndef CHIP_SIZE_SHIFT
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#define CHIP_SIZE_SHIFT 3
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#endif
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void
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__C(CHIP,_bus_io_init)(t, v)
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bus_space_tag_t t;
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@ -326,15 +334,15 @@ __C(CHIP,_io_mapit)(v, ioaddr, iohp)
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#ifdef CHIP_IO_W1_BUS_START
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if (ioaddr >= CHIP_IO_W1_BUS_START(v) &&
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ioaddr <= CHIP_IO_W1_BUS_END(v)) {
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*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W1_SYS_START(v)) >> 5) +
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(ioaddr - CHIP_IO_W1_BUS_START(v));
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*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W1_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) + (ioaddr - CHIP_IO_W1_BUS_START(v));
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} else
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#endif
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#ifdef CHIP_IO_W2_BUS_START
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if (ioaddr >= CHIP_IO_W2_BUS_START(v) &&
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ioaddr <= CHIP_IO_W2_BUS_END(v)) {
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*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W2_SYS_START(v)) >> 5) +
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(ioaddr - CHIP_IO_W2_BUS_START(v));
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*iohp = (ALPHA_PHYS_TO_K0SEG(CHIP_IO_W2_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) + (ioaddr - CHIP_IO_W2_BUS_START(v));
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} else
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#endif
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{
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@ -419,20 +427,20 @@ __C(CHIP,_io_unmap)(v, ioh, iosize, acct)
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printf("io: freeing handle 0x%lx for 0x%lx\n", ioh, iosize);
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#endif
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ioh = ALPHA_K0SEG_TO_PHYS(ioh << 5) >> 5;
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ioh = ALPHA_K0SEG_TO_PHYS(ioh << CHIP_ADDR_SHIFT) >> CHIP_ADDR_SHIFT;
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#ifdef CHIP_IO_W1_BUS_START
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if ((ioh << 5) >= CHIP_IO_W1_SYS_START(v) &&
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(ioh << 5) <= CHIP_IO_W1_SYS_END(v)) {
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if ((ioh << CHIP_ADDR_SHIFT) >= CHIP_IO_W1_SYS_START(v) &&
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(ioh << CHIP_ADDR_SHIFT) <= CHIP_IO_W1_SYS_END(v)) {
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ioaddr = CHIP_IO_W1_BUS_START(v) +
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(ioh - (CHIP_IO_W1_SYS_START(v) >> 5));
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(ioh - (CHIP_IO_W1_SYS_START(v) >> CHIP_ADDR_SHIFT));
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} else
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#endif
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#ifdef CHIP_IO_W2_BUS_START
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if ((ioh << 5) >= CHIP_IO_W2_SYS_START(v) &&
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(ioh << 5) <= CHIP_IO_W2_SYS_END(v)) {
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if ((ioh << CHIP_ADDR_SHIFT) >= CHIP_IO_W2_SYS_START(v) &&
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(ioh << CHIP_ADDR_SHIFT) <= CHIP_IO_W2_SYS_END(v)) {
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ioaddr = CHIP_IO_W2_BUS_START(v) +
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(ioh - (CHIP_IO_W2_SYS_START(v) >> 5));
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(ioh - (CHIP_IO_W2_SYS_START(v) >> CHIP_ADDR_SHIFT));
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} else
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#endif
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{
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@ -448,7 +456,7 @@ __C(CHIP,_io_unmap)(v, ioh, iosize, acct)
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CHIP_IO_W2_SYS_END(v));
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#endif
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panic("%s: don't know how to unmap %lx",
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__S(__C(CHIP,_io_unmap)), (ioh << 5));
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__S(__C(CHIP,_io_unmap)), (ioh << CHIP_ADDR_SHIFT));
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}
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#ifdef EXTENT_DEBUG
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@ -564,7 +572,8 @@ __C(CHIP,_io_read_1)(v, ioh, off)
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tmpioh = ioh + off;
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offset = tmpioh & 3;
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port = (u_int32_t *)((tmpioh << 5) | (0 << 3));
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port = (u_int32_t *)((tmpioh << CHIP_ADDR_SHIFT) |
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(0 << CHIP_SIZE_SHIFT));
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val = *port;
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rval = ((val) >> (8 * offset)) & 0xff;
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@ -586,7 +595,8 @@ __C(CHIP,_io_read_2)(v, ioh, off)
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tmpioh = ioh + off;
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offset = tmpioh & 3;
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port = (u_int32_t *)((tmpioh << 5) | (1 << 3));
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port = (u_int32_t *)((tmpioh << CHIP_ADDR_SHIFT) |
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(1 << CHIP_SIZE_SHIFT));
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val = *port;
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rval = ((val) >> (8 * offset)) & 0xffff;
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@ -608,7 +618,8 @@ __C(CHIP,_io_read_4)(v, ioh, off)
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tmpioh = ioh + off;
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offset = tmpioh & 3;
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port = (u_int32_t *)((tmpioh << 5) | (3 << 3));
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port = (u_int32_t *)((tmpioh << CHIP_ADDR_SHIFT) |
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(3 << CHIP_SIZE_SHIFT));
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val = *port;
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#if 0
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rval = ((val) >> (8 * offset)) & 0xffffffff;
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@ -683,7 +694,8 @@ __C(CHIP,_io_write_1)(v, ioh, off, val)
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tmpioh = ioh + off;
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offset = tmpioh & 3;
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nval = val << (8 * offset);
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port = (u_int32_t *)((tmpioh << 5) | (0 << 3));
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port = (u_int32_t *)((tmpioh << CHIP_ADDR_SHIFT) |
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(0 << CHIP_SIZE_SHIFT));
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*port = nval;
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alpha_mb();
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}
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@ -702,7 +714,8 @@ __C(CHIP,_io_write_2)(v, ioh, off, val)
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tmpioh = ioh + off;
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offset = tmpioh & 3;
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nval = val << (8 * offset);
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port = (u_int32_t *)((tmpioh << 5) | (1 << 3));
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port = (u_int32_t *)((tmpioh << CHIP_ADDR_SHIFT) |
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(1 << CHIP_SIZE_SHIFT));
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*port = nval;
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alpha_mb();
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}
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@ -721,7 +734,8 @@ __C(CHIP,_io_write_4)(v, ioh, off, val)
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tmpioh = ioh + off;
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offset = tmpioh & 3;
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nval = val /*<< (8 * offset)*/;
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port = (u_int32_t *)((tmpioh << 5) | (3 << 3));
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port = (u_int32_t *)((tmpioh << CHIP_ADDR_SHIFT) |
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(3 << CHIP_SIZE_SHIFT));
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*port = nval;
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alpha_mb();
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.27 1999/03/12 22:54:58 perry Exp $ */
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/* $NetBSD: pci_swiz_bus_mem_chipdep.c,v 1.28 1999/12/07 05:44:58 thorpej Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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@ -183,6 +183,14 @@ static long
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#define CHIP_S_MEM_EX_STORE_SIZE(v) (sizeof __C(CHIP,_smem_ex_storage))
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#endif
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#ifndef CHIP_ADDR_SHIFT
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#define CHIP_ADDR_SHIFT 5
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#endif
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#ifndef CHIP_SIZE_SHIFT
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#define CHIP_SIZE_SHIFT 3
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#endif
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void
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__C(CHIP,_bus_mem_init)(t, v)
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bus_space_tag_t t;
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@ -398,7 +406,8 @@ __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
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if (memaddr >= CHIP_S_MEM_W1_BUS_START(v) &&
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memaddr <= CHIP_S_MEM_W1_BUS_END(v)) {
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*memhp =
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >> 5) +
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W1_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) +
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(memaddr - CHIP_S_MEM_W1_BUS_START(v));
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return (1);
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} else
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@ -407,7 +416,8 @@ __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
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if (memaddr >= CHIP_S_MEM_W2_BUS_START(v) &&
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memaddr <= CHIP_S_MEM_W2_BUS_END(v)) {
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*memhp =
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >> 5) +
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W2_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) +
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(memaddr - CHIP_S_MEM_W2_BUS_START(v));
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return (1);
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} else
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@ -416,7 +426,8 @@ __C(CHIP,_xlate_addr_to_sparse_handle)(v, memaddr, memhp)
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if (memaddr >= CHIP_S_MEM_W3_BUS_START(v) &&
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memaddr <= CHIP_S_MEM_W3_BUS_END(v)) {
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*memhp =
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >> 5) +
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(ALPHA_PHYS_TO_K0SEG(CHIP_S_MEM_W3_SYS_START(v)) >>
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CHIP_ADDR_SHIFT) +
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(memaddr - CHIP_S_MEM_W3_BUS_START(v));
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return (1);
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} else
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@ -431,29 +442,29 @@ __C(CHIP,_xlate_sparse_handle_to_addr)(v, memh, memaddrp)
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bus_addr_t *memaddrp;
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{
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memh = ALPHA_K0SEG_TO_PHYS(memh << 5) >> 5;
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memh = ALPHA_K0SEG_TO_PHYS(memh << CHIP_ADDR_SHIFT) >> CHIP_ADDR_SHIFT;
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#ifdef CHIP_S_MEM_W1_BUS_START
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if ((memh << 5) >= CHIP_S_MEM_W1_SYS_START(v) &&
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(memh << 5) <= CHIP_S_MEM_W1_SYS_END(v)) {
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if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W1_SYS_START(v) &&
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(memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W1_SYS_END(v)) {
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*memaddrp = CHIP_S_MEM_W1_BUS_START(v) +
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(memh - (CHIP_S_MEM_W1_SYS_START(v) >> 5));
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(memh - (CHIP_S_MEM_W1_SYS_START(v) >> CHIP_ADDR_SHIFT));
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return (1);
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} else
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#endif
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#ifdef CHIP_S_MEM_W2_BUS_START
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if ((memh << 5) >= CHIP_S_MEM_W2_SYS_START(v) &&
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(memh << 5) <= CHIP_S_MEM_W2_SYS_END(v)) {
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if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W2_SYS_START(v) &&
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(memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W2_SYS_END(v)) {
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*memaddrp = CHIP_S_MEM_W2_BUS_START(v) +
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(memh - (CHIP_S_MEM_W2_SYS_START(v) >> 5));
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(memh - (CHIP_S_MEM_W2_SYS_START(v) >> CHIP_ADDR_SHIFT));
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return (1);
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} else
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#endif
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#ifdef CHIP_S_MEM_W3_BUS_START
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if ((memh << 5) >= CHIP_S_MEM_W3_SYS_START(v) &&
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(memh << 5) <= CHIP_S_MEM_W3_SYS_END(v)) {
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if ((memh << CHIP_ADDR_SHIFT) >= CHIP_S_MEM_W3_SYS_START(v) &&
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(memh << CHIP_ADDR_SHIFT) <= CHIP_S_MEM_W3_SYS_END(v)) {
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*memaddrp = CHIP_S_MEM_W3_BUS_START(v) +
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(memh - (CHIP_S_MEM_W3_SYS_START(v) >> 5));
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(memh - (CHIP_S_MEM_W3_SYS_START(v) >> CHIP_ADDR_SHIFT));
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return (1);
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} else
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#endif
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@ -723,7 +734,8 @@ __C(CHIP,_mem_read_1)(v, memh, off)
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tmpmemh = memh + off;
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offset = tmpmemh & 3;
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port = (u_int32_t *)((tmpmemh << 5) | (0 << 3));
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port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) |
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(0 << CHIP_SIZE_SHIFT));
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val = *port;
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rval = ((val) >> (8 * offset)) & 0xff;
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@ -748,7 +760,8 @@ __C(CHIP,_mem_read_2)(v, memh, off)
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tmpmemh = memh + off;
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offset = tmpmemh & 3;
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port = (u_int32_t *)((tmpmemh << 5) | (1 << 3));
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port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) |
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(1 << CHIP_SIZE_SHIFT));
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val = *port;
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rval = ((val) >> (8 * offset)) & 0xffff;
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@ -773,7 +786,8 @@ __C(CHIP,_mem_read_4)(v, memh, off)
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tmpmemh = memh + off;
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offset = tmpmemh & 3;
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port = (u_int32_t *)((tmpmemh << 5) | (3 << 3));
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port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) |
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(3 << CHIP_SIZE_SHIFT));
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val = *port;
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#if 0
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rval = ((val) >> (8 * offset)) & 0xffffffff;
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@ -856,7 +870,8 @@ __C(CHIP,_mem_write_1)(v, memh, off, val)
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tmpmemh = memh + off;
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offset = tmpmemh & 3;
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nval = val << (8 * offset);
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port = (u_int32_t *)((tmpmemh << 5) | (0 << 3));
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port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) |
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(0 << CHIP_SIZE_SHIFT));
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*port = nval;
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}
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alpha_mb();
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@ -879,7 +894,8 @@ __C(CHIP,_mem_write_2)(v, memh, off, val)
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tmpmemh = memh + off;
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offset = tmpmemh & 3;
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nval = val << (8 * offset);
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port = (u_int32_t *)((tmpmemh << 5) | (1 << 3));
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port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) |
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(1 << CHIP_SIZE_SHIFT));
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*port = nval;
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}
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alpha_mb();
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@ -902,7 +918,8 @@ __C(CHIP,_mem_write_4)(v, memh, off, val)
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tmpmemh = memh + off;
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offset = tmpmemh & 3;
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nval = val /*<< (8 * offset)*/;
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port = (u_int32_t *)((tmpmemh << 5) | (3 << 3));
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port = (u_int32_t *)((tmpmemh << CHIP_ADDR_SHIFT) |
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(3 << CHIP_SIZE_SHIFT));
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*port = nval;
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}
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alpha_mb();
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