Added support for the PowerStorm 4d20, initial support that is.
I plan on cleaning a few things up over the next few days, but this appears to be working for me.
This commit is contained in:
elric
parent
94448f7e52
commit
51b292ea65
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@ -1,4 +1,4 @@
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# $NetBSD: files.pci,v 1.150 2001/12/05 15:51:11 augustss Exp $
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# $NetBSD: files.pci,v 1.151 2001/12/12 07:50:05 elric Exp $
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#
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# Config file and device description for machine-independent PCI code.
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# Included by ports that need it. Requires that the SCSI files be
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@ -221,6 +221,7 @@ file dev/pci/tga.c tga needs-flag
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file dev/pci/tga_conf.c tga
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file dev/ic/bt485.c tga
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file dev/ic/bt463.c tga
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file dev/ic/ibm561.c tga
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# Brooktree Bt848 video capture
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device bktr: pcibus
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@ -1,4 +1,4 @@
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/* $NetBSD: tga.c,v 1.37 2001/11/13 07:48:49 lukem Exp $ */
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/* $NetBSD: tga.c,v 1.38 2001/12/12 07:50:05 elric Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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@ -28,7 +28,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tga.c,v 1.37 2001/11/13 07:48:49 lukem Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tga.c,v 1.38 2001/12/12 07:50:05 elric Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -51,6 +51,7 @@ __KERNEL_RCSID(0, "$NetBSD: tga.c,v 1.37 2001/11/13 07:48:49 lukem Exp $");
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#include <dev/ic/bt485var.h>
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#include <dev/ic/bt463reg.h>
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#include <dev/ic/bt463var.h>
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#include <dev/ic/ibm561var.h>
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#include <dev/wscons/wsconsio.h>
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#include <dev/wscons/wscons_raster.h>
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@ -81,6 +82,7 @@ static void tga_init __P((bus_space_tag_t memt, pci_chipset_tag_t pc,
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static int tga_matchcommon __P((bus_space_tag_t, pci_chipset_tag_t, pcitag_t));
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static void tga_mapaddrs __P((bus_space_tag_t memt, pci_chipset_tag_t pc,
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pcitag_t, bus_size_t *pcisize, struct tga_devconfig *dc));
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unsigned tga_getdotclock __P((struct tga_devconfig *dc));
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struct tga_devconfig tga_console_dc;
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@ -101,7 +103,7 @@ static void tga_putchar __P((void *c, int row, int col,
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u_int uc, long attr));
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static void tga_eraserows __P((void *, int, int, long));
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static void tga_erasecols __P((void *, int, int, int, long));
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void tga2_init __P((struct tga_devconfig *, int));
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void tga2_init __P((struct tga_devconfig *));
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static void tga_config_interrupts __P((struct device *));
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@ -289,12 +291,8 @@ tga_init(memt, pc, tag, dc)
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panic("tga_init: TGA Revision not recognized");
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}
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if (dc->dc_tga2) {
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int monitor;
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monitor = (~TGARREG(dc, TGA_REG_GREV) >> 16) & 0x0f;
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tga2_init(dc, monitor);
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}
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if (dc->dc_tga2)
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tga2_init(dc);
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switch (TGARREG(dc, TGA_REG_VHCR) & 0x1ff) { /* XXX */
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case 0:
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@ -489,11 +487,18 @@ tgaattach(parent, self, aux)
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sc->sc_dc->dc_ramdac_cookie =
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sc->sc_dc->dc_ramdac_funcs->ramdac_register(sc->sc_dc,
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tga_sched_update, tga2_ramdac_wr, tga2_ramdac_rd);
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/* XXX this is a bit of a hack, setting the dotclock here */
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if (sc->sc_dc->dc_tgaconf->ramdac_funcs != bt485_funcs)
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(*sc->sc_dc->dc_ramdac_funcs->ramdac_set_dotclock)
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(sc->sc_dc->dc_ramdac_cookie,
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tga_getdotclock(sc->sc_dc));
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}
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/*
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* Initialize the RAMDAC. Initialization includes disabling
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* cursor, setting a sane colormap, etc.
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* cursor, setting a sane colormap, etc. We presume that we've
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* filled in the necessary dot clock for PowerStorm 4d20.
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*/
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(*sc->sc_dc->dc_ramdac_funcs->ramdac_init)(sc->sc_dc->dc_ramdac_cookie);
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TGAWREG(sc->sc_dc, TGA_REG_SISR, 0x00000001); /* XXX */
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@ -553,7 +558,11 @@ tga_ioctl(v, cmd, data, flag, p)
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wsd_fbip->height = sc->sc_dc->dc_ht;
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wsd_fbip->width = sc->sc_dc->dc_wid;
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wsd_fbip->depth = sc->sc_dc->dc_tgaconf->tgac_phys_depth;
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#if 0
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wsd_fbip->cmsize = 256; /* XXX ??? */
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#else
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wsd_fbip->cmsize = 1024; /* XXX ??? */
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#endif
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#undef wsd_fbip
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return (0);
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@ -748,10 +757,14 @@ tga_cnattach(iot, memt, pc, bus, device, function)
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* Initialization includes disabling cursor, setting a sane
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* colormap, etc. It will be reinitialized in tgaattach().
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*/
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if (dcp->dc_tga2)
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bt485_cninit(dcp, tga_sched_update, tga2_ramdac_wr,
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tga2_ramdac_rd);
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else {
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if (dcp->dc_tga2) {
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if (dcp->dc_tgaconf->ramdac_funcs == bt485_funcs)
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bt485_cninit(dcp, tga_sched_update, tga2_ramdac_wr,
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tga2_ramdac_rd);
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else
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ibm561_cninit(dcp, tga_sched_update, tga2_ramdac_wr,
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tga2_ramdac_rd, tga_getdotclock(dcp));
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} else {
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if (dcp->dc_tgaconf->ramdac_funcs == bt485_funcs)
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bt485_cninit(dcp, tga_sched_update, tga_ramdac_wr,
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tga_ramdac_rd);
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@ -1502,31 +1515,46 @@ void tga2_ics9110_wr __P((
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int dotclock
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));
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void
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tga2_init(dc, m)
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struct tga_devconfig *dc;
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int m;
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{
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struct monitor *tga_getmonitor __P((struct tga_devconfig *dc));
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tga2_ics9110_wr(dc, decmonitors[m].dotclock);
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void
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tga2_init(dc)
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struct tga_devconfig *dc;
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{
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struct monitor *m = tga_getmonitor(dc);
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/* Deal with the dot clocks.
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*/
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if (dc->dc_tga_type == TGA_TYPE_POWERSTORM_4D20) {
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/* Set this up as a reference clock for the
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* ibm561's PLL.
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*/
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tga2_ics9110_wr(dc, 14300000);
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/* XXX Can't set up the dotclock properly, until such time
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* as the RAMDAC is configured.
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*/
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} else {
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/* otherwise the ics9110 is our clock. */
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tga2_ics9110_wr(dc, m->dotclock);
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}
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#if 0
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TGAWREG(dc, TGA_REG_VHCR,
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((decmonitors[m].hbp / 4) << 21) |
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((decmonitors[m].hsync / 4) << 14) |
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(((decmonitors[m].hfp - 4) / 4) << 9) |
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((decmonitors[m].cols + 4) / 4));
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((m->hbp / 4) << 21) |
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((m->hsync / 4) << 14) |
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(((m->hfp - 4) / 4) << 9) |
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((m->cols + 4) / 4));
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#else
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TGAWREG(dc, TGA_REG_VHCR,
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((decmonitors[m].hbp / 4) << 21) |
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((decmonitors[m].hsync / 4) << 14) |
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(((decmonitors[m].hfp) / 4) << 9) |
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((decmonitors[m].cols) / 4));
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((m->hbp / 4) << 21) |
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((m->hsync / 4) << 14) |
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(((m->hfp) / 4) << 9) |
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((m->cols) / 4));
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#endif
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TGAWREG(dc, TGA_REG_VVCR,
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(decmonitors[m].vbp << 22) |
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(decmonitors[m].vsync << 16) |
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(decmonitors[m].vfp << 11) |
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(decmonitors[m].rows));
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(m->vbp << 22) |
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(m->vsync << 16) |
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(m->vfp << 11) |
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(m->rows));
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TGAWREG(dc, TGA_REG_VVBR, 1);
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TGAREGRWB(dc, TGA_REG_VHCR, 3);
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TGAWREG(dc, TGA_REG_VVVR, TGARREG(dc, TGA_REG_VVVR) | 1);
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@ -1578,6 +1606,8 @@ tga2_ics9110_wr(dc, dotclock)
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N = 0x60; M = 0x32; V = 0x1; X = 0x1; R = 0x2; break;
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case 202500000:
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N = 0x60; M = 0x32; V = 0x1; X = 0x1; R = 0x2; break;
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case 14300000: /* this one is just a ref clock */
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N = 0x03; M = 0x03; V = 0x1; X = 0x1; R = 0x3; break;
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default:
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panic("unrecognized clock rate %d\n", dotclock);
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}
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@ -1606,3 +1636,17 @@ tga2_ics9110_wr(dc, dotclock)
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bus_space_write_4(dc->dc_memt, clock, 0, 0x0);
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bus_space_barrier(dc->dc_memt, clock, 0, 0, BUS_SPACE_BARRIER_WRITE);
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}
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struct monitor *
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tga_getmonitor(dc)
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struct tga_devconfig *dc;
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{
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return &decmonitors[(~TGARREG(dc, TGA_REG_GREV) >> 16) & 0x0f];
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}
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unsigned
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tga_getdotclock(dc)
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struct tga_devconfig *dc;
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{
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return tga_getmonitor(dc)->dotclock;
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: tga_conf.c,v 1.5 2001/11/13 07:48:49 lukem Exp $ */
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/* $NetBSD: tga_conf.c,v 1.6 2001/12/12 07:50:05 elric Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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@ -28,9 +28,10 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: tga_conf.c,v 1.5 2001/11/13 07:48:49 lukem Exp $");
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__KERNEL_RCSID(0, "$NetBSD: tga_conf.c,v 1.6 2001/12/12 07:50:05 elric Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <dev/pci/pcivar.h>
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@ -39,6 +40,7 @@ __KERNEL_RCSID(0, "$NetBSD: tga_conf.c,v 1.5 2001/11/13 07:48:49 lukem Exp $");
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#include <dev/ic/bt485var.h>
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#include <dev/ic/bt463var.h>
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#include <dev/ic/ibm561var.h>
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#undef KB
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#define KB * 1024
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@ -116,6 +118,17 @@ static const struct tga_conf tga_configs[TGA_TYPE_UNKNOWN] = {
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1, { 16 MB, 0 }, { 8 MB, 0 },
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1, { 24 MB, 0 }, { 8 MB, 0 },
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},
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/* TGA_TYPE_POWERSTORM_4D20 */
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/* XXX: These numbers may be incorrect */
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{
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"PS4d20",
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ibm561_funcs,
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32,
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32 MB,
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16 KB,
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1, { 16 MB, 0 }, { 8 MB, 0 },
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1, { 24 MB, 0 }, { 8 MB, 0 },
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}
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};
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#undef KB
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@ -127,14 +140,17 @@ tga_identify(dc)
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{
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int type;
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int gder;
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int grev;
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int deep, addrmask, wide;
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int tga2;
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gder = TGARREG(dc, TGA_REG_GDER);
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grev = TGARREG(dc, TGA_REG_GREV);
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deep = (gder & 0x1) != 0; /* XXX */
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addrmask = (gder >> 2) & 0x7; /* XXX */
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wide = (gder & 0x200) == 0; /* XXX */
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tga2 = (grev & 0x20) != 0;
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type = TGA_TYPE_UNKNOWN;
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@ -161,6 +177,10 @@ tga_identify(dc)
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}
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} else {
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/* 32bpp frame buffer */
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if (addrmask == 0x00 && tga2 && wide) {
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/* My PowerStorm 4d20 shows up this way? */
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type = TGA_TYPE_POWERSTORM_4D20;
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}
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if (addrmask == 0x3) {
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/* 16MB core map; T32-04 or T32-08 */
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@ -172,7 +192,7 @@ tga_identify(dc)
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} else if (addrmask == 0x7) {
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/* 32MB core map; T32-88 */
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if (wide) /* sanity */
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if (wide && !tga2) /* sanity */
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type = TGA_TYPE_T32_88;
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}
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}
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@ -190,4 +210,3 @@ tga_getconf(type)
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return (NULL);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: tgavar.h,v 1.11 2001/09/04 06:59:11 thorpej Exp $ */
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/* $NetBSD: tgavar.h,v 1.12 2001/12/12 07:50:05 elric Exp $ */
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/*
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* Copyright (c) 1995, 1996 Carnegie-Mellon University.
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@ -109,7 +109,8 @@ struct tga_softc {
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#define TGA_TYPE_T32_04 4 /* 32bpp, 4MB */
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#define TGA_TYPE_T32_08 5 /* 32bpp, 8MB */
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#define TGA_TYPE_T32_88 6 /* 32bpp, 16MB */
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#define TGA_TYPE_UNKNOWN 7 /* unknown */
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#define TGA_TYPE_POWERSTORM_4D20 7 /* unknown */
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#define TGA_TYPE_UNKNOWN 8 /* unknown */
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#define DEVICE_IS_TGA(class, id) \
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(((PCI_VENDOR(id) == PCI_VENDOR_DEC && \
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