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merge the changes from drm 85b9f737db0d2a845e4d7e2bbf9ad12ff9e2227c 

with our changes and the work recently done by Arto Huusko
<arto.huusko@pp2.inet.fi> and FUKAUMI Naoki <fun@naobsd.org>.

it includes all the changes arto provided from both mesa-drm and
the r6xx-r7xx-support branch.  it does not yet include code to
handle the (deleted) drm_pciids.h file, but i'll probably just
check in a generated one for now.

i have not yet merged the changes from outside this dir.


from arto's messages to tech-x11:

The important change that was needed is that drm_scatter.c was
fixed to return pointer to all allocated pages, not just the
beginning of the allocated segments.

Other changes:

  - drm_scatter maps COHERENT memory
  - drm_drawable: drawable handle allocation is done
    inside lock
  - drm_memory: when mapping "agp" memory, store offset
    of mapped area, so that new requests to same offset
    return the same area instead of trying to remap
    and fail
  - drm_vm: use bus_space_mmap for frame buffer and registers

  - r600_cp.c: ioremapfree allocated gart range
  - radeon_cp.c: use mtsleep
  - some memset calls I had added had their args swapped,
    and no memory was cleared
This commit is contained in:
mrg 2009-06-19 03:50:03 +00:00
parent 57cc1d9fad
commit 50fcbdf26f
54 changed files with 14963 additions and 3840 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
sys/external/bsd/drm/dist/bsd-core/Makefile vendored
View File

@ -1,6 +1,6 @@
SHARED= ../shared-core
SUBDIR = drm mach64 mga r128 radeon savage sis tdfx i915 # via
SUBDIR = drm mach64 mga r128 radeon savage sis tdfx i915 #nouveau
.include <bsd.obj.mk>
@ -9,5 +9,3 @@ all: drm_pciids.h
drm_pciids.h: ${SHARED}/drm_pciids.txt
sh ../scripts/create_bsd_pci_lists.sh < ${SHARED}/drm_pciids.txt
.include <bsd.subdir.mk>

179
sys/external/bsd/drm/dist/bsd-core/ati_pcigart.c vendored
View File

@ -39,26 +39,169 @@
#define ATI_PCIE_WRITE 0x4
#define ATI_PCIE_READ 0x8
static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
#if defined(__FreeBSD__)
static void
drm_ati_alloc_pcigart_table_cb(void *arg, bus_dma_segment_t *segs,
int nsegs, int error)
{
dev->sg->dmah = drm_pci_alloc(dev, gart_info->table_size,
PAGE_SIZE,
gart_info->table_mask);
if (dev->sg->dmah == NULL)
struct drm_dma_handle *dmah = arg;
if (error != 0)
return;
DRM_KASSERT(nsegs == 1,
("drm_ati_alloc_pcigart_table_cb: bad dma segment count"));
dmah->busaddr = segs[0].ds_addr;
}
#endif
static int
drm_ati_alloc_pcigart_table(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
{
struct drm_dma_handle *dmah;
int flags, ret;
#if defined(__NetBSD__)
int nsegs;
#endif
dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA,
M_ZERO | M_NOWAIT);
if (dmah == NULL)
return ENOMEM;
#if defined(__FreeBSD__)
DRM_UNLOCK();
ret = bus_dma_tag_create(NULL, PAGE_SIZE, 0, /* tag, align, boundary */
gart_info->table_mask, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
NULL, NULL, /* filtfunc, filtfuncargs */
gart_info->table_size, 1, /* maxsize, nsegs */
gart_info->table_size, /* maxsegsize */
BUS_DMA_ALLOCNOW, NULL, NULL, /* flags, lockfunc, lockfuncargs */
&dmah->tag);
if (ret != 0) {
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
flags = BUS_DMA_NOWAIT | BUS_DMA_ZERO;
if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
flags |= BUS_DMA_NOCACHE;
ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, flags, &dmah->map);
if (ret != 0) {
bus_dma_tag_destroy(dmah->tag);
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
DRM_LOCK();
ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
gart_info->table_size, drm_ati_alloc_pcigart_table_cb, dmah, 0);
if (ret != 0) {
bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
bus_dma_tag_destroy(dmah->tag);
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
#elif defined(__NetBSD__)
dmah->tag = dev->pa.pa_dmat;
flags = BUS_DMA_NOWAIT;
if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
flags |= BUS_DMA_NOCACHE;
ret = bus_dmamem_alloc(dmah->tag, gart_info->table_size, PAGE_SIZE,
0, dmah->segs, 1, &nsegs, flags);
if (ret != 0) {
printf("drm: unable to allocate %zu bytes of DMA, error %d\n",
(size_t)gart_info->table_size, ret);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
if (nsegs != 1) {
printf("drm: bad segment count\n");
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
ret = bus_dmamem_map(dmah->tag, dmah->segs, nsegs, gart_info->table_size,
&dmah->vaddr, flags | BUS_DMA_COHERENT);
if (ret != 0) {
printf("drm: Unable to map DMA, error %d\n", ret);
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
ret = bus_dmamap_create(dmah->tag, gart_info->table_size, 1,
gart_info->table_size, 0,
BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &dmah->map);
if (ret != 0) {
printf("drm: Unable to create DMA map, error %d\n", ret);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, gart_info->table_size);
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
gart_info->table_size, NULL, BUS_DMA_NOWAIT);
if (ret != 0) {
printf("drm: Unable to load DMA map, error %d\n", ret);
bus_dmamap_destroy(dmah->tag, dmah->map);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, gart_info->table_size);
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
dmah->busaddr = dmah->map->dm_segs[0].ds_addr;
dmah->size = gart_info->table_size;
dmah->nsegs = 1;
/*
* Mirror here FreeBSD doing BUS_DMA_ZERO.
* But I see this same memset() is done in drm_ati_pcigart_init(),
* so maybe this is not needed.
*/
memset(dmah->vaddr, 0, gart_info->table_size);
#endif
dev->sg->dmah = dmah;
return 0;
}
static void drm_ati_free_pcigart_table(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
static void
drm_ati_free_pcigart_table(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
{
drm_pci_free(dev, dev->sg->dmah);
struct drm_dma_handle *dmah = dev->sg->dmah;
#if defined(__FreeBSD__)
bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
bus_dma_tag_destroy(dmah->tag);
#elif defined(__NetBSD__)
bus_dmamap_unload(dmah->tag, dmah->map);
bus_dmamap_destroy(dmah->tag, dmah->map);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, dmah->size);
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
#endif
free(dmah, DRM_MEM_DMA);
dev->sg->dmah = NULL;
}
int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info)
int
drm_ati_pcigart_cleanup(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
{
/* we need to support large memory configurations */
if (dev->sg == NULL) {
@ -77,17 +220,17 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
return 1;
}
int drm_ati_pcigart_init(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
int
drm_ati_pcigart_init(struct drm_device *dev,
struct drm_ati_pcigart_info *gart_info)
{
void *address = NULL;
unsigned long pages;
u32 *pci_gart, page_base;
dma_addr_t bus_address = 0;
dma_addr_t entry_addr;
int i, j, ret = 0;
int max_pages;
dma_addr_t entry_addr;
/* we need to support large memory configurations */
if (dev->sg == NULL) {
@ -129,12 +272,14 @@ int drm_ati_pcigart_init(struct drm_device *dev,
page_base = (u32) entry_addr & ATI_PCIGART_PAGE_MASK;
switch(gart_info->gart_reg_if) {
case DRM_ATI_GART_IGP:
page_base |= (upper_32_bits(entry_addr) & 0xff) << 4;
page_base |=
(upper_32_bits(entry_addr) & 0xff) << 4;
page_base |= 0xc;
break;
case DRM_ATI_GART_PCIE:
page_base >>= 8;
page_base |= (upper_32_bits(entry_addr) & 0xff) << 24;
page_base |=
(upper_32_bits(entry_addr) & 0xff) << 24;
page_base |= ATI_PCIE_READ | ATI_PCIE_WRITE;
break;
default:
@ -147,8 +292,6 @@ int drm_ati_pcigart_init(struct drm_device *dev,
}
}
DRM_MEMORYBARRIER();
ret = 1;
done:

1
sys/external/bsd/drm/dist/bsd-core/drm/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = drm
NO_MAN = YES
NOMAN = YES
SRCS = \
ati_pcigart.c \
drm_agpsupport.c \

580
sys/external/bsd/drm/dist/bsd-core/drmP.h vendored
View File

File diff suppressed because it is too large Load Diff

108
sys/external/bsd/drm/dist/bsd-core/drm_agpsupport.c vendored
View File

@ -35,7 +35,7 @@
#include "drmP.h"
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
#if __FreeBSD_version >= 800004
#include <dev/agp/agpreg.h>
#else /* __FreeBSD_version >= 800004 */
@ -48,7 +48,7 @@
static int
drm_device_find_capability(struct drm_device *dev, int cap)
{
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
#if __FreeBSD_version >= 602102
return (pci_find_extcap(dev->device, cap, NULL) == 0);
@ -82,26 +82,20 @@ drm_device_find_capability(struct drm_device *dev, int cap)
return 0;
#endif
#else
#ifdef __NetBSD__
return pci_get_capability(dev->pa.pa_pc, dev->pa.pa_tag, cap,
NULL, NULL);
#else
/* XXX: fill me in for non-NetBSD/FreeBSD */
return 1;
#endif
#elif defined(__NetBSD__)
return pci_get_capability(dev->pa.pa_pc, dev->pa.pa_tag, cap, NULL, NULL);
#endif
}
int drm_device_is_agp(struct drm_device *dev)
{
if (dev->driver.device_is_agp != NULL) {
if (dev->driver->device_is_agp != NULL) {
int ret;
/* device_is_agp returns a tristate, 0 = not AGP, 1 = definitely
* AGP, 2 = fall back to PCI capability
*/
ret = (*dev->driver.device_is_agp)(dev);
ret = (*dev->driver->device_is_agp)(dev);
if (ret != DRM_MIGHT_BE_AGP)
return ret;
}
@ -114,7 +108,7 @@ int drm_device_is_pcie(struct drm_device *dev)
return (drm_device_find_capability(dev, PCIY_EXPRESS));
}
int drm_agp_info(struct drm_device * dev, drm_agp_info_t *info)
int drm_agp_info(struct drm_device * dev, struct drm_agp_info *info)
{
struct agp_info *kern;
@ -122,9 +116,7 @@ int drm_agp_info(struct drm_device * dev, drm_agp_info_t *info)
return EINVAL;
kern = &dev->agp->info;
#ifndef DRM_NO_AGP
agp_get_info(dev->agp->agpdev, kern);
#endif
info->agp_version_major = 1;
info->agp_version_minor = 0;
info->mode = kern->ai_mode;
@ -142,13 +134,13 @@ int drm_agp_info_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
int err;
drm_agp_info_t info;
struct drm_agp_info info;
err = drm_agp_info(dev, &info);
if (err != 0)
return err;
*(drm_agp_info_t *) data = info;
*(struct drm_agp_info *) data = info;
return 0;
}
@ -161,7 +153,6 @@ int drm_agp_acquire_ioctl(struct drm_device *dev, void *data,
int drm_agp_acquire(struct drm_device *dev)
{
#ifndef DRM_NO_AGP
int retcode;
if (!dev->agp || dev->agp->acquired)
@ -172,7 +163,6 @@ int drm_agp_acquire(struct drm_device *dev)
return retcode;
dev->agp->acquired = 1;
#endif
return 0;
}
@ -185,42 +175,37 @@ int drm_agp_release_ioctl(struct drm_device *dev, void *data,
int drm_agp_release(struct drm_device * dev)
{
#ifndef DRM_NO_AGP
if (!dev->agp || !dev->agp->acquired)
return EINVAL;
agp_release(dev->agp->agpdev);
dev->agp->acquired = 0;
#endif
return 0;
}
int drm_agp_enable(struct drm_device *dev, drm_agp_mode_t mode)
int drm_agp_enable(struct drm_device *dev, struct drm_agp_mode mode)
{
#ifndef DRM_NO_AGP
if (!dev->agp || !dev->agp->acquired)
return EINVAL;
dev->agp->mode = mode.mode;
agp_enable(dev->agp->agpdev, mode.mode);
dev->agp->enabled = 1;
#endif
return 0;
}
int drm_agp_enable_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_agp_mode_t mode;
struct drm_agp_mode mode;
mode = *(drm_agp_mode_t *) data;
mode = *(struct drm_agp_mode *) data;
return drm_agp_enable(dev, mode);
}
int drm_agp_alloc(struct drm_device *dev, drm_agp_buffer_t *request)
int drm_agp_alloc(struct drm_device *dev, struct drm_agp_buffer *request)
{
#ifndef DRM_NO_AGP
drm_agp_mem_t *entry;
void *handle;
unsigned long pages;
@ -230,7 +215,7 @@ int drm_agp_alloc(struct drm_device *dev, drm_agp_buffer_t *request)
if (!dev->agp || !dev->agp->acquired)
return EINVAL;
entry = malloc(sizeof(*entry), M_DRM, M_NOWAIT | M_ZERO);
entry = malloc(sizeof(*entry), DRM_MEM_AGPLISTS, M_NOWAIT | M_ZERO);
if (entry == NULL)
return ENOMEM;
@ -241,7 +226,7 @@ int drm_agp_alloc(struct drm_device *dev, drm_agp_buffer_t *request)
handle = drm_agp_allocate_memory(pages, type);
DRM_LOCK();
if (handle == NULL) {
free(entry, M_DRM);
free(entry, DRM_MEM_AGPLISTS);
return ENOMEM;
}
@ -258,7 +243,6 @@ int drm_agp_alloc(struct drm_device *dev, drm_agp_buffer_t *request)
request->handle = (unsigned long) entry->handle;
request->physical = info.ami_physical;
#endif
return 0;
}
@ -266,16 +250,16 @@ int drm_agp_alloc(struct drm_device *dev, drm_agp_buffer_t *request)
int drm_agp_alloc_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_agp_buffer_t request;
struct drm_agp_buffer request;
int retcode;
request = *(drm_agp_buffer_t *) data;
request = *(struct drm_agp_buffer *) data;
DRM_LOCK();
retcode = drm_agp_alloc(dev, &request);
DRM_UNLOCK();
*(drm_agp_buffer_t *) data = request;
*(struct drm_agp_buffer *) data = request;
return retcode;
}
@ -291,7 +275,7 @@ static drm_agp_mem_t * drm_agp_lookup_entry(struct drm_device *dev,
return NULL;
}
int drm_agp_unbind(struct drm_device *dev, drm_agp_binding_t *request)
int drm_agp_unbind(struct drm_device *dev, struct drm_agp_binding *request)
{
drm_agp_mem_t *entry;
int retcode;
@ -316,10 +300,10 @@ int drm_agp_unbind(struct drm_device *dev, drm_agp_binding_t *request)
int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_agp_binding_t request;
struct drm_agp_binding request;
int retcode;
request = *(drm_agp_binding_t *) data;
request = *(struct drm_agp_binding *) data;
DRM_LOCK();
retcode = drm_agp_unbind(dev, &request);
@ -328,7 +312,7 @@ int drm_agp_unbind_ioctl(struct drm_device *dev, void *data,
return retcode;
}
int drm_agp_bind(struct drm_device *dev, drm_agp_binding_t *request)
int drm_agp_bind(struct drm_device *dev, struct drm_agp_binding *request)
{
drm_agp_mem_t *entry;
int retcode;
@ -357,10 +341,10 @@ int drm_agp_bind(struct drm_device *dev, drm_agp_binding_t *request)
int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_agp_binding_t request;
struct drm_agp_binding request;
int retcode;
request = *(drm_agp_binding_t *) data;
request = *(struct drm_agp_binding *) data;
DRM_LOCK();
retcode = drm_agp_bind(dev, &request);
@ -369,7 +353,7 @@ int drm_agp_bind_ioctl(struct drm_device *dev, void *data,
return retcode;
}
int drm_agp_free(struct drm_device *dev, drm_agp_buffer_t *request)
int drm_agp_free(struct drm_device *dev, struct drm_agp_buffer *request)
{
drm_agp_mem_t *entry;
@ -393,7 +377,7 @@ int drm_agp_free(struct drm_device *dev, drm_agp_buffer_t *request)
drm_agp_free_memory(entry->handle);
DRM_LOCK();
free(entry, M_DRM);
free(entry, DRM_MEM_AGPLISTS);
return 0;
@ -402,10 +386,10 @@ int drm_agp_free(struct drm_device *dev, drm_agp_buffer_t *request)
int drm_agp_free_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_agp_buffer_t request;
struct drm_agp_buffer request;
int retcode;
request = *(drm_agp_buffer_t *) data;
request = *(struct drm_agp_buffer *) data;
DRM_LOCK();
retcode = drm_agp_free(dev, &request);
@ -414,11 +398,8 @@ int drm_agp_free_ioctl(struct drm_device *dev, void *data,
return retcode;
}
#ifdef __NetBSD__
drm_agp_head_t *drm_agp_init(drm_device_t *dev)
#else
drm_agp_head_t *drm_agp_init(void)
#endif
drm_agp_head_t *
drm_agp_init(struct drm_device *dev)
{
device_t agpdev;
drm_agp_head_t *head = NULL;
@ -431,17 +412,20 @@ drm_agp_head_t *drm_agp_init(void)
DRM_DEBUG("agp_available = %d\n", agp_available);
if (agp_available) {
head = malloc(sizeof(*head), M_DRM, M_NOWAIT | M_ZERO);
head = malloc(sizeof(*head), DRM_MEM_AGPLISTS,
M_NOWAIT | M_ZERO);
if (head == NULL)
return NULL;
head->agpdev = agpdev;
#ifndef DRM_NO_AGP
agp_get_info(agpdev, &head->info);
#endif
head->base = head->info.ai_aperture_base;
head->memory = NULL;
/* XXX use aprint_normal_dev() on NetBSD */
DRM_INFO("AGP at 0x%08lx %dMB\n",
#if defined(__FreeBSD__)
DRM_INFO(
#elif defined(__NetBSD__)
aprint_normal_dev(dev->device,
#endif
"AGP at 0x%08lx %dMB\n",
(long)head->info.ai_aperture_base,
(int)(head->info.ai_aperture_size >> 20));
}
@ -450,7 +434,7 @@ drm_agp_head_t *drm_agp_init(void)
void *drm_agp_allocate_memory(size_t pages, u32 type)
{
void *agpdev;
device_t agpdev;
agpdev = DRM_AGP_FIND_DEVICE();
if (!agpdev)
@ -461,7 +445,7 @@ void *drm_agp_allocate_memory(size_t pages, u32 type)
int drm_agp_free_memory(void *handle)
{
void *agpdev;
device_t agpdev;
agpdev = DRM_AGP_FIND_DEVICE();
if (!agpdev || !handle)
@ -473,30 +457,22 @@ int drm_agp_free_memory(void *handle)
int drm_agp_bind_memory(void *handle, off_t start)
{
#ifndef DRM_NO_AGP
void *agpdev;
device_t agpdev;
agpdev = DRM_AGP_FIND_DEVICE();
if (!agpdev || !handle)
return EINVAL;
return agp_bind_memory(agpdev, handle, start * PAGE_SIZE);
#else
return 0;
#endif
}
int drm_agp_unbind_memory(void *handle)
{
#ifndef DRM_NO_AGP
void *agpdev;
device_t agpdev;
agpdev = DRM_AGP_FIND_DEVICE();
if (!agpdev || !handle)
return EINVAL;
return agp_unbind_memory(agpdev, handle);
#else
return 0;
#endif
}

137
sys/external/bsd/drm/dist/bsd-core/drm_atomic.h vendored
View File

@ -33,41 +33,54 @@
typedef u_int32_t atomic_t;
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
#define atomic_set(p, v) (*(p) = (v))
#define atomic_read(p) (*(p))
#define atomic_inc(p) atomic_add_int(p, 1)
#define atomic_dec(p) atomic_subtract_int(p, 1)
#define atomic_add(n, p) atomic_add_int(p, n)
#define atomic_sub(n, p) atomic_subtract_int(p, n)
#else /* __FreeBSD__ */
#ifndef __NetBSD__
/* FIXME */
#define atomic_set(p, v) (*(p) = (v))
#define atomic_read(p) (*(p))
#define atomic_inc(p) (*(p) += 1)
#define atomic_dec(p) (*(p) -= 1)
#define atomic_add(n, p) (*(p) += (n))
#define atomic_sub(n, p) (*(p) -= (n))
/* FIXME */
#define atomic_add_int(p, v) *(p) += v
#define atomic_subtract_int(p, v) *(p) -= v
#define atomic_set_int(p, bits) *(p) |= (bits)
#define atomic_clear_int(p, bits) *(p) &= ~(bits)
#endif /* !__NetBSD__ */
#endif /* !__FreeBSD__ */
#if defined(__NetBSD__)
static __inline atomic_t
test_and_set_bit(int b, volatile void *p)
{
int s = splhigh();
unsigned int m = 1<<b;
unsigned int r = *(volatile int *)p & m;
*(volatile int *)p |= m;
splx(s);
return r;
}
static __inline void
clear_bit(int b, volatile void *p)
{
atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
}
static __inline void
set_bit(int b, volatile void *p)
{
atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
}
static __inline int
test_bit(int b, volatile void *p)
{
return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f));
}
#elif defined(__NetBSD__)
#include <sys/atomic.h>
#define atomic_set(p, v) (*((volatile uint32_t *)p) = (v))
/* XXXMRG */
#define atomic_read(p) (*(/*(volatile uint32_t *)*/p))
#define atomic_inc(p) atomic_inc_uint(p)
#define atomic_dec(p) atomic_dec_uint(p)
#define atomic_add(v, p) atomic_add_int(p, v)
#define atomic_sub(v, p) atomic_add_int(p, -(v))
#define atomic_read(p) (*(p))
#define atomic_inc(p) atomic_inc_uint(p)
#define atomic_dec(p) atomic_dec_uint(p)
#define atomic_add(n, p) atomic_add_int(p, n)
#define atomic_sub(n, p) atomic_add_int(p, -(n))
#define atomic_add_acq_int(p, v) atomic_add(v, p)
#define atomic_subtract_acq_int(p, v) atomic_sub(v, p)
#define atomic_set_int(p, bits) atomic_or_uint(p, bits)
@ -105,82 +118,14 @@ test_and_set_bit(int b, volatile void *p)
return old & mask;
}
#else
#if !defined(__FreeBSD_version) || (__FreeBSD_version < 500000)
#if defined(__i386__)
/* The extra atomic functions from 5.0 haven't been merged to 4.x */
#endif
static __inline int
atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
{
int res = exp;
__asm __volatile (
" lock ; "
" cmpxchgl %1,%2 ; "
" setz %%al ; "
" movzbl %%al,%0 ; "
"1: "
"# atomic_cmpset_int"
: "+a" (res) /* 0 (result) */
: "r" (src), /* 1 */
"m" (*(dst)) /* 2 */
: "memory");
return (res);
}
#else /* __i386__ */
static __inline int
atomic_cmpset_int(__volatile__ int *dst, int old, int new)
{
int s = splhigh();
if (*dst==old) {
*dst = new;
splx(s);
return 1;
}
splx(s);
return 0;
}
#endif /* !__i386__ */
#endif /* !__FreeBSD_version || __FreeBSD_version < 500000 */
static __inline atomic_t
test_and_set_bit(int b, volatile void *p)
{
int s = splhigh();
unsigned int m = 1<<b;
unsigned int r = *(volatile int *)p & m;
*(volatile int *)p |= m;
splx(s);
return r;
}
static __inline void
clear_bit(int b, volatile void *p)
{
atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
}
static __inline void
set_bit(int b, volatile void *p)
{
atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
}
static __inline int
test_bit(int b, volatile void *p)
{
return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f));
}
#endif /* !__NetBSD__ */
static __inline int
find_first_zero_bit(volatile void *p, int maxbit)
find_first_zero_bit(volatile void *p, int max_)
{
int b;
volatile int *ptr = (volatile int *)p;
for (b = 0; b < maxbit; b += 32) {
for (b = 0; b < max_; b += 32) {
if (ptr[b >> 5] != ~0) {
for (;;) {
if ((ptr[b >> 5] & (1 << (b & 0x1f))) == 0)
@ -189,5 +134,5 @@ find_first_zero_bit(volatile void *p, int maxbit)
}
}
}
return maxbit;
return max_;
}

20
sys/external/bsd/drm/dist/bsd-core/drm_auth.c vendored
View File

@ -43,7 +43,7 @@ static int drm_hash_magic(drm_magic_t magic)
/**
* Returns the file private associated with the given magic number.
*/
static drm_file_t *drm_find_file(struct drm_device *dev, drm_magic_t magic)
static struct drm_file *drm_find_file(struct drm_device *dev, drm_magic_t magic)
{
drm_magic_entry_t *pt;
int hash = drm_hash_magic(magic);
@ -63,7 +63,7 @@ static drm_file_t *drm_find_file(struct drm_device *dev, drm_magic_t magic)
* Inserts the given magic number into the hash table of used magic number
* lists.
*/
static int drm_add_magic(struct drm_device *dev, drm_file_t *priv,
static int drm_add_magic(struct drm_device *dev, struct drm_file *priv,
drm_magic_t magic)
{
int hash;
@ -74,8 +74,9 @@ static int drm_add_magic(struct drm_device *dev, drm_file_t *priv,
DRM_SPINLOCK_ASSERT(&dev->dev_lock);
hash = drm_hash_magic(magic);
entry = malloc(sizeof(*entry), M_DRM, M_ZERO | M_NOWAIT);
if (!entry) return ENOMEM;
entry = malloc(sizeof(*entry), DRM_MEM_MAGIC, M_ZERO | M_NOWAIT);
if (!entry)
return ENOMEM;
entry->magic = magic;
entry->priv = priv;
entry->next = NULL;
@ -117,8 +118,7 @@ static int drm_remove_magic(struct drm_device *dev, drm_magic_t magic)
if (prev) {
prev->next = pt->next;
}
pt->priv->magic = 0;
free(pt, M_DRM);
free(pt, DRM_MEM_MAGIC);
return 0;
}
}
@ -137,9 +137,9 @@ static int drm_remove_magic(struct drm_device *dev, drm_magic_t magic)
int drm_getmagic(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
static drm_magic_t sequence = 0;
drm_auth_t *auth = data;
struct drm_auth *auth = data;
/* Find unique magic */
/* Find unique magic */
if (file_priv->magic) {
auth->magic = file_priv->magic;
} else {
@ -168,8 +168,8 @@ int drm_getmagic(struct drm_device *dev, void *data, struct drm_file *file_priv)
int drm_authmagic(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_auth_t *auth = data;
drm_file_t *priv;
struct drm_auth *auth = data;
struct drm_file *priv;
DRM_DEBUG("%u\n", auth->magic);

400
sys/external/bsd/drm/dist/bsd-core/drm_bufs.c vendored
View File

@ -32,25 +32,11 @@
* Implementation of the ioctls for setup of DRM mappings and DMA buffers.
*/
#include "drmP.h"
#if defined(__FreeBSD__)
#include "dev/pci/pcireg.h"
#endif
/*
* Compute order. Can be made faster.
*/
int drm_order(unsigned long size)
{
int order;
unsigned long tmp;
for ( order = 0, tmp = size ; tmp >>= 1 ; ++order );
if ( size & ~(1 << order) )
++order;
return order;
}
#include "drmP.h"
/* Allocation of PCI memory resources (framebuffer, registers, etc.) for
* drm_get_resource_*. Note that they are not RF_ACTIVE, so there's no virtual
@ -58,7 +44,7 @@ int drm_order(unsigned long size)
*/
static int drm_alloc_resource(struct drm_device *dev, int resource)
{
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
if (resource >= DRM_MAX_PCI_RESOURCE) {
DRM_ERROR("Resource %d too large\n", resource);
return 1;
@ -79,7 +65,6 @@ static int drm_alloc_resource(struct drm_device *dev, int resource)
DRM_ERROR("Couldn't find resource 0x%x\n", resource);
return 1;
}
#elif defined(__NetBSD__)
/* XXX This space _not_ intentionally left blank! */
#endif
@ -93,10 +78,10 @@ unsigned long drm_get_resource_start(struct drm_device *dev,
if (drm_alloc_resource(dev, resource) != 0)
return 0;
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
return rman_get_start(dev->pcir[resource]);
#elif defined(__NetBSD__)
return dev->pci_map_data[resource].base;
#elif defined(__NetBSD__)
return dev->pci_map_data[resource].base;
#endif
}
@ -106,16 +91,16 @@ unsigned long drm_get_resource_len(struct drm_device *dev,
if (drm_alloc_resource(dev, resource) != 0)
return 0;
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
return rman_get_size(dev->pcir[resource]);
#elif defined(__NetBSD__)
return dev->pci_map_data[resource].size;
#elif defined(__NetBSD__)
return dev->pci_map_data[resource].size;
#endif
}
int drm_addmap(struct drm_device * dev, unsigned long offset,
unsigned long size,
drm_map_type_t type, drm_map_flags_t flags, drm_local_map_t **map_ptr)
enum drm_map_type type, enum drm_map_flags flags, drm_local_map_t **map_ptr)
{
drm_local_map_t *map;
int align;
@ -164,8 +149,8 @@ int drm_addmap(struct drm_device * dev, unsigned long offset,
/* Allocate a new map structure, fill it in, and do any type-specific
* initialization necessary.
*/
map = malloc(sizeof(*map), M_DRM, M_ZERO | M_NOWAIT);
if ( !map ) {
map = malloc(sizeof(*map), DRM_MEM_MAPS, M_ZERO | M_NOWAIT);
if (!map) {
DRM_LOCK();
return ENOMEM;
}
@ -179,35 +164,33 @@ int drm_addmap(struct drm_device * dev, unsigned long offset,
map->mapsize = 0;
#endif
switch ( map->type ) {
switch (map->type) {
case _DRM_REGISTERS:
map->handle = drm_ioremap(dev, map);
if (!(map->flags & _DRM_WRITE_COMBINING))
break;
/* FALLTHROUGH */
case _DRM_FRAME_BUFFER:
#ifndef DRM_NO_MTRR
if (drm_mtrr_add(map->offset, map->size, DRM_MTRR_WC) == 0)
map->mtrr = 1;
#endif
break;
case _DRM_SHM:
map->handle = malloc(map->size, M_DRM, M_NOWAIT);
DRM_DEBUG( "%lu %d %p\n",
map->size, drm_order(map->size), map->handle );
if ( !map->handle ) {
free(map, M_DRM);
map->handle = malloc(map->size, DRM_MEM_MAPS, M_NOWAIT);
DRM_DEBUG("%lu %d %p\n",
map->size, drm_order(map->size), map->handle);
if (!map->handle) {
free(map, DRM_MEM_MAPS);
DRM_LOCK();
return ENOMEM;
}
map->offset = (unsigned long)map->handle;
if ( map->flags & _DRM_CONTAINS_LOCK ) {
if (map->flags & _DRM_CONTAINS_LOCK) {
/* Prevent a 2nd X Server from creating a 2nd lock */
DRM_LOCK();
if (dev->lock.hw_lock != NULL) {
DRM_UNLOCK();
free(map->handle, M_DRM);
free(map, M_DRM);
free(map->handle, DRM_MEM_MAPS);
free(map, DRM_MEM_MAPS);
return EBUSY;
}
dev->lock.hw_lock = map->handle; /* Pointer to lock */
@ -237,19 +220,18 @@ int drm_addmap(struct drm_device * dev, unsigned long offset,
}
}
if (!valid) {
free(map, M_DRM);
free(map, DRM_MEM_MAPS);
DRM_LOCK();
return EACCES;
}*/
break;
case _DRM_SCATTER_GATHER:
if (!dev->sg) {
free(map, M_DRM);
free(map, DRM_MEM_MAPS);
DRM_LOCK();
return EINVAL;
}
map->offset = map->offset + dev->sg->handle;
map->handle = (void *)(uintptr_t)map->offset;
map->offset += dev->sg->handle;
break;
case _DRM_CONSISTENT:
/* Unfortunately, we don't get any alignment specification from
@ -263,7 +245,7 @@ int drm_addmap(struct drm_device * dev, unsigned long offset,
align = PAGE_SIZE;
map->dmah = drm_pci_alloc(dev, map->size, align, 0xfffffffful);
if (map->dmah == NULL) {
free(map, M_DRM);
free(map, DRM_MEM_MAPS);
DRM_LOCK();
return ENOMEM;
}
@ -272,7 +254,7 @@ int drm_addmap(struct drm_device * dev, unsigned long offset,
break;
default:
DRM_ERROR("Bad map type %d\n", map->type);
free(map, M_DRM);
free(map, DRM_MEM_MAPS);
DRM_LOCK();
return EINVAL;
}
@ -294,7 +276,7 @@ done:
int drm_addmap_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_map_t *request = data;
struct drm_map *request = data;
drm_local_map_t *map;
int err;
@ -318,12 +300,7 @@ int drm_addmap_ioctl(struct drm_device *dev, void *data,
request->mtrr = map->mtrr;
request->handle = map->handle;
#ifdef __NetBSD__
if (DRM_HANDLE_NEEDS_MASK(request->type)) {
request->handle = (void *)DRM_NETBSD_ADDR2HANDLE((uintptr_t)map->handle);
} else
#endif
{
if (request->type != _DRM_SHM) {
request->handle = (void *)request->offset;
}
@ -338,29 +315,26 @@ void drm_rmmap(struct drm_device *dev, drm_local_map_t *map)
switch (map->type) {
case _DRM_REGISTERS:
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
if (map->bsr == NULL)
#endif
drm_ioremapfree(map);
/* FALLTHROUGH */
case _DRM_FRAME_BUFFER:
#ifndef DRM_NO_MTRR
if (map->mtrr) {
int __unused retcode;
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
retcode = drm_mtrr_del(0, map->offset, map->size,
DRM_MTRR_WC);
#else
#elif defined(__NetBSD__)
retcode = drm_mtrr_del(map->offset, map->size,
DRM_MTRR_WC);
#endif
DRM_DEBUG("mtrr_del = %d\n", retcode);
}
#endif
break;
case _DRM_SHM:
free(map->handle, M_DRM);
free(map->handle, DRM_MEM_MAPS);
break;
case _DRM_AGP:
case _DRM_SCATTER_GATHER:
@ -373,14 +347,14 @@ void drm_rmmap(struct drm_device *dev, drm_local_map_t *map)
break;
}
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
if (map->bsr != NULL) {
bus_release_resource(dev->device, SYS_RES_MEMORY, map->rid,
map->bsr);
}
#endif
free(map, M_DRM);
free(map, DRM_MEM_MAPS);
}
/* Remove a map private from list and deallocate resources if the mapping
@ -391,7 +365,7 @@ int drm_rmmap_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_local_map_t *map;
drm_map_t *request = data;
struct drm_map *request = data;
DRM_LOCK();
TAILQ_FOREACH(map, &dev->maplist, link) {
@ -423,22 +397,22 @@ static void drm_cleanup_buf_error(struct drm_device *dev,
for (i = 0; i < entry->seg_count; i++) {
drm_pci_free(dev, entry->seglist[i]);
}
free(entry->seglist, M_DRM);
free(entry->seglist, DRM_MEM_SEGS);
entry->seg_count = 0;
}
if (entry->buf_count) {
for (i = 0; i < entry->buf_count; i++) {
free(entry->buflist[i].dev_private, M_DRM);
free(entry->buflist[i].dev_private, DRM_MEM_BUFS);
}
free(entry->buflist, M_DRM);
free(entry->buflist, DRM_MEM_BUFS);
entry->buf_count = 0;
}
}
static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
static int drm_do_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request)
{
drm_device_dma_t *dma = dev->dma;
drm_buf_entry_t *entry;
@ -462,20 +436,20 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
size = 1 << order;
alignment = (request->flags & _DRM_PAGE_ALIGN)
? round_page(size) : size;
? round_page(size) : size;
page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
total = PAGE_SIZE << page_order;
byte_count = 0;
agp_offset = dev->agp->base + request->agp_start;
DRM_DEBUG( "count: %d\n", count );
DRM_DEBUG( "order: %d\n", order );
DRM_DEBUG( "size: %d\n", size );
DRM_DEBUG( "agp_offset: 0x%lx\n", agp_offset );
DRM_DEBUG( "alignment: %d\n", alignment );
DRM_DEBUG( "page_order: %d\n", page_order );
DRM_DEBUG( "total: %d\n", total );
DRM_DEBUG("count: %d\n", count);
DRM_DEBUG("order: %d\n", order);
DRM_DEBUG("size: %d\n", size);
DRM_DEBUG("agp_offset: 0x%lx\n", agp_offset);
DRM_DEBUG("alignment: %d\n", alignment);
DRM_DEBUG("page_order: %d\n", page_order);
DRM_DEBUG("total: %d\n", total);
/* Make sure buffers are located in AGP memory that we own */
/* Breaks MGA due to drm_alloc_agp not setting up entries for the
@ -499,9 +473,9 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
entry = &dma->bufs[order];
entry->buflist = malloc(count * sizeof(*entry->buflist), M_DRM,
entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS,
M_NOWAIT | M_ZERO);
if ( !entry->buflist ) {
if (!entry->buflist) {
return ENOMEM;
}
@ -510,7 +484,7 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
offset = 0;
while ( entry->buf_count < count ) {
while (entry->buf_count < count) {
buf = &entry->buflist[entry->buf_count];
buf->idx = dma->buf_count + entry->buf_count;
buf->total = alignment;
@ -524,8 +498,8 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
buf->pending = 0;
buf->file_priv = NULL;
buf->dev_priv_size = dev->driver.buf_priv_size;
buf->dev_private = malloc(buf->dev_priv_size, M_DRM,
buf->dev_priv_size = dev->driver->buf_priv_size;
buf->dev_private = malloc(buf->dev_priv_size, DRM_MEM_BUFS,
M_NOWAIT | M_ZERO);
if (buf->dev_private == NULL) {
/* Set count correctly so we free the proper amount. */
@ -539,11 +513,11 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
byte_count += PAGE_SIZE << page_order;
}
DRM_DEBUG( "byte_count: %d\n", byte_count );
DRM_DEBUG("byte_count: %d\n", byte_count);
temp_buflist = realloc(dma->buflist,
(dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), M_DRM,
M_NOWAIT);
(dma->buf_count + entry->buf_count) * sizeof(*dma->buflist),
DRM_MEM_BUFS, M_NOWAIT);
if (temp_buflist == NULL) {
/* Free the entry because it isn't valid */
drm_cleanup_buf_error(dev, entry);
@ -551,15 +525,15 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
}
dma->buflist = temp_buflist;
for ( i = 0 ; i < entry->buf_count ; i++ ) {
for (i = 0; i < entry->buf_count; i++) {
dma->buflist[i + dma->buf_count] = &entry->buflist[i];
}
dma->buf_count += entry->buf_count;
dma->byte_count += byte_count;
DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count );
DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count );
DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
request->count = entry->buf_count;
request->size = size;
@ -569,7 +543,7 @@ static int drm_do_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
return 0;
}
static int drm_do_addbufs_pci(struct drm_device *dev, drm_buf_desc_t *request)
static int drm_do_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request)
{
drm_device_dma_t *dma = dev->dma;
int count;
@ -591,72 +565,74 @@ static int drm_do_addbufs_pci(struct drm_device *dev, drm_buf_desc_t *request)
order = drm_order(request->size);
size = 1 << order;
DRM_DEBUG( "count=%d, size=%d (%d), order=%d\n",
request->count, request->size, size, order );
DRM_DEBUG("count=%d, size=%d (%d), order=%d\n",
request->count, request->size, size, order);
alignment = (request->flags & _DRM_PAGE_ALIGN)
? round_page(size) : size;
? round_page(size) : size;
page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
total = PAGE_SIZE << page_order;
entry = &dma->bufs[order];
entry->buflist = malloc(count * sizeof(*entry->buflist), M_DRM,
entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS,
M_NOWAIT | M_ZERO);
entry->seglist = malloc(count * sizeof(*entry->seglist), M_DRM,
entry->seglist = malloc(count * sizeof(*entry->seglist), DRM_MEM_SEGS,
M_NOWAIT | M_ZERO);
/* Keep the original pagelist until we know all the allocations
* have succeeded
*/
temp_pagelist = malloc((dma->page_count + (count << page_order)) *
sizeof(*dma->pagelist), M_DRM, M_NOWAIT);
sizeof(*dma->pagelist), DRM_MEM_PAGES, M_NOWAIT);
if (entry->buflist == NULL || entry->seglist == NULL ||
temp_pagelist == NULL) {
if (temp_pagelist)
free(temp_pagelist, M_DRM);
if (entry->buflist)
free(entry->buflist, M_DRM);
if (entry->seglist)
free(entry->seglist, M_DRM);
if (temp_pagelist)
free(temp_pagelist, DRM_MEM_PAGES);
if (entry->seglist)
free(entry->seglist, DRM_MEM_SEGS);
if (entry->buflist)
free(entry->buflist, DRM_MEM_BUFS);
return ENOMEM;
}
memcpy(temp_pagelist, dma->pagelist, dma->page_count *
sizeof(*dma->pagelist));
DRM_DEBUG( "pagelist: %d entries\n",
dma->page_count + (count << page_order) );
DRM_DEBUG("pagelist: %d entries\n",
dma->page_count + (count << page_order));
entry->buf_size = size;
entry->page_order = page_order;
byte_count = 0;
page_count = 0;
while ( entry->buf_count < count ) {
while (entry->buf_count < count) {
DRM_SPINUNLOCK(&dev->dma_lock);
drm_dma_handle_t *dmah = drm_pci_alloc(dev, size, alignment,
0xfffffffful);
DRM_SPINLOCK(&dev->dma_lock);
if (dmah == NULL) {
/* Set count correctly so we free the proper amount. */
entry->buf_count = count;
entry->seg_count = count;
drm_cleanup_buf_error(dev, entry);
free(temp_pagelist, M_DRM);
free(temp_pagelist, DRM_MEM_PAGES);
return ENOMEM;
}
entry->seglist[entry->seg_count++] = dmah;
for ( i = 0 ; i < (1 << page_order) ; i++ ) {
DRM_DEBUG( "page %d @ %p\n",
dma->page_count + page_count,
(char *)dmah->vaddr + PAGE_SIZE * i );
for (i = 0; i < (1 << page_order); i++) {
DRM_DEBUG("page %d @ %p\n",
dma->page_count + page_count,
(char *)dmah->vaddr + PAGE_SIZE * i);
temp_pagelist[dma->page_count + page_count++] =
(long)dmah->vaddr + PAGE_SIZE * i;
}
for ( offset = 0 ;
offset + size <= total && entry->buf_count < count ;
offset += alignment, ++entry->buf_count ) {
for (offset = 0;
offset + size <= total && entry->buf_count < count;
offset += alignment, ++entry->buf_count) {
buf = &entry->buflist[entry->buf_count];
buf->idx = dma->buf_count + entry->buf_count;
buf->total = alignment;
@ -669,43 +645,43 @@ static int drm_do_addbufs_pci(struct drm_device *dev, drm_buf_desc_t *request)
buf->pending = 0;
buf->file_priv = NULL;
buf->dev_priv_size = dev->driver.buf_priv_size;
buf->dev_private = malloc(buf->dev_priv_size, M_DRM,
M_NOWAIT | M_ZERO);
buf->dev_priv_size = dev->driver->buf_priv_size;
buf->dev_private = malloc(buf->dev_priv_size,
DRM_MEM_BUFS, M_NOWAIT | M_ZERO);
if (buf->dev_private == NULL) {
/* Set count correctly so we free the proper amount. */
entry->buf_count = count;
entry->seg_count = count;
drm_cleanup_buf_error(dev, entry);
free(temp_pagelist, M_DRM);
free(temp_pagelist, DRM_MEM_PAGES);
return ENOMEM;
}
DRM_DEBUG( "buffer %d @ %p\n",
entry->buf_count, buf->address );
DRM_DEBUG("buffer %d @ %p\n",
entry->buf_count, buf->address);
}
byte_count += PAGE_SIZE << page_order;
}
temp_buflist = realloc(dma->buflist,
(dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), M_DRM,
M_NOWAIT);
(dma->buf_count + entry->buf_count) * sizeof(*dma->buflist),
DRM_MEM_BUFS, M_NOWAIT);
if (temp_buflist == NULL) {
/* Free the entry because it isn't valid */
drm_cleanup_buf_error(dev, entry);
free(temp_pagelist, M_DRM);
free(temp_pagelist, DRM_MEM_PAGES);
return ENOMEM;
}
dma->buflist = temp_buflist;
for ( i = 0 ; i < entry->buf_count ; i++ ) {
for (i = 0; i < entry->buf_count; i++) {
dma->buflist[i + dma->buf_count] = &entry->buflist[i];
}
/* No allocations failed, so now we can replace the orginal pagelist
* with the new one.
*/
free(dma->pagelist, M_DRM);
free(dma->pagelist, DRM_MEM_PAGES);
dma->pagelist = temp_pagelist;
dma->buf_count += entry->buf_count;
@ -720,7 +696,7 @@ static int drm_do_addbufs_pci(struct drm_device *dev, drm_buf_desc_t *request)
}
static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
static int drm_do_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request)
{
drm_device_dma_t *dma = dev->dma;
drm_buf_entry_t *entry;
@ -742,24 +718,24 @@ static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
size = 1 << order;
alignment = (request->flags & _DRM_PAGE_ALIGN)
? round_page(size) : size;
? round_page(size) : size;
page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0;
total = PAGE_SIZE << page_order;
byte_count = 0;
agp_offset = request->agp_start;
DRM_DEBUG( "count: %d\n", count );
DRM_DEBUG( "order: %d\n", order );
DRM_DEBUG( "size: %d\n", size );
DRM_DEBUG( "agp_offset: %ld\n", agp_offset );
DRM_DEBUG( "alignment: %d\n", alignment );
DRM_DEBUG( "page_order: %d\n", page_order );
DRM_DEBUG( "total: %d\n", total );
DRM_DEBUG("count: %d\n", count);
DRM_DEBUG("order: %d\n", order);
DRM_DEBUG("size: %d\n", size);
DRM_DEBUG("agp_offset: %ld\n", agp_offset);
DRM_DEBUG("alignment: %d\n", alignment);
DRM_DEBUG("page_order: %d\n", page_order);
DRM_DEBUG("total: %d\n", total);
entry = &dma->bufs[order];
entry->buflist = malloc(count * sizeof(*entry->buflist), M_DRM,
entry->buflist = malloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS,
M_NOWAIT | M_ZERO);
if (entry->buflist == NULL)
return ENOMEM;
@ -769,7 +745,7 @@ static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
offset = 0;
while ( entry->buf_count < count ) {
while (entry->buf_count < count) {
buf = &entry->buflist[entry->buf_count];
buf->idx = dma->buf_count + entry->buf_count;
buf->total = alignment;
@ -783,8 +759,8 @@ static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
buf->pending = 0;
buf->file_priv = NULL;
buf->dev_priv_size = dev->driver.buf_priv_size;
buf->dev_private = malloc(buf->dev_priv_size, M_DRM,
buf->dev_priv_size = dev->driver->buf_priv_size;
buf->dev_private = malloc(buf->dev_priv_size, DRM_MEM_BUFS,
M_NOWAIT | M_ZERO);
if (buf->dev_private == NULL) {
/* Set count correctly so we free the proper amount. */
@ -793,19 +769,19 @@ static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
return ENOMEM;
}
DRM_DEBUG( "buffer %d @ %p\n",
entry->buf_count, buf->address );
DRM_DEBUG("buffer %d @ %p\n",
entry->buf_count, buf->address);
offset += alignment;
entry->buf_count++;
byte_count += PAGE_SIZE << page_order;
}
DRM_DEBUG( "byte_count: %d\n", byte_count );
DRM_DEBUG("byte_count: %d\n", byte_count);
temp_buflist = realloc(dma->buflist,
(dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), M_DRM,
M_NOWAIT);
(dma->buf_count + entry->buf_count) * sizeof(*dma->buflist),
DRM_MEM_BUFS, M_NOWAIT);
if (temp_buflist == NULL) {
/* Free the entry because it isn't valid */
drm_cleanup_buf_error(dev, entry);
@ -813,15 +789,15 @@ static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
}
dma->buflist = temp_buflist;
for ( i = 0 ; i < entry->buf_count ; i++ ) {
for (i = 0; i < entry->buf_count; i++) {
dma->buflist[i + dma->buf_count] = &entry->buflist[i];
}
dma->buf_count += entry->buf_count;
dma->byte_count += byte_count;
DRM_DEBUG( "dma->buf_count : %d\n", dma->buf_count );
DRM_DEBUG( "entry->buf_count : %d\n", entry->buf_count );
DRM_DEBUG("dma->buf_count : %d\n", dma->buf_count);
DRM_DEBUG("entry->buf_count : %d\n", entry->buf_count);
request->count = entry->buf_count;
request->size = size;
@ -831,7 +807,7 @@ static int drm_do_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
return 0;
}
int drm_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
int drm_addbufs_agp(struct drm_device *dev, struct drm_buf_desc *request)
{
int order, ret;
@ -862,7 +838,7 @@ int drm_addbufs_agp(struct drm_device *dev, drm_buf_desc_t *request)
return ret;
}
int drm_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
int drm_addbufs_sg(struct drm_device *dev, struct drm_buf_desc *request)
{
int order, ret;
@ -896,7 +872,7 @@ int drm_addbufs_sg(struct drm_device *dev, drm_buf_desc_t *request)
return ret;
}
int drm_addbufs_pci(struct drm_device *dev, drm_buf_desc_t *request)
int drm_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *request)
{
int order, ret;
@ -930,10 +906,9 @@ int drm_addbufs_pci(struct drm_device *dev, drm_buf_desc_t *request)
return ret;
}
int drm_addbufs_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
int drm_addbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_buf_desc_t *request = data;
struct drm_buf_desc *request = data;
int err;
if (request->flags & _DRM_AGP_BUFFER)
@ -949,7 +924,7 @@ int drm_addbufs_ioctl(struct drm_device *dev, void *data,
int drm_infobufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_device_dma_t *dma = dev->dma;
drm_buf_info_t *request = data;
struct drm_buf_info *request = data;
int i;
int count;
int retcode = 0;
@ -958,16 +933,17 @@ int drm_infobufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
++dev->buf_use; /* Can't allocate more after this call */
DRM_SPINUNLOCK(&dev->dma_lock);
for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) {
if ( dma->bufs[i].buf_count ) ++count;
for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) {
if (dma->bufs[i].buf_count)
++count;
}
DRM_DEBUG( "count = %d\n", count );
DRM_DEBUG("count = %d\n", count);
if ( request->count >= count ) {
for ( i = 0, count = 0 ; i < DRM_MAX_ORDER + 1 ; i++ ) {
if ( dma->bufs[i].buf_count ) {
drm_buf_desc_t from;
if (request->count >= count) {
for (i = 0, count = 0; i < DRM_MAX_ORDER + 1; i++) {
if (dma->bufs[i].buf_count) {
struct drm_buf_desc from;
from.count = dma->bufs[i].buf_count;
from.size = dma->bufs[i].buf_size;
@ -975,17 +951,16 @@ int drm_infobufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
from.high_mark = dma->bufs[i].freelist.high_mark;
if (DRM_COPY_TO_USER(&request->list[count], &from,
sizeof(drm_buf_desc_t)) != 0) {
sizeof(struct drm_buf_desc)) != 0) {
retcode = EFAULT;
break;
}
DRM_DEBUG( "%d %d %d %d %d\n",
i,
dma->bufs[i].buf_count,
dma->bufs[i].buf_size,
dma->bufs[i].freelist.low_mark,
dma->bufs[i].freelist.high_mark );
DRM_DEBUG("%d %d %d %d %d\n",
i, dma->bufs[i].buf_count,
dma->bufs[i].buf_size,
dma->bufs[i].freelist.low_mark,
dma->bufs[i].freelist.high_mark);
++count;
}
}
@ -998,11 +973,11 @@ int drm_infobufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
int drm_markbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_device_dma_t *dma = dev->dma;
drm_buf_desc_t *request = data;
struct drm_buf_desc *request = data;
int order;
DRM_DEBUG( "%d, %d, %d\n",
request->size, request->low_mark, request->high_mark );
DRM_DEBUG("%d, %d, %d\n",
request->size, request->low_mark, request->high_mark);
order = drm_order(request->size);
@ -1028,30 +1003,30 @@ int drm_markbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
int drm_freebufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_device_dma_t *dma = dev->dma;
drm_buf_free_t *request = data;
struct drm_buf_free *request = data;
int i;
int idx;
drm_buf_t *buf;
int retcode = 0;
DRM_DEBUG( "%d\n", request->count );
DRM_DEBUG("%d\n", request->count);
DRM_SPINLOCK(&dev->dma_lock);
for ( i = 0 ; i < request->count ; i++ ) {
for (i = 0; i < request->count; i++) {
if (DRM_COPY_FROM_USER(&idx, &request->list[i], sizeof(idx))) {
retcode = EFAULT;
break;
}
if ( idx < 0 || idx >= dma->buf_count ) {
DRM_ERROR( "Index %d (of %d max)\n",
idx, dma->buf_count - 1 );
if (idx < 0 || idx >= dma->buf_count) {
DRM_ERROR("Index %d (of %d max)\n",
idx, dma->buf_count - 1);
retcode = EINVAL;
break;
}
buf = dma->buflist[idx];
if ( buf->file_priv != file_priv ) {
if (buf->file_priv != file_priv) {
DRM_ERROR("Process %d freeing buffer not owned\n",
DRM_CURRENTPID);
DRM_CURRENTPID);
retcode = EINVAL;
break;
}
@ -1069,29 +1044,28 @@ int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
const int zero = 0;
vm_offset_t address;
struct vmspace *vms;
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
vm_ooffset_t foff;
vm_size_t size;
vm_offset_t vaddr;
#elif defined(__NetBSD__) || defined(__OpenBSD__)
struct vnode *vn;
#elif defined(__NetBSD__)
struct vnode *vn;
voff_t foff;
vsize_t size, rsize;
vaddr_t vaddr;
#endif /* __NetBSD__ || __OpenBSD__ */
drm_buf_map_t *request = data;
#endif
struct drm_buf_map *request = data;
int i;
#if defined(__NetBSD__) || defined(__OpenBSD__)
#if defined(__NetBSD__)
if (!vfinddev(dev->kdev, VCHR, &vn))
return 0; /* FIXME: Shouldn't this be EINVAL or something? */
#endif /* __NetBSD__ || __OpenBSD */
#if defined(__FreeBSD__) && __FreeBSD_version >= 500000
#if defined(__FreeBSD__)
vms = DRM_CURPROC->td_proc->p_vmspace;
#else
vms = DRM_CURPROC->p_vmspace;
#elif defined(__NetBSD__)
vms = DRM_CURPROC->p_vmspace;
#endif
DRM_SPINLOCK(&dev->dma_lock);
@ -1101,8 +1075,9 @@ int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
if (request->count < dma->buf_count)
goto done;
if ((dev->driver.use_agp && (dma->flags & _DRM_DMA_USE_AGP)) ||
(dev->driver.use_sg && (dma->flags & _DRM_DMA_USE_SG))) {
if ((drm_core_has_AGP(dev) && (dma->flags & _DRM_DMA_USE_AGP)) ||
(drm_core_check_feature(dev, DRIVER_SG) &&
(dma->flags & _DRM_DMA_USE_SG))) {
drm_local_map_t *map = dev->agp_buffer_map;
if (map == NULL) {
@ -1111,26 +1086,22 @@ int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
}
size = round_page(map->size);
foff = map->offset;
#ifdef __NetBSD__
if (DRM_HANDLE_NEEDS_MASK(map->type))
foff = DRM_NETBSD_ADDR2HANDLE(foff);
#endif
} else {
size = round_page(dma->byte_count),
foff = 0;
}
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
vaddr = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ);
#if __FreeBSD_version >= 600023
retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE,
VM_PROT_ALL, MAP_SHARED, OBJT_DEVICE, dev->devnode, foff);
VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, OBJT_DEVICE, dev->devnode, foff);
#else
retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE,
VM_PROT_ALL, MAP_SHARED, SLIST_FIRST(&dev->devnode->si_hlist),
VM_PROT_ALL, MAP_SHARED | MAP_NOSYNC, SLIST_FIRST(&dev->devnode->si_hlist),
foff);
#endif
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
/* XXXNETBSD */
vaddr = curlwp->l_proc->p_emul->e_vm_default_addr(curlwp->l_proc,
(vaddr_t)vms->vm_daddr, size);
@ -1139,19 +1110,13 @@ int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
retcode = uvm_mmap(&vms->vm_map, &vaddr, rsize,
UVM_PROT_READ | UVM_PROT_WRITE, UVM_PROT_ALL, MAP_SHARED,
&vn->v_uobj, foff, curproc->p_rlimit[RLIMIT_MEMLOCK].rlim_cur);
#elif defined(__OpenBSD__)
vaddr = round_page((vaddr_t)vms->vm_daddr + MAXDSIZ);
retcode = uvm_mmap(&vms->vm_map, &vaddr, size,
UVM_PROT_READ | UVM_PROT_WRITE, UVM_PROT_ALL, MAP_SHARED,
&vn->v_uobj, foff, curproc->p_rlimit[RLIMIT_MEMLOCK].rlim_cur);
#endif /* __NetBSD__ || __OpenBSD */
#endif
if (retcode)
goto done;
request->virtual = (void *)vaddr;
for ( i = 0 ; i < dma->buf_count ; i++ ) {
for (i = 0; i < dma->buf_count; i++) {
if (DRM_COPY_TO_USER(&request->list[i].idx,
&dma->buflist[i]->idx, sizeof(request->list[0].idx))) {
retcode = EFAULT;
@ -1178,7 +1143,36 @@ int drm_mapbufs(struct drm_device *dev, void *data, struct drm_file *file_priv)
done:
request->count = dma->buf_count;
DRM_DEBUG( "%d buffers, retcode = %d\n", request->count, retcode );
DRM_DEBUG("%d buffers, retcode = %d\n", request->count, retcode);
return retcode;
}
/*
* Compute order. Can be made faster.
*/
int drm_order(unsigned long size)
{
#if defined(__FreeBSD__)
int order;
if (size == 0)
return 0;
order = flsl(size) - 1;
if (size & ~(1ul << order))
++order;
return order;
#elif defined(__NetBSD__)
int order;
unsigned long tmp;
for ( order = 0, tmp = size ; tmp >>= 1 ; ++order );
if ( size & ~(1 << order) )
++order;
return order;
#endif
}

43
sys/external/bsd/drm/dist/bsd-core/drm_dma.c vendored
View File

@ -41,7 +41,7 @@
int drm_dma_setup(struct drm_device *dev)
{
dev->dma = malloc(sizeof(*dev->dma), M_DRM, M_NOWAIT | M_ZERO);
dev->dma = malloc(sizeof(*dev->dma), DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
if (dev->dma == NULL)
return ENOMEM;
@ -58,37 +58,35 @@ void drm_dma_takedown(struct drm_device *dev)
if (dma == NULL)
return;
/* Clear dma buffers */
/* Clear dma buffers */
for (i = 0; i <= DRM_MAX_ORDER; i++) {
if (dma->bufs[i].seg_count) {
DRM_DEBUG("order %d: buf_count = %d,"
" seg_count = %d\n",
i,
dma->bufs[i].buf_count,
dma->bufs[i].seg_count);
" seg_count = %d\n", i, dma->bufs[i].buf_count,
dma->bufs[i].seg_count);
for (j = 0; j < dma->bufs[i].seg_count; j++) {
drm_pci_free(dev, dma->bufs[i].seglist[j]);
}
if (dma->bufs[i].seglist)
free(dma->bufs[i].seglist, M_DRM);
if (dma->bufs[i].seglist)
free(dma->bufs[i].seglist, DRM_MEM_SEGS);
}
if (dma->bufs[i].buf_count) {
for (j = 0; j < dma->bufs[i].buf_count; j++) {
free(dma->bufs[i].buflist[j].dev_private,
M_DRM);
DRM_MEM_BUFS);
}
if (dma->bufs[i].buflist)
free(dma->bufs[i].buflist, M_DRM);
if (dma->bufs[i].buflist)
free(dma->bufs[i].buflist, DRM_MEM_BUFS);
}
}
if (dma->buflist)
free(dma->buflist, M_DRM);
if (dma->pagelist)
free(dma->pagelist, M_DRM);
if (dev->dma)
free(dev->dma, M_DRM);
if (dma->buflist)
free(dma->buflist, DRM_MEM_BUFS);
if (dma->pagelist)
free(dma->pagelist, DRM_MEM_PAGES);
if (dev->dma)
free(dev->dma, DRM_MEM_DRIVER);
dev->dma = NULL;
DRM_SPINUNINIT(&dev->dma_lock);
}
@ -96,7 +94,8 @@ void drm_dma_takedown(struct drm_device *dev)
void drm_free_buffer(struct drm_device *dev, drm_buf_t *buf)
{
if (!buf) return;
if (!buf)
return;
buf->pending = 0;
buf->file_priv= NULL;
@ -108,7 +107,9 @@ void drm_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
drm_device_dma_t *dma = dev->dma;
int i;
if (!dma) return;
if (!dma)
return;
for (i = 0; i < dma->buf_count; i++) {
if (dma->buflist[i]->file_priv == file_priv) {
switch (dma->buflist[i]->list) {
@ -130,9 +131,9 @@ void drm_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
int drm_dma(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
if (dev->driver.dma_ioctl) {
if (dev->driver->dma_ioctl) {
/* shared code returns -errno */
return -dev->driver.dma_ioctl(dev, data, file_priv);
return -dev->driver->dma_ioctl(dev, data, file_priv);
} else {
DRM_DEBUG("DMA ioctl on driver with no dma handler\n");
return EINVAL;

54
sys/external/bsd/drm/dist/bsd-core/drm_drawable.c vendored
View File

@ -68,21 +68,21 @@ drm_get_drawable_info(struct drm_device *dev, int handle)
int drm_adddraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_draw_t *draw = data;
struct drm_draw *draw = data;
struct bsd_drm_drawable_info *info;
info = drm_calloc(1, sizeof(struct bsd_drm_drawable_info),
DRM_MEM_DRAWABLE);
info = malloc(sizeof(struct bsd_drm_drawable_info), DRM_MEM_DRAWABLE,
M_NOWAIT | M_ZERO);
if (info == NULL)
return ENOMEM;
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
info->handle = alloc_unr(dev->drw_unrhdr);
#else
/* XXXJDM */
info->handle = ++dev->drw_no;
#endif
DRM_SPINLOCK(&dev->drw_lock);
#if defined(__NetBSD__)
info->handle = ++dev->drw_no;
#endif
RB_INSERT(drawable_tree, &dev->drw_head, info);
draw->handle = info->handle;
DRM_SPINUNLOCK(&dev->drw_lock);
@ -94,7 +94,7 @@ int drm_adddraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
int drm_rmdraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_draw_t *draw = (drm_draw_t *)data;
struct drm_draw *draw = (struct drm_draw *)data;
struct drm_drawable_info *info;
DRM_SPINLOCK(&dev->drw_lock);
@ -103,11 +103,12 @@ int drm_rmdraw(struct drm_device *dev, void *data, struct drm_file *file_priv)
RB_REMOVE(drawable_tree, &dev->drw_head,
(struct bsd_drm_drawable_info *)info);
DRM_SPINUNLOCK(&dev->drw_lock);
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
free_unr(dev->drw_unrhdr, draw->handle);
#endif
drm_free(info, sizeof(struct bsd_drm_drawable_info),
DRM_MEM_DRAWABLE);
if (info->rects)
free(info->rects, DRM_MEM_DRAWABLE);
free(info, DRM_MEM_DRAWABLE);
return 0;
} else {
DRM_SPINUNLOCK(&dev->drw_lock);
@ -130,9 +131,8 @@ int drm_update_draw(struct drm_device *dev, void *data,
case DRM_DRAWABLE_CLIPRECTS:
DRM_SPINLOCK(&dev->drw_lock);
if (update->num != info->num_rects) {
drm_free(info->rects,
sizeof(*info->rects) * info->num_rects,
DRM_MEM_DRAWABLE);
if (info->rects)
free(info->rects, DRM_MEM_DRAWABLE);
info->rects = NULL;
info->num_rects = 0;
}
@ -141,8 +141,8 @@ int drm_update_draw(struct drm_device *dev, void *data,
return 0;
}
if (info->rects == NULL) {
info->rects = drm_alloc(sizeof(*info->rects) *
update->num, DRM_MEM_DRAWABLE);
info->rects = malloc(sizeof(*info->rects) *
update->num, DRM_MEM_DRAWABLE, M_NOWAIT);
if (info->rects == NULL) {
DRM_SPINUNLOCK(&dev->drw_lock);
return ENOMEM;
@ -158,3 +158,25 @@ int drm_update_draw(struct drm_device *dev, void *data,
return EINVAL;
}
}
void drm_drawable_free_all(struct drm_device *dev)
{
struct bsd_drm_drawable_info *info, *next;
DRM_SPINLOCK(&dev->drw_lock);
for (info = RB_MIN(drawable_tree, &dev->drw_head);
info != NULL ; info = next) {
next = RB_NEXT(drawable_tree, &dev->drw_head, info);
RB_REMOVE(drawable_tree, &dev->drw_head,
(struct bsd_drm_drawable_info *)info);
DRM_SPINUNLOCK(&dev->drw_lock);
#if defined(__FreeBSD__)
free_unr(dev->drw_unrhdr, info->handle);
#endif
if (info->info.rects)
free(info->info.rects, DRM_MEM_DRAWABLE);
free(info, DRM_MEM_DRAWABLE);
DRM_SPINLOCK(&dev->drw_lock);
}
DRM_SPINUNLOCK(&dev->drw_lock);
}

780
sys/external/bsd/drm/dist/bsd-core/drm_drv.c vendored
View File

File diff suppressed because it is too large Load Diff

130
sys/external/bsd/drm/dist/bsd-core/drm_fops.c vendored
View File

@ -36,61 +36,30 @@
#include "drmP.h"
drm_file_t *drm_find_file_by_proc(struct drm_device *dev, DRM_STRUCTPROC *p)
{
#if defined(__NetBSD__)
int restart = 1;
struct drm_file *
drm_find_file_by_proc(struct drm_device *dev, struct proc *p)
{
uid_t uid = kauth_cred_getsvuid(p->p_cred);
pid_t pid = p->p_pid;
drm_file_t *priv;
struct drm_file *priv;
DRM_SPINLOCK_ASSERT(&dev->dev_lock);
while (restart) {
restart = 0;
TAILQ_FOREACH(priv, &dev->files, link) {
/* if the process disappeared, free the resources
* NetBSD only calls drm_close once, so this frees
* resources earlier.
*/
#if 0 /* drm_close_pid() went away. argh */
if (pfind(priv->pid) == NULL) {
drm_close_pid(dev, priv, priv->pid);
restart = 1;
break;
}
else
#endif
if (priv->pid == pid && priv->uid == uid)
return priv;
}
}
#else
#if __FreeBSD_version >= 500021
uid_t uid = p->td_ucred->cr_svuid;
pid_t pid = p->td_proc->p_pid;
#else
uid_t uid = p->p_cred->p_svuid;
pid_t pid = p->p_pid;
#endif
drm_file_t *priv;
DRM_SPINLOCK_ASSERT(&dev->dev_lock);
TAILQ_FOREACH(priv, &dev->files, link)
TAILQ_FOREACH(priv, &dev->files, link) {
if (priv->pid == pid && priv->uid == uid)
return priv;
#endif /* !__NetBSD__ */
return NULL;
}
return NULL;
}
/* drm_open_helper is called whenever a process opens /dev/drm. */
int drm_open_helper(DRM_CDEV kdev, int flags, int fmt, DRM_STRUCTPROC *p,
drm_device_t *dev)
int drm_open_helper(dev_t kdev, int flags, int fmt, struct proc *p,
struct drm_device *dev)
{
int m = minor(kdev);
drm_file_t *priv;
struct drm_file *priv;
int retcode;
if (flags & O_EXCL)
@ -104,21 +73,13 @@ int drm_open_helper(DRM_CDEV kdev, int flags, int fmt, DRM_STRUCTPROC *p,
if (priv) {
priv->refs++;
} else {
priv = malloc(sizeof(*priv), M_DRM, M_NOWAIT | M_ZERO);
priv = malloc(sizeof(*priv), DRM_MEM_FILES, M_NOWAIT | M_ZERO);
if (priv == NULL) {
DRM_UNLOCK();
return ENOMEM;
}
#if __FreeBSD_version >= 500000
priv->uid = p->td_ucred->cr_svuid;
priv->pid = p->td_proc->p_pid;
#elif defined(__NetBSD__)
priv->uid = kauth_cred_getsvuid(p->p_cred);
priv->pid = p->p_pid;
#else
priv->uid = p->p_cred->p_svuid;
priv->pid = p->p_pid;
#endif
priv->refs = 1;
priv->minor = m;
@ -127,11 +88,11 @@ int drm_open_helper(DRM_CDEV kdev, int flags, int fmt, DRM_STRUCTPROC *p,
/* for compatibility root is always authenticated */
priv->authenticated = DRM_SUSER(p);
if (dev->driver.open) {
if (dev->driver->open) {
/* shared code returns -errno */
retcode = -dev->driver.open(dev, priv);
retcode = -dev->driver->open(dev, priv);
if (retcode != 0) {
free(priv, M_DRM);
free(priv, DRM_MEM_FILES);
DRM_UNLOCK();
return retcode;
}
@ -143,12 +104,67 @@ int drm_open_helper(DRM_CDEV kdev, int flags, int fmt, DRM_STRUCTPROC *p,
TAILQ_INSERT_TAIL(&dev->files, priv, link);
}
DRM_UNLOCK();
#ifdef __FreeBSD__
kdev->si_drv1 = dev;
#endif
return 0;
}
#elif defined(__FreeBSD__)
/* drm_open_helper is called whenever a process opens /dev/drm. */
int drm_open_helper(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
struct drm_device *dev)
{
struct drm_file *priv;
int m = minor(kdev);
int retcode;
if (flags & O_EXCL)
return EBUSY; /* No exclusive opens */
dev->flags = flags;
DRM_DEBUG("pid = %d, minor = %d\n", DRM_CURRENTPID, m);
priv = malloc(sizeof(*priv), DRM_MEM_FILES, M_NOWAIT | M_ZERO);
if (priv == NULL) {
return ENOMEM;
}
retcode = devfs_set_cdevpriv(priv, drm_close);
if (retcode != 0) {
free(priv, DRM_MEM_FILES);
return retcode;
}
DRM_LOCK();
priv->dev = dev;
priv->uid = p->td_ucred->cr_svuid;
priv->pid = p->td_proc->p_pid;
priv->minor = m;
priv->ioctl_count = 0;
/* for compatibility root is always authenticated */
priv->authenticated = DRM_SUSER(p);
if (dev->driver->open) {
/* shared code returns -errno */
retcode = -dev->driver->open(dev, priv);
if (retcode != 0) {
devfs_clear_cdevpriv();
free(priv, DRM_MEM_FILES);
DRM_UNLOCK();
return retcode;
}
}
/* first opener automatically becomes master */
priv->master = TAILQ_EMPTY(&dev->files);
TAILQ_INSERT_TAIL(&dev->files, priv, link);
DRM_UNLOCK();
kdev->si_drv1 = dev;
return 0;
}
#endif
/* The drm_read and drm_poll are stubs to prevent spurious errors
* on older X Servers (4.3.0 and earlier) */

56
sys/external/bsd/drm/dist/bsd-core/drm_ioctl.c vendored
View File

@ -44,7 +44,7 @@
int drm_getunique(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_unique_t *u = data;
struct drm_unique *u = data;
if (u->unique_len >= dev->unique_len) {
if (DRM_COPY_TO_USER(u->unique, dev->unique, dev->unique_len))
@ -61,10 +61,10 @@ int drm_getunique(struct drm_device *dev, void *data,
int drm_setunique(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
#ifdef __NetBSD__
return EOPNOTSUPP;
#if defined(__NetBSD__)
return EOPNOTSUPP;
#else
drm_unique_t *u = data;
struct drm_unique *u = data;
int domain, bus, slot, func, ret;
char *busid;
@ -72,12 +72,12 @@ int drm_setunique(struct drm_device *dev, void *data,
if (!u->unique_len || u->unique_len > 1024)
return EINVAL;
busid = malloc(u->unique_len + 1, M_DRM, M_WAITOK);
busid = malloc(u->unique_len + 1, DRM_MEM_DRIVER, M_WAITOK);
if (busid == NULL)
return ENOMEM;
if (DRM_COPY_FROM_USER(busid, u->unique, u->unique_len)) {
free(busid, M_DRM);
free(busid, DRM_MEM_DRIVER);
return EFAULT;
}
busid[u->unique_len] = '\0';
@ -87,7 +87,7 @@ int drm_setunique(struct drm_device *dev, void *data,
*/
ret = sscanf(busid, "PCI:%d:%d:%d", &bus, &slot, &func);
if (ret != 3) {
free(busid, M_DRM);
free(busid, DRM_MEM_DRIVER);
return EINVAL;
}
domain = bus >> 8;
@ -97,7 +97,7 @@ int drm_setunique(struct drm_device *dev, void *data,
(bus != dev->pci_bus) ||
(slot != dev->pci_slot) ||
(func != dev->pci_func)) {
free(busid, M_DRM);
free(busid, DRM_MEM_DRIVER);
return EINVAL;
}
@ -129,7 +129,7 @@ drm_set_busid(struct drm_device *dev)
}
dev->unique_len = 20;
dev->unique = malloc(dev->unique_len + 1, M_DRM, M_NOWAIT);
dev->unique = malloc(dev->unique_len + 1, DRM_MEM_DRIVER, M_NOWAIT);
if (dev->unique == NULL) {
DRM_UNLOCK();
return ENOMEM;
@ -145,7 +145,7 @@ drm_set_busid(struct drm_device *dev)
int drm_getmap(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_map_t *map = data;
struct drm_map *map = data;
drm_local_map_t *mapinlist;
int idx;
int i = 0;
@ -159,7 +159,7 @@ int drm_getmap(struct drm_device *dev, void *data, struct drm_file *file_priv)
}
TAILQ_FOREACH(mapinlist, &dev->maplist, link) {
if (i==idx) {
if (i == idx) {
map->offset = mapinlist->offset;
map->size = mapinlist->size;
map->type = mapinlist->type;
@ -182,16 +182,15 @@ int drm_getmap(struct drm_device *dev, void *data, struct drm_file *file_priv)
int drm_getclient(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_client_t *client = data;
drm_file_t *pt;
int idx;
int i = 0;
struct drm_client *client = data;
struct drm_file *pt;
int idx;
int i = 0;
idx = client->idx;
DRM_LOCK();
TAILQ_FOREACH(pt, &dev->files, link) {
if (i==idx)
{
if (i == idx) {
client->auth = pt->authenticated;
client->pid = pt->pid;
client->uid = pt->uid;
@ -209,21 +208,20 @@ int drm_getclient(struct drm_device *dev, void *data,
int drm_getstats(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_stats_t *stats = data;
struct drm_stats *stats = data;
int i;
memset(stats, 0, sizeof(drm_stats_t));
memset(stats, 0, sizeof(struct drm_stats));
DRM_LOCK();
for (i = 0; i < dev->counters; i++) {
if (dev->types[i] == _DRM_STAT_LOCK)
stats->data[i].value
= (dev->lock.hw_lock
? dev->lock.hw_lock->lock : 0);
stats->data[i].value =
(dev->lock.hw_lock ? dev->lock.hw_lock->lock : 0);
else
stats->data[i].value = atomic_read(&dev->counts[i]);
stats->data[i].type = dev->types[i];
stats->data[i].type = dev->types[i];
}
stats->count = dev->counters;
@ -239,8 +237,8 @@ int drm_getstats(struct drm_device *dev, void *data, struct drm_file *file_priv)
int drm_setversion(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_set_version_t *sv = data;
drm_set_version_t ver;
struct drm_set_version *sv = data;
struct drm_set_version ver;
int if_version;
/* Save the incoming data, and set the response before continuing
@ -249,8 +247,8 @@ int drm_setversion(struct drm_device *dev, void *data,
ver = *sv;
sv->drm_di_major = DRM_IF_MAJOR;
sv->drm_di_minor = DRM_IF_MINOR;
sv->drm_dd_major = dev->driver.major;
sv->drm_dd_minor = dev->driver.minor;
sv->drm_dd_major = dev->driver->major;
sv->drm_dd_minor = dev->driver->minor;
if (ver.drm_di_major != -1) {
if (ver.drm_di_major != DRM_IF_MAJOR ||
@ -269,9 +267,9 @@ int drm_setversion(struct drm_device *dev, void *data,
}
if (ver.drm_dd_major != -1) {
if (ver.drm_dd_major != dev->driver.major ||
if (ver.drm_dd_major != dev->driver->major ||
ver.drm_dd_minor < 0 ||
ver.drm_dd_minor > dev->driver.minor)
ver.drm_dd_minor > dev->driver->minor)
{
return EINVAL;
}

353
sys/external/bsd/drm/dist/bsd-core/drm_irq.c vendored
View File

@ -33,16 +33,10 @@
#include "drmP.h"
#include "drm.h"
#if defined(__FreeBSD__)
static void drm_locked_task(void *context, int pending __unused);
#elif defined(__NetBSD__)
static void drm_locked_task(struct work *, void *);
#endif
int drm_irq_by_busid(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
drm_irq_busid_t *irq = data;
struct drm_irq_busid *irq = data;
if ((irq->busnum >> 8) != dev->pci_domain ||
(irq->busnum & 0xff) != dev->pci_bus ||
@ -53,32 +47,30 @@ int drm_irq_by_busid(struct drm_device *dev, void *data,
irq->irq = dev->irq;
DRM_DEBUG("%d:%d:%d => IRQ %d\n",
irq->busnum, irq->devnum, irq->funcnum, irq->irq);
irq->busnum, irq->devnum, irq->funcnum, irq->irq);
return 0;
}
#if defined(__FreeBSD__) && __FreeBSD_version >= 500000
#if defined(__FreeBSD__)
static irqreturn_t
drm_irq_handler_wrap(DRM_IRQ_ARGS)
{
struct drm_device *dev = arg;
DRM_SPINLOCK(&dev->irq_lock);
dev->driver.irq_handler(arg);
dev->driver->irq_handler(arg);
DRM_SPINUNLOCK(&dev->irq_lock);
}
#endif
#ifdef __NetBSD__
#elif defined(__NetBSD__)
static irqreturn_t
drm_irq_handler_wrap(DRM_IRQ_ARGS)
{
irqreturn_t ret;
drm_device_t *dev = (drm_device_t *)arg;
struct drm_device *dev = arg;
DRM_SPINLOCK(&dev->irq_lock);
ret = dev->driver.irq_handler(arg);
ret = dev->driver->irq_handler(arg);
DRM_SPINUNLOCK(&dev->irq_lock);
return ret;
}
@ -89,44 +81,55 @@ static void vblank_disable_fn(void *arg)
struct drm_device *dev = (struct drm_device *)arg;
int i;
#ifndef __FreeBSD__ /* XXXMRG */
mutex_enter(&dev->vbl_lock);
#if defined(__NetBSD__)
mutex_enter(&dev->vbl_lock);
#endif
if (callout_pending(&dev->vblank_disable_timer)) {
/* callout was reset */
#if defined(__NetBSD__)
mutex_exit(&dev->vbl_lock);
#endif
return;
}
if (!callout_active(&dev->vblank_disable_timer)) {
/* callout was stopped */
#if defined(__NetBSD__)
mutex_exit(&dev->vbl_lock);
#endif
return;
}
callout_deactivate(&dev->vblank_disable_timer);
if (!dev->vblank_disable_allowed)
DRM_DEBUG("vblank_disable_allowed=%d\n", dev->vblank_disable_allowed);
if (!dev->vblank_disable_allowed) {
#if defined(__NetBSD__)
mutex_exit(&dev->vbl_lock);
#endif
return;
}
for (i = 0; i < dev->num_crtcs; i++) {
if (atomic_read(&dev->vblank_refcount[i]) == 0 &&
dev->vblank_enabled[i]) {
if (atomic_read(&dev->vblank[i].refcount) == 0 &&
dev->vblank[i].enabled) {
DRM_DEBUG("disabling vblank on crtc %d\n", i);
dev->last_vblank[i] =
dev->driver.get_vblank_counter(dev, i);
dev->driver.disable_vblank(dev, i);
dev->vblank_enabled[i] = 0;
dev->vblank[i].last =
dev->driver->get_vblank_counter(dev, i);
dev->driver->disable_vblank(dev, i);
dev->vblank[i].enabled = 0;
}
}
#ifndef __FreeBSD__ /* XXXMRG */
mutex_exit(&dev->vbl_lock);
#if defined(__NetBSD__)
mutex_exit(&dev->vbl_lock);
#endif
}
static void drm_vblank_cleanup(struct drm_device *dev)
void drm_vblank_cleanup(struct drm_device *dev)
{
unsigned long irqflags;
/* Bail if the driver didn't call drm_vblank_init() */
if (dev->num_crtcs == 0)
return;
return;
DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
callout_stop(&dev->vblank_disable_timer);
@ -136,20 +139,7 @@ static void drm_vblank_cleanup(struct drm_device *dev)
vblank_disable_fn((void *)dev);
drm_free(dev->vbl_queue, sizeof(*dev->vbl_queue) * dev->num_crtcs,
DRM_MEM_DRIVER);
drm_free(dev->vbl_sigs, sizeof(*dev->vbl_sigs) * dev->num_crtcs,
DRM_MEM_DRIVER);
drm_free(dev->_vblank_count, sizeof(*dev->_vblank_count) *
dev->num_crtcs, DRM_MEM_DRIVER);
drm_free(dev->vblank_refcount, sizeof(*dev->vblank_refcount) *
dev->num_crtcs, DRM_MEM_DRIVER);
drm_free(dev->vblank_enabled, sizeof(*dev->vblank_enabled) *
dev->num_crtcs, DRM_MEM_DRIVER);
drm_free(dev->last_vblank, sizeof(*dev->last_vblank) * dev->num_crtcs,
DRM_MEM_DRIVER);
drm_free(dev->vblank_inmodeset, sizeof(*dev->vblank_inmodeset) *
dev->num_crtcs, DRM_MEM_DRIVER);
free(dev->vblank, DRM_MEM_DRIVER);
dev->num_crtcs = 0;
}
@ -158,7 +148,7 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
{
int i, ret = ENOMEM;
#ifdef __FreeBSD__ /* XXXMRG */
#if defined(__FreeBSD__)
callout_init_mtx(&dev->vblank_disable_timer, &dev->vbl_lock, 0);
#else
callout_init(&dev->vblank_disable_timer, 0);
@ -166,46 +156,19 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
atomic_set(&dev->vbl_signal_pending, 0);
dev->num_crtcs = num_crtcs;
dev->vbl_queue = drm_alloc(sizeof(wait_queue_head_t) * num_crtcs,
DRM_MEM_DRIVER);
if (!dev->vbl_queue)
dev->vblank = malloc(sizeof(struct drm_vblank_info) * num_crtcs,
DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
if (!dev->vblank)
goto err;
dev->vbl_sigs = drm_alloc(sizeof(struct drm_vbl_sig) * num_crtcs,
DRM_MEM_DRIVER);
if (!dev->vbl_sigs)
goto err;
dev->_vblank_count = drm_alloc(sizeof(atomic_t) * num_crtcs,
DRM_MEM_DRIVER);
if (!dev->_vblank_count)
goto err;
dev->vblank_refcount = drm_alloc(sizeof(atomic_t) * num_crtcs,
DRM_MEM_DRIVER);
if (!dev->vblank_refcount)
goto err;
dev->vblank_enabled = drm_calloc(num_crtcs, sizeof(int),
DRM_MEM_DRIVER);
if (!dev->vblank_enabled)
goto err;
dev->last_vblank = drm_calloc(num_crtcs, sizeof(u32), DRM_MEM_DRIVER);
if (!dev->last_vblank)
goto err;
dev->vblank_inmodeset = drm_calloc(num_crtcs, sizeof(int),
DRM_MEM_DRIVER);
if (!dev->vblank_inmodeset)
goto err;
DRM_DEBUG("\n");
/* Zero per-crtc vblank stuff */
for (i = 0; i < num_crtcs; i++) {
DRM_INIT_WAITQUEUE(&dev->vbl_queue[i]);
TAILQ_INIT(&dev->vbl_sigs[i]);
atomic_set(&dev->_vblank_count[i], 0);
atomic_set(&dev->vblank_refcount[i], 0);
DRM_INIT_WAITQUEUE(&dev->vblank[i].queue);
TAILQ_INIT(&dev->vblank[i].sigs);
atomic_set(&dev->vblank[i].count, 0);
atomic_set(&dev->vblank[i].refcount, 0);
}
dev->vblank_disable_allowed = 0;
@ -228,7 +191,7 @@ int drm_irq_install(struct drm_device *dev)
if (dev->irq == 0 || dev->dev_private == NULL)
return EINVAL;
DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
DRM_DEBUG("irq=%d\n", dev->irq);
DRM_LOCK();
if (dev->irq_enabled) {
@ -239,19 +202,12 @@ int drm_irq_install(struct drm_device *dev)
dev->context_flag = 0;
/* Before installing handler */
dev->driver.irq_preinstall(dev);
/* Before installing handler */
dev->driver->irq_preinstall(dev);
DRM_UNLOCK();
/* Install handler */
#ifdef __FreeBSD__
dev->irqrid = 0;
dev->irqr = bus_alloc_resource_any(dev->device, SYS_RES_IRQ,
&dev->irqrid, RF_SHAREABLE);
if (!dev->irqr) {
retcode = ENOENT;
goto err;
}
/* Install handler */
#if defined(__FreeBSD__)
#if __FreeBSD_version >= 700031
retcode = bus_setup_intr(dev->device, dev->irqr,
INTR_TYPE_TTY | INTR_MPSAFE,
@ -263,111 +219,75 @@ int drm_irq_install(struct drm_device *dev)
#endif
if (retcode != 0)
goto err;
#elif defined(__NetBSD__) || defined(__OpenBSD__)
#elif defined(__NetBSD__)
if (pci_intr_map(&dev->pa, &ih) != 0) {
retcode = ENOENT;
goto err;
}
#ifdef __NetBSD__
istr = pci_intr_string(dev->pa.pa_pc, ih);
#endif
dev->irqh = pci_intr_establish(&dev->pa.pa_pc, ih, IPL_TTY,
drm_irq_handler_wrap, dev);
if (!dev->irqh) {
retcode = ENOENT;
goto err;
}
#endif
#ifdef __NetBSD__
aprint_normal_dev(dev->device, "interrupting at %s\n", istr);
#endif
/* After installing handler */
/* After installing handler */
DRM_LOCK();
dev->driver.irq_postinstall(dev);
dev->driver->irq_postinstall(dev);
DRM_UNLOCK();
#ifdef __FreeBSD__
TASK_INIT(&dev->locked_task, 0, drm_locked_task, dev);
#endif
#ifdef __NetBSD__
retcode = workqueue_create(&dev->locked_task, "drmirq",
drm_locked_task, dev, PRI_NONE, IPL_VM, 0);
if (retcode)
goto err;
#endif
return 0;
err:
DRM_LOCK();
dev->irq_enabled = 0;
#ifdef __FreeBSD__
if (dev->irqrid != 0) {
bus_release_resource(dev->device, SYS_RES_IRQ, dev->irqrid,
dev->irqr);
dev->irqrid = 0;
}
#endif
DRM_UNLOCK();
return retcode;
}
int drm_irq_uninstall(struct drm_device *dev)
{
#ifdef __FreeBSD__
int irqrid;
#endif
if (!dev->irq_enabled)
return EINVAL;
dev->irq_enabled = 0;
#ifdef __FreeBSD__
irqrid = dev->irqrid;
dev->irqrid = 0;
#endif
DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
DRM_DEBUG("irq=%d\n", dev->irq);
dev->driver.irq_uninstall(dev);
dev->driver->irq_uninstall(dev);
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
DRM_UNLOCK();
bus_teardown_intr(dev->device, dev->irqr, dev->irqh);
bus_release_resource(dev->device, SYS_RES_IRQ, irqrid, dev->irqr);
DRM_LOCK();
#elif defined(__NetBSD__) || defined(__OpenBSD__)
#elif defined(__NetBSD__)
pci_intr_disestablish(&dev->pa.pa_pc, dev->irqh);
#endif
#if defined(__NetBSD__)
if (dev->locked_task) {
workqueue_destroy(dev->locked_task);
dev->locked_task = NULL;
}
#endif
drm_vblank_cleanup(dev);
return 0;
}
int drm_control(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_control_t *ctl = data;
struct drm_control *ctl = data;
int err;
switch ( ctl->func ) {
switch (ctl->func) {
case DRM_INST_HANDLER:
/* Handle drivers whose DRM used to require IRQ setup but the
* no longer does.
*/
if (!dev->driver.use_irq)
if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
return 0;
if (dev->if_version < DRM_IF_VERSION(1, 2) &&
ctl->irq != dev->irq)
return EINVAL;
return drm_irq_install(dev);
case DRM_UNINST_HANDLER:
if (!dev->driver.use_irq)
if (!drm_core_check_feature(dev, DRIVER_HAVE_IRQ))
return 0;
DRM_LOCK();
err = drm_irq_uninstall(dev);
@ -380,7 +300,7 @@ int drm_control(struct drm_device *dev, void *data, struct drm_file *file_priv)
u32 drm_vblank_count(struct drm_device *dev, int crtc)
{
return atomic_read(&dev->_vblank_count[crtc]);
return atomic_read(&dev->vblank[crtc].count);
}
static void drm_update_vblank_count(struct drm_device *dev, int crtc)
@ -394,19 +314,19 @@ static void drm_update_vblank_count(struct drm_device *dev, int crtc)
* here if the register is small or we had vblank interrupts off for
* a long time.
*/
cur_vblank = dev->driver.get_vblank_counter(dev, crtc);
diff = cur_vblank - dev->last_vblank[crtc];
if (cur_vblank < dev->last_vblank[crtc]) {
cur_vblank = dev->driver->get_vblank_counter(dev, crtc);
diff = cur_vblank - dev->vblank[crtc].last;
if (cur_vblank < dev->vblank[crtc].last) {
diff += dev->max_vblank_count;
DRM_DEBUG("last_vblank[%d]=0x%x, cur_vblank=0x%x => diff=0x%x\n",
crtc, dev->last_vblank[crtc], cur_vblank, diff);
DRM_DEBUG("vblank[%d].last=0x%x, cur_vblank=0x%x => diff=0x%x\n",
crtc, dev->vblank[crtc].last, cur_vblank, diff);
}
DRM_DEBUG("enabling vblank interrupts on crtc %d, missed %d\n",
crtc, diff);
atomic_add(diff, &dev->_vblank_count[crtc]);
atomic_add(diff, &dev->vblank[crtc].count);
}
int drm_vblank_get(struct drm_device *dev, int crtc)
@ -416,14 +336,15 @@ int drm_vblank_get(struct drm_device *dev, int crtc)
DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
/* Going from 0->1 means we have to enable interrupts again */
atomic_add_acq_int(&dev->vblank_refcount[crtc], 1);
if (dev->vblank_refcount[crtc] == 1 &&
!dev->vblank_enabled[crtc]) {
ret = dev->driver.enable_vblank(dev, crtc);
atomic_add_acq_int(&dev->vblank[crtc].refcount, 1);
DRM_DEBUG("vblank refcount = %d\n", dev->vblank[crtc].refcount);
if (dev->vblank[crtc].refcount == 1 &&
!dev->vblank[crtc].enabled) {
ret = dev->driver->enable_vblank(dev, crtc);
if (ret)
atomic_dec(&dev->vblank_refcount[crtc]);
atomic_dec(&dev->vblank[crtc].refcount);
else {
dev->vblank_enabled[crtc] = 1;
dev->vblank[crtc].enabled = 1;
drm_update_vblank_count(dev, crtc);
}
}
@ -438,13 +359,14 @@ void drm_vblank_put(struct drm_device *dev, int crtc)
DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
/* Last user schedules interrupt disable */
atomic_subtract_acq_int(&dev->vblank_refcount[crtc], 1);
if (dev->vblank_refcount[crtc] == 0)
callout_reset(&dev->vblank_disable_timer, jiffies + 5 * DRM_HZ,
#ifdef __FreeBSD__
atomic_subtract_acq_int(&dev->vblank[crtc].refcount, 1);
DRM_DEBUG("vblank refcount = %d\n", dev->vblank[crtc].refcount);
if (dev->vblank[crtc].refcount == 0)
callout_reset(&dev->vblank_disable_timer, 5 * DRM_HZ,
#if defined(__FreeBSD__)
(timeout_t *)
#endif
vblank_disable_fn, (void *)dev);
vblank_disable_fn, (void *)dev);
DRM_SPINUNLOCK_IRQRESTORE(&dev->vbl_lock, irqflags);
}
@ -455,11 +377,13 @@ int drm_modeset_ctl(struct drm_device *dev, void *data,
unsigned long irqflags;
int crtc, ret = 0;
DRM_DEBUG("num_crtcs=%d\n", dev->num_crtcs);
/* If drm_vblank_init() hasn't been called yet, just no-op */
if (!dev->num_crtcs)
goto out;
goto out;
crtc = modeset->crtc;
DRM_DEBUG("crtc=%d\n", crtc);
if (crtc >= dev->num_crtcs) {
ret = EINVAL;
goto out;
@ -474,16 +398,18 @@ int drm_modeset_ctl(struct drm_device *dev, void *data,
*/
switch (modeset->cmd) {
case _DRM_PRE_MODESET:
if (!dev->vblank_inmodeset[crtc]) {
dev->vblank_inmodeset[crtc] = 1;
DRM_DEBUG("pre-modeset\n");
if (!dev->vblank[crtc].inmodeset) {
dev->vblank[crtc].inmodeset = 1;
drm_vblank_get(dev, crtc);
}
break;
case _DRM_POST_MODESET:
if (dev->vblank_inmodeset[crtc]) {
DRM_DEBUG("post-modeset\n");
if (dev->vblank[crtc].inmodeset) {
DRM_SPINLOCK_IRQSAVE(&dev->vbl_lock, irqflags);
dev->vblank_disable_allowed = 1;
dev->vblank_inmodeset[crtc] = 0;
dev->vblank[crtc].inmodeset = 0;
DRM_SPINUNLOCK_IRQRESTORE(&dev->vbl_lock, irqflags);
drm_vblank_put(dev, crtc);
}
@ -499,9 +425,9 @@ out:
int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_wait_vblank_t *vblwait = data;
union drm_wait_vblank *vblwait = data;
unsigned int flags, seq, crtc;
int ret = 0;
int flags, seq, crtc;
if (!dev->irq_enabled)
return EINVAL;
@ -521,8 +447,10 @@ int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_pr
return EINVAL;
ret = drm_vblank_get(dev, crtc);
if (ret)
return ret;
if (ret) {
DRM_ERROR("failed to acquire vblank counter, %d\n", ret);
return ret;
}
seq = drm_vblank_count(dev, crtc);
switch (vblwait->request.type & _DRM_VBLANK_TYPES_MASK) {
@ -543,8 +471,8 @@ int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_pr
if (flags & _DRM_VBLANK_SIGNAL) {
#if 0 /* disabled */
drm_vbl_sig_t *vbl_sig = malloc(sizeof(drm_vbl_sig_t), M_DRM,
M_NOWAIT | M_ZERO);
drm_vbl_sig_t *vbl_sig = malloc(sizeof(drm_vbl_sig_t),
DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
if (vbl_sig == NULL)
return ENOMEM;
@ -561,14 +489,25 @@ int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_pr
#endif
ret = EINVAL;
} else {
DRM_LOCK();
/* shared code returns -errno */
DRM_WAIT_ON(ret, dev->vbl_queue[crtc], 3 * DRM_HZ,
((drm_vblank_count(dev, crtc)
- vblwait->request.sequence) <= (1 << 23)));
DRM_UNLOCK();
DRM_DEBUG("waiting on vblank count %d, crtc %d\n",
vblwait->request.sequence, crtc);
for ( ret = 0 ; !ret && !((drm_vblank_count(dev, crtc) -
vblwait->request.sequence) <= (1 << 23)) ; ) {
DRM_SPINLOCK(&dev->irq_lock);
if (!((drm_vblank_count(dev, crtc) -
vblwait->request.sequence) <= (1 << 23)))
#if defined(__FreeBSD__)
ret = mtx_sleep(&dev->vblank[crtc].queue,
&dev->irq_lock, PCATCH, "vblwtq",
3 * DRM_HZ);
#elif defined(__NetBSD__)
ret = mtsleep(&dev->vblank[crtc].queue,
PCATCH, "vblwtq", 3 * DRM_HZ, &dev->irq_lock);
#endif
DRM_SPINUNLOCK(&dev->irq_lock);
}
DRM_DEBUG("return = %d\n", ret);
if (ret != EINTR) {
struct timeval now;
@ -576,6 +515,10 @@ int drm_wait_vblank(struct drm_device *dev, void *data, struct drm_file *file_pr
vblwait->reply.tval_sec = now.tv_sec;
vblwait->reply.tval_usec = now.tv_usec;
vblwait->reply.sequence = drm_vblank_count(dev, crtc);
DRM_DEBUG("returning %d to client\n",
vblwait->reply.sequence);
} else {
DRM_DEBUG("vblank wait interrupted by signal\n");
}
}
@ -599,7 +542,7 @@ void drm_vbl_send_signals(struct drm_device *dev, int crtc )
while (vbl_sig != NULL) {
drm_vbl_sig_t *next = TAILQ_NEXT(vbl_sig, link);
if ( ( vbl_seq - vbl_sig->sequence ) <= (1<<23) ) {
if ((vbl_seq - vbl_sig->sequence) <= (1 << 23)) {
p = pfind(vbl_sig->pid);
if (p != NULL)
psignal(p, vbl_sig->signo);
@ -614,64 +557,8 @@ void drm_vbl_send_signals(struct drm_device *dev, int crtc )
void drm_handle_vblank(struct drm_device *dev, int crtc)
{
atomic_inc(&dev->_vblank_count[crtc]);
DRM_WAKEUP(&dev->vbl_queue[crtc]);
atomic_inc(&dev->vblank[crtc].count);
DRM_WAKEUP(&dev->vblank[crtc].queue);
drm_vbl_send_signals(dev, crtc);
}
static void
#if defined(__FreeBSD__)
drm_locked_task(void *context, int pending __unused)
#elif defined(__NetBSD__)
drm_locked_task(struct work *wk, void *context)
#endif
{
struct drm_device *dev = context;
DRM_SPINLOCK(&dev->tsk_lock);
DRM_LOCK(); /* XXX drm_lock_take() should do it's own locking */
if (dev->locked_task_call == NULL ||
drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT) == 0) {
DRM_UNLOCK();
DRM_SPINUNLOCK(&dev->tsk_lock);
return;
}
dev->lock.file_priv = NULL; /* kernel owned */
dev->lock.lock_time = jiffies;
atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
DRM_UNLOCK();
dev->locked_task_call(dev);
drm_lock_free(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
dev->locked_task_call = NULL;
DRM_SPINUNLOCK(&dev->tsk_lock);
}
void
drm_locked_tasklet(struct drm_device *dev,
void (*tasklet)(struct drm_device *dev))
{
#if defined(__NetBSD__)
static struct work drm_tasklet_wk;
#endif
DRM_SPINLOCK(&dev->tsk_lock);
if (dev->locked_task_call != NULL) {
DRM_SPINUNLOCK(&dev->tsk_lock);
return;
}
dev->locked_task_call = tasklet;
DRM_SPINUNLOCK(&dev->tsk_lock);
#if defined(__FreeBSD__)
taskqueue_enqueue(taskqueue_swi, &dev->locked_task);
#elif defined(__NetBSD__)
workqueue_enqueue(dev->locked_task, &drm_tasklet_wk, NULL);
#endif
}

188
sys/external/bsd/drm/dist/bsd-core/drm_lock.c vendored
View File

@ -49,89 +49,28 @@
#include "drmP.h"
int drm_lock_take(__volatile__ unsigned int *lock, unsigned int context)
{
unsigned int old, new;
do {
old = *lock;
if (old & _DRM_LOCK_HELD) new = old | _DRM_LOCK_CONT;
else new = context | _DRM_LOCK_HELD;
} while (!atomic_cmpset_int(lock, old, new));
if (_DRM_LOCKING_CONTEXT(old) == context) {
if (old & _DRM_LOCK_HELD) {
if (context != DRM_KERNEL_CONTEXT) {
DRM_ERROR("%d holds heavyweight lock\n",
context);
}
return 0;
}
}
if (new == (context | _DRM_LOCK_HELD)) {
/* Have lock */
return 1;
}
return 0;
}
/* This takes a lock forcibly and hands it to context. Should ONLY be used
inside *_unlock to give lock to kernel before calling *_dma_schedule. */
int drm_lock_transfer(struct drm_device *dev,
__volatile__ unsigned int *lock, unsigned int context)
{
unsigned int old, new;
dev->lock.file_priv = NULL;
do {
old = *lock;
new = context | _DRM_LOCK_HELD;
} while (!atomic_cmpset_int(lock, old, new));
return 1;
}
int drm_lock_free(struct drm_device *dev,
__volatile__ unsigned int *lock, unsigned int context)
{
unsigned int old, new;
dev->lock.file_priv = NULL;
do {
old = *lock;
new = 0;
} while (!atomic_cmpset_int(lock, old, new));
if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
DRM_ERROR("%d freed heavyweight lock held by %d\n",
context, _DRM_LOCKING_CONTEXT(old));
return 1;
}
DRM_WAKEUP_INT((void *)&dev->lock.lock_queue);
return 0;
}
int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_lock_t *lock = data;
int ret = 0;
struct drm_lock *lock = data;
int ret = 0;
if (lock->context == DRM_KERNEL_CONTEXT) {
DRM_ERROR("Process %d using kernel context %d\n",
if (lock->context == DRM_KERNEL_CONTEXT) {
DRM_ERROR("Process %d using kernel context %d\n",
DRM_CURRENTPID, lock->context);
return EINVAL;
}
return EINVAL;
}
DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
lock->context, DRM_CURRENTPID, dev->lock.hw_lock->lock,
lock->flags);
if (dev->driver.use_dma_queue && lock->context < 0)
return EINVAL;
if (drm_core_check_feature(dev, DRIVER_DMA_QUEUE) &&
lock->context < 0)
return EINVAL;
DRM_LOCK();
for (;;) {
if (drm_lock_take(&dev->lock.hw_lock->lock, lock->context)) {
if (drm_lock_take(&dev->lock, lock->context)) {
dev->lock.file_priv = file_priv;
dev->lock.lock_time = jiffies;
atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
@ -139,15 +78,12 @@ int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
}
/* Contention */
#if defined(__FreeBSD__) && __FreeBSD_version > 500000
#if defined(__FreeBSD__)
ret = mtx_sleep((void *)&dev->lock.lock_queue, &dev->dev_lock,
PZERO | PCATCH, "drmlk2", 0);
#elif defined(__NetBSD__)
ret = mtsleep((void *)&dev->lock.lock_queue, PZERO | PCATCH,
"drmlk2", 0, &dev->dev_lock);
#else
ret = tsleep((void *)&dev->lock.lock_queue, PZERO | PCATCH,
"drmlk2", 0);
PCATCH, "drmlk2", 0);
#elif defined(__NetBSD__)
ret = mtsleep((void *)&dev->lock.lock_queue, PCATCH, "drmlk2", 0,
&dev->dev_lock);
#endif
if (ret != 0)
break;
@ -160,45 +96,101 @@ int drm_lock(struct drm_device *dev, void *data, struct drm_file *file_priv)
/* XXX: Add signal blocking here */
if (dev->driver.dma_quiescent != NULL &&
if (dev->driver->dma_quiescent != NULL &&
(lock->flags & _DRM_LOCK_QUIESCENT))
dev->driver.dma_quiescent(dev);
dev->driver->dma_quiescent(dev);
return 0;
}
int drm_unlock(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_lock_t *lock = data;
struct drm_lock *lock = data;
DRM_DEBUG("%d (pid %d) requests unlock (0x%08x), flags = 0x%08x\n",
lock->context, DRM_CURRENTPID, dev->lock.hw_lock->lock,
lock->flags);
if (lock->context == DRM_KERNEL_CONTEXT) {
DRM_ERROR("Process %d using kernel context %d\n",
DRM_CURRENTPID, lock->context);
return EINVAL;
}
/* Check that the context unlock being requested actually matches
* who currently holds the lock.
*/
if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ||
_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) != lock->context)
return EINVAL;
DRM_SPINLOCK(&dev->tsk_lock);
if (dev->locked_task_call != NULL) {
dev->locked_task_call(dev);
dev->locked_task_call = NULL;
}
DRM_SPINUNLOCK(&dev->tsk_lock);
atomic_inc(&dev->counts[_DRM_STAT_UNLOCKS]);
DRM_LOCK();
drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
drm_lock_transfer(&dev->lock, DRM_KERNEL_CONTEXT);
if (drm_lock_free(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
if (drm_lock_free(&dev->lock, DRM_KERNEL_CONTEXT)) {
DRM_ERROR("\n");
}
DRM_UNLOCK();
return 0;
}
int drm_lock_take(struct drm_lock_data *lock_data, unsigned int context)
{
volatile unsigned int *lock = &lock_data->hw_lock->lock;
unsigned int old, new;
do {
old = *lock;
if (old & _DRM_LOCK_HELD)
new = old | _DRM_LOCK_CONT;
else
new = context | _DRM_LOCK_HELD;
} while (!atomic_cmpset_int(lock, old, new));
if (_DRM_LOCKING_CONTEXT(old) == context) {
if (old & _DRM_LOCK_HELD) {
if (context != DRM_KERNEL_CONTEXT) {
DRM_ERROR("%d holds heavyweight lock\n",
context);
}
return 0;
}
}
if (new == (context | _DRM_LOCK_HELD)) {
/* Have lock */
return 1;
}
return 0;
}
/* This takes a lock forcibly and hands it to context. Should ONLY be used
inside *_unlock to give lock to kernel before calling *_dma_schedule. */
int drm_lock_transfer(struct drm_lock_data *lock_data, unsigned int context)
{
volatile unsigned int *lock = &lock_data->hw_lock->lock;
unsigned int old, new;
lock_data->file_priv = NULL;
do {
old = *lock;
new = context | _DRM_LOCK_HELD;
} while (!atomic_cmpset_int(lock, old, new));
return 1;
}
int drm_lock_free(struct drm_lock_data *lock_data, unsigned int context)
{
volatile unsigned int *lock = &lock_data->hw_lock->lock;
unsigned int old, new;
lock_data->file_priv = NULL;
do {
old = *lock;
new = 0;
} while (!atomic_cmpset_int(lock, old, new));
if (_DRM_LOCK_IS_HELD(old) && _DRM_LOCKING_CONTEXT(old) != context) {
DRM_ERROR("%d freed heavyweight lock held by %d\n",
context, _DRM_LOCKING_CONTEXT(old));
return 1;
}
DRM_WAKEUP_INT((void *)&lock_data->lock_queue);
return 0;
}

110
sys/external/bsd/drm/dist/bsd-core/drm_memory.c vendored
View File

@ -53,61 +53,38 @@
# endif
#endif
#if !defined(_MODULE) || !defined(__NetBSD__)
MALLOC_DEFINE(M_DRM, "drm", "DRM Data Structures");
#endif
MALLOC_DEFINE(DRM_MEM_DMA, "drm_dma", "DRM DMA Data Structures");
MALLOC_DEFINE(DRM_MEM_SAREA, "drm_sarea", "DRM SAREA Data Structures");
MALLOC_DEFINE(DRM_MEM_DRIVER, "drm_driver", "DRM DRIVER Data Structures");
MALLOC_DEFINE(DRM_MEM_MAGIC, "drm_magic", "DRM MAGIC Data Structures");
MALLOC_DEFINE(DRM_MEM_IOCTLS, "drm_ioctls", "DRM IOCTL Data Structures");
MALLOC_DEFINE(DRM_MEM_MAPS, "drm_maps", "DRM MAP Data Structures");
MALLOC_DEFINE(DRM_MEM_BUFS, "drm_bufs", "DRM BUFFER Data Structures");
MALLOC_DEFINE(DRM_MEM_SEGS, "drm_segs", "DRM SEGMENTS Data Structures");
MALLOC_DEFINE(DRM_MEM_PAGES, "drm_pages", "DRM PAGES Data Structures");
MALLOC_DEFINE(DRM_MEM_FILES, "drm_files", "DRM FILE Data Structures");
MALLOC_DEFINE(DRM_MEM_QUEUES, "drm_queues", "DRM QUEUE Data Structures");
MALLOC_DEFINE(DRM_MEM_CMDS, "drm_cmds", "DRM COMMAND Data Structures");
MALLOC_DEFINE(DRM_MEM_MAPPINGS, "drm_mapping", "DRM MAPPING Data Structures");
MALLOC_DEFINE(DRM_MEM_BUFLISTS, "drm_buflists", "DRM BUFLISTS Data Structures");
MALLOC_DEFINE(DRM_MEM_AGPLISTS, "drm_agplists", "DRM AGPLISTS Data Structures");
MALLOC_DEFINE(DRM_MEM_CTXBITMAP, "drm_ctxbitmap",
"DRM CTXBITMAP Data Structures");
MALLOC_DEFINE(DRM_MEM_SGLISTS, "drm_sglists", "DRM SGLISTS Data Structures");
MALLOC_DEFINE(DRM_MEM_DRAWABLE, "drm_drawable", "DRM DRAWABLE Data Structures");
void drm_mem_init(void)
{
#if defined(__OpenBSD__)
malloc_type_attach(M_DRM);
#endif
}
void drm_mem_uninit(void)
{
}
void *drm_alloc(size_t size, int area)
#if defined(__NetBSD__)
static void *
drm_netbsd_ioremap(struct drm_device *dev, drm_local_map_t *map, int wc)
{
return malloc(size, M_DRM, M_NOWAIT);
}
void *drm_calloc(size_t nmemb, size_t size, int area)
{
return malloc(size * nmemb, M_DRM, M_NOWAIT | M_ZERO);
}
void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area)
{
void *pt;
pt = malloc(size, M_DRM, M_NOWAIT);
if (pt == NULL)
return NULL;
if (oldpt && oldsize) {
memcpy(pt, oldpt, oldsize);
free(oldpt, M_DRM);
}
return pt;
}
void drm_free(void *pt, size_t size, int area)
{
free(pt, M_DRM);
}
void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
{
#ifdef __FreeBSD__
return pmap_mapdev(map->offset, map->size);
#elif defined(__OpenBSD__)
map->bst = dev->pa.pa_memt;
if (bus_space_map(map->bst, map->offset, map->size,
BUS_SPACE_MAP_LINEAR, &map->bsh))
return NULL;
return bus_space_vaddr(map->bst, map->bsh);
#elif defined(__NetBSD__)
int i, reg, reason;
for(i = 0; i<DRM_MAX_PCI_RESOURCE; i++) {
reg = PCI_MAPREG_START + i*4;
@ -126,6 +103,8 @@ void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
map->bsh = dev->pci_map_data[i].bsh;
return dev->pci_map_data[i].vaddr;
}
DRM_DEBUG("ioremap%s: flags %d\n",
wc ? "_wc" : "", dev->pci_map_data[i].flags);
if ((reason = bus_space_map(map->bst, map->offset,
dev->pci_map_data[i].size,
dev->pci_map_data[i].flags, &map->bsh)))
@ -142,8 +121,9 @@ void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
dev->pci_map_data[i].bsh = map->bsh;
dev->pci_map_data[i].vaddr =
bus_space_vaddr(map->bst, map->bsh);
DRM_DEBUG("ioremap mem found: %p\n",
dev->pci_map_data[i].vaddr);
DRM_DEBUG("ioremap mem found for %lx, %lx: %p\n",
map->offset, map->size,
dev->agp_map_data[i].vaddr);
return dev->pci_map_data[i].vaddr;
}
}
@ -164,12 +144,15 @@ void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
map->bst = dev->pa.pa_memt;
dev->agp_map_data[i].mapped++;
dev->agp_map_data[i].base = map->offset;
dev->agp_map_data[i].size = map->size;
dev->agp_map_data[i].flags = BUS_SPACE_MAP_LINEAR;
dev->agp_map_data[i].maptype = PCI_MAPREG_TYPE_MEM;
map->cnt = &(dev->agp_map_data[i].mapped);
map->mapsize = dev->agp_map_data[i].size;
DRM_DEBUG("ioremap%s: flags %d\n",
wc ? "_wc" : "", dev->agp_map_data[i].flags);
rv = bus_space_map(map->bst, map->offset,
dev->agp_map_data[i].size,
dev->agp_map_data[i].flags, &map->bsh);
@ -181,7 +164,8 @@ void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
dev->agp_map_data[i].bsh = map->bsh;
dev->agp_map_data[i].vaddr =
bus_space_vaddr(map->bst, map->bsh);
DRM_DEBUG("ioremap agp mem found: %p\n",
DRM_DEBUG("ioremap agp mem found for %lx, %lx: %p\n",
map->offset, map->size,
dev->agp_map_data[i].vaddr);
return dev->agp_map_data[i].vaddr;
}
@ -191,16 +175,32 @@ void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
DRM_DEBUG("drm_ioremap failed: offset=%lx size=%lu\n",
map->offset, map->size);
return NULL;
}
#endif
void *drm_ioremap_wc(struct drm_device *dev, drm_local_map_t *map)
{
#if defined(__FreeBSD__)
return pmap_mapdev_attr(map->offset, map->size, PAT_WRITE_COMBINING);
#elif defined(__NetBSD__)
return drm_netbsd_ioremap(dev, map, 1);
#endif
}
void *drm_ioremap(struct drm_device *dev, drm_local_map_t *map)
{
#if defined(__FreeBSD__)
return pmap_mapdev(map->offset, map->size);
#elif defined(__NetBSD__)
return drm_netbsd_ioremap(dev, map, 0);
#endif
}
void drm_ioremapfree(drm_local_map_t *map)
{
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
pmap_unmapdev((vm_offset_t) map->handle, map->size);
#elif defined(__OpenBSD__)
bus_space_unmap(map->bst, map->bsh, map->size);
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
if (map->cnt == NULL) {
DRM_INFO("drm_ioremapfree called for unknown map\n");
return;
@ -213,7 +213,7 @@ void drm_ioremapfree(drm_local_map_t *map)
#endif
}
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
int
drm_mtrr_add(unsigned long offset, size_t size, int flags)
{
@ -241,8 +241,7 @@ drm_mtrr_del(int __unused handle, unsigned long offset, size_t size, int flags)
strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner));
return mem_range_attr_set(&mrdesc, &act);
}
#elif defined(__NetBSD__) || defined(__OpenBSD__)
#ifndef DRM_NO_MTRR
#elif defined(__NetBSD__)
int
drm_mtrr_add(unsigned long offset, size_t size, int flags)
{
@ -269,4 +268,3 @@ drm_mtrr_del(unsigned long offset, size_t size, int flags)
return mtrr_set(&mtrrmap, &one, NULL, MTRR_GETSET_KERNEL);
}
#endif
#endif

100
sys/external/bsd/drm/dist/bsd-core/drm_pci.c vendored
View File

@ -43,7 +43,7 @@ drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error
if (error != 0)
return;
DRM_KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count"));
KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count"));
dmah->busaddr = segs[0].ds_addr;
}
#endif
@ -58,8 +58,8 @@ drm_pci_alloc(struct drm_device *dev, size_t size,
{
drm_dma_handle_t *dmah;
int ret;
#if defined(__NetBSD__)
int nsegs;
#if defined (__NetBSD__)
int nsegs;
#endif
/* Need power-of-two alignment, so fail the allocation if it isn't. */
@ -69,89 +69,99 @@ drm_pci_alloc(struct drm_device *dev, size_t size,
return NULL;
}
dmah = malloc(sizeof(drm_dma_handle_t), M_DRM, M_ZERO | M_NOWAIT);
dmah = malloc(sizeof(drm_dma_handle_t), DRM_MEM_DMA, M_ZERO | M_NOWAIT);
if (dmah == NULL)
return NULL;
#ifdef __FreeBSD__
DRM_UNLOCK();
#if defined__FreeBSD__
/* Make sure we aren't holding locks here */
mtx_assert(&dev->dev_lock, MA_NOTOWNED);
if (mtx_owned(&dev->dev_lock))
DRM_ERROR("called while holding dev_lock\n");
mtx_assert(&dev->dma_lock, MA_NOTOWNED);
if (mtx_owned(&dev->dma_lock))
DRM_ERROR("called while holding dma_lock\n");
ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */
maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */
NULL, NULL, /* filtfunc, filtfuncargs */
size, 1, size, /* maxsize, nsegs, maxsegsize */
BUS_DMA_ALLOCNOW, NULL, NULL, /* flags, lockfunc, lockfuncargs */
0, NULL, NULL, /* flags, lockfunc, lockfuncargs */
&dmah->tag);
if (ret != 0) {
free(dmah, M_DRM);
DRM_LOCK();
free(dmah, DRM_MEM_DMA);
return NULL;
}
ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, BUS_DMA_NOWAIT,
&dmah->map);
ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr,
BUS_DMA_WAITOK | BUS_DMA_ZERO, &dmah->map);
if (ret != 0) {
bus_dma_tag_destroy(dmah->tag);
free(dmah, M_DRM);
DRM_LOCK();
free(dmah, DRM_MEM_DMA);
return NULL;
}
DRM_LOCK();
ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size,
drm_pci_busdma_callback, dmah, 0);
drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT | BUS_DMA_NOCACHE);
if (ret != 0) {
bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
bus_dma_tag_destroy(dmah->tag);
free(dmah, M_DRM);
free(dmah, DRM_MEM_DMA);
return NULL;
}
return dmah;
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
dmah->tag = dev->pa.pa_dmat;
if ((ret = bus_dmamem_alloc(dmah->tag, size, align, maxaddr,
dmah->segs, 1, &nsegs, BUS_DMA_NOWAIT)) != 0) {
printf("drm: Unable to allocate %ld bytes of DMA, error %d\n",
(long)size, ret);
goto fail;
dmah->segs, 1, &nsegs, BUS_DMA_WAITOK)) != 0) {
printf("drm: Unable to allocate %zu bytes of DMA, error %d\n",
size, ret);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return NULL;
}
/* XXX is there a better way to deal with this? */
if (nsegs != 1) {
printf("drm: bad segment count from bus_dmamem_alloc\n");
goto free;
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return NULL;
}
if ((ret = bus_dmamem_map(dmah->tag, dmah->segs, nsegs, size,
&dmah->vaddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
&dmah->vaddr, BUS_DMA_NOWAIT | BUS_DMA_COHERENT | BUS_DMA_NOCACHE)) != 0) {
printf("drm: Unable to map DMA, error %d\n", ret);
goto free;
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return NULL;
}
if ((ret = bus_dmamap_create(dmah->tag, size, 1, size, maxaddr,
BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &dmah->map)) != 0) {
BUS_DMA_NOWAIT, &dmah->map)) != 0) {
printf("drm: Unable to create DMA map, error %d\n", ret);
goto unmap;
bus_dmamem_unmap(dmah->tag, dmah->vaddr, size);
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return NULL;
}
if ((ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
size, NULL, BUS_DMA_NOWAIT)) != 0) {
size, NULL, BUS_DMA_NOWAIT | BUS_DMA_NOCACHE)) != 0) {
printf("drm: Unable to load DMA map, error %d\n", ret);
goto destroy;
bus_dmamap_destroy(dmah->tag, dmah->map);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, size);
bus_dmamem_free(dmah->tag, dmah->segs, 1);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return NULL;
}
dmah->busaddr = dmah->map->dm_segs[0].ds_addr;
dmah->size = size;
dmah->nsegs = 1;
memset(dmah->vaddr, 0, size);
#endif
return dmah;
destroy:
bus_dmamap_destroy(dmah->tag, dmah->map);
unmap:
bus_dmamem_unmap(dmah->tag, dmah->vaddr, size);
free:
bus_dmamem_free(dmah->tag, dmah->segs, 1);
fail:
dmah->tag = NULL;
free(dmah, M_DRM);
return NULL;
#endif
}
/**
@ -166,7 +176,7 @@ drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
#if defined(__FreeBSD__)
bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
bus_dma_tag_destroy(dmah->tag);
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
bus_dmamap_unload(dmah->tag, dmah->map);
bus_dmamap_destroy(dmah->tag, dmah->map);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, dmah->size);
@ -174,7 +184,7 @@ drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah)
dmah->tag = NULL;
#endif
free(dmah, M_DRM);
free(dmah, DRM_MEM_DMA);
}
/*@}*/

610
sys/external/bsd/drm/dist/bsd-core/drm_pciids.h vendored
View File

@ -1,610 +0,0 @@
/*
This file is auto-generated from the drm_pciids.txt in the DRM CVS
Please contact dri-devel@lists.sf.net to add new cards to this list
*/
#define radeon_PCI_IDS \
{0x1002, 0x3150, CHIP_RV380|RADEON_IS_MOBILITY, "ATI Radeon Mobility X600 M24"}, \
{0x1002, 0x3152, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X300 M24"}, \
{0x1002, 0x3154, CHIP_RV380|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI FireGL M24 GL"}, \
{0x1002, 0x3E50, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV380 X600"}, \
{0x1002, 0x3E54, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI FireGL V3200 RV380"}, \
{0x1002, 0x4136, CHIP_RS100|RADEON_IS_IGP, "ATI Radeon RS100 IGP 320"}, \
{0x1002, 0x4137, CHIP_RS200|RADEON_IS_IGP, "ATI Radeon RS200 IGP 340"}, \
{0x1002, 0x4144, CHIP_R300, "ATI Radeon AD 9500"}, \
{0x1002, 0x4145, CHIP_R300, "ATI Radeon AE 9700 Pro"}, \
{0x1002, 0x4146, CHIP_R300, "ATI Radeon AF R300 9600TX"}, \
{0x1002, 0x4147, CHIP_R300, "ATI FireGL AG Z1"}, \
{0x1002, 0x4148, CHIP_R350, "ATI Radeon AH 9800 SE"}, \
{0x1002, 0x4149, CHIP_R350, "ATI Radeon AI 9800"}, \
{0x1002, 0x414A, CHIP_R350, "ATI Radeon AJ 9800"}, \
{0x1002, 0x414B, CHIP_R350, "ATI FireGL AK X2"}, \
{0x1002, 0x4150, CHIP_RV350, "ATI Radeon AP 9600"}, \
{0x1002, 0x4151, CHIP_RV350, "ATI Radeon AQ 9600 SE"}, \
{0x1002, 0x4152, CHIP_RV350, "ATI Radeon AR 9600 XT"}, \
{0x1002, 0x4153, CHIP_RV350, "ATI Radeon AS 9550"}, \
{0x1002, 0x4154, CHIP_RV350, "ATI FireGL AT T2"}, \
{0x1002, 0x4155, CHIP_RV350, "ATI Radeon 9650"}, \
{0x1002, 0x4156, CHIP_RV350, "ATI FireGL AV RV360 T2"}, \
{0x1002, 0x4237, CHIP_RS200|RADEON_IS_IGP, "ATI Radeon RS250 IGP"}, \
{0x1002, 0x4242, CHIP_R200, "ATI Radeon BB R200 AIW 8500DV"}, \
{0x1002, 0x4243, CHIP_R200, "ATI Radeon BC R200"}, \
{0x1002, 0x4336, CHIP_RS100|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS100 Mobility U1"}, \
{0x1002, 0x4337, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS200 Mobility IGP 340M"}, \
{0x1002, 0x4437, CHIP_RS200|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS250 Mobility IGP"}, \
{0x1002, 0x4966, CHIP_RV250, "ATI Radeon If RV250 9000"}, \
{0x1002, 0x4967, CHIP_RV250, "ATI Radeon Ig RV250 9000"}, \
{0x1002, 0x4A48, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JH R420 X800"}, \
{0x1002, 0x4A49, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JI R420 X800 Pro"}, \
{0x1002, 0x4A4A, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JJ R420 X800 SE"}, \
{0x1002, 0x4A4B, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JK R420 X800 XT"}, \
{0x1002, 0x4A4C, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JL R420 X800"}, \
{0x1002, 0x4A4D, CHIP_R420|RADEON_NEW_MEMMAP, "ATI FireGL JM X3-256"}, \
{0x1002, 0x4A4E, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon JN R420 Mobility M18"}, \
{0x1002, 0x4A4F, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JO R420 X800 SE"}, \
{0x1002, 0x4A50, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JP R420 X800 XT PE"}, \
{0x1002, 0x4A54, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon JT R420 AIW X800 VE"}, \
{0x1002, 0x4B49, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 XT"}, \
{0x1002, 0x4B4A, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 SE"}, \
{0x1002, 0x4B4B, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 Pro"}, \
{0x1002, 0x4B4C, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R481 X850 XT PE"}, \
{0x1002, 0x4C57, CHIP_RV200|RADEON_IS_MOBILITY, "ATI Radeon LW RV200 Mobility 7500 M7"}, \
{0x1002, 0x4C58, CHIP_RV200|RADEON_IS_MOBILITY, "ATI Radeon LX RV200 Mobility FireGL 7800 M7"}, \
{0x1002, 0x4C59, CHIP_RV100|RADEON_IS_MOBILITY, "ATI Radeon LY RV100 Mobility M6"}, \
{0x1002, 0x4C5A, CHIP_RV100|RADEON_IS_MOBILITY, "ATI Radeon LZ RV100 Mobility M6"}, \
{0x1002, 0x4C64, CHIP_RV250|RADEON_IS_MOBILITY, "ATI Radeon Ld RV250 Mobility 9000 M9"}, \
{0x1002, 0x4C66, CHIP_RV250, "ATI Radeon Lf RV250 Mobility 9000 M9 / FireMV 2400 PCI"}, \
{0x1002, 0x4C67, CHIP_RV250|RADEON_IS_MOBILITY, "ATI Radeon Lg RV250 Mobility 9000 M9"}, \
{0x1002, 0x4E44, CHIP_R300, "ATI Radeon ND R300 9700 Pro"}, \
{0x1002, 0x4E45, CHIP_R300, "ATI Radeon NE R300 9500 Pro / 9700"}, \
{0x1002, 0x4E46, CHIP_R300, "ATI Radeon NF R300 9600TX"}, \
{0x1002, 0x4E47, CHIP_R300, "ATI Radeon NG R300 FireGL X1"}, \
{0x1002, 0x4E48, CHIP_R350, "ATI Radeon NH R350 9800 Pro"}, \
{0x1002, 0x4E49, CHIP_R350, "ATI Radeon NI R350 9800"}, \
{0x1002, 0x4E4A, CHIP_R350, "ATI Radeon NJ R360 9800 XT"}, \
{0x1002, 0x4E4B, CHIP_R350, "ATI FireGL NK X2"}, \
{0x1002, 0x4E50, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NP"}, \
{0x1002, 0x4E51, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NQ"}, \
{0x1002, 0x4E52, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M11 NR"}, \
{0x1002, 0x4E53, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon RV350 Mobility 9600 M10 NS"}, \
{0x1002, 0x4E54, CHIP_RV350|RADEON_IS_MOBILITY, "ATI FireGL T2/T2e"}, \
{0x1002, 0x4E56, CHIP_RV350|RADEON_IS_MOBILITY, "ATI Radeon Mobility 9550"}, \
{0x1002, 0x5144, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QD R100"}, \
{0x1002, 0x5145, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QE R100"}, \
{0x1002, 0x5146, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QF R100"}, \
{0x1002, 0x5147, CHIP_R100|RADEON_SINGLE_CRTC, "ATI Radeon QG R100"}, \
{0x1002, 0x5148, CHIP_R200, "ATI Radeon QH R200 8500"}, \
{0x1002, 0x514C, CHIP_R200, "ATI Radeon QL R200 8500 LE"}, \
{0x1002, 0x514D, CHIP_R200, "ATI Radeon QM R200 9100"}, \
{0x1002, 0x5157, CHIP_RV200, "ATI Radeon QW RV200 7500"}, \
{0x1002, 0x5158, CHIP_RV200, "ATI Radeon QX RV200 7500"}, \
{0x1002, 0x5159, CHIP_RV100, "ATI Radeon QY RV100 7000/VE"}, \
{0x1002, 0x515A, CHIP_RV100, "ATI Radeon QZ RV100 7000/VE"}, \
{0x1002, 0x515E, CHIP_RV100, "ATI ES1000 RN50"}, \
{0x1002, 0x5460, CHIP_RV380|RADEON_IS_MOBILITY, "ATI Radeon Mobility X300 M22"}, \
{0x1002, 0x5462, CHIP_RV380|RADEON_IS_MOBILITY, "ATI Radeon Mobility X600 SE M24C"}, \
{0x1002, 0x5464, CHIP_RV380|RADEON_IS_MOBILITY, "ATI FireGL M22 GL 5464"}, \
{0x1002, 0x5548, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800"}, \
{0x1002, 0x5549, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 Pro"}, \
{0x1002, 0x554A, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 XT PE"}, \
{0x1002, 0x554B, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 SE"}, \
{0x1002, 0x554C, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800 XTP"}, \
{0x1002, 0x554D, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800 XL"}, \
{0x1002, 0x554E, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800 SE"}, \
{0x1002, 0x554F, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R430 X800"}, \
{0x1002, 0x5550, CHIP_R420|RADEON_NEW_MEMMAP, "ATI FireGL V7100 R423"}, \
{0x1002, 0x5551, CHIP_R420|RADEON_NEW_MEMMAP, "ATI FireGL V5100 R423 UQ"}, \
{0x1002, 0x5552, CHIP_R420|RADEON_NEW_MEMMAP, "ATI FireGL unknown R423 UR"}, \
{0x1002, 0x5554, CHIP_R420|RADEON_NEW_MEMMAP, "ATI FireGL unknown R423 UT"}, \
{0x1002, 0x564A, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5000 M26"}, \
{0x1002, 0x564B, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5000 M26"}, \
{0x1002, 0x564F, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X700 XL M26"}, \
{0x1002, 0x5652, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X700 M26"}, \
{0x1002, 0x5653, CHIP_RV410|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon Mobility X700 M26"}, \
{0x1002, 0x5657, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon X550XTX"}, \
{0x1002, 0x5834, CHIP_RS300|RADEON_IS_IGP, "ATI Radeon RS300 9100 IGP"}, \
{0x1002, 0x5835, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY, "ATI Radeon RS300 Mobility IGP"}, \
{0x1002, 0x5954, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_IGPGART, "ATI RS480 XPRESS 200G"}, \
{0x1002, 0x5955, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon XPRESS 200M 5955"}, \
{0x1002, 0x5974, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon RS482 XPRESS 200"}, \
{0x1002, 0x5975, CHIP_RS480|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon RS485 XPRESS 1100 IGP"}, \
{0x1002, 0x5960, CHIP_RV280, "ATI Radeon RV280 9250"}, \
{0x1002, 0x5961, CHIP_RV280, "ATI Radeon RV280 9200"}, \
{0x1002, 0x5962, CHIP_RV280, "ATI Radeon RV280 9200"}, \
{0x1002, 0x5964, CHIP_RV280, "ATI Radeon RV280 9200 SE"}, \
{0x1002, 0x5965, CHIP_RV280, "ATI FireMV 2200 PCI"}, \
{0x1002, 0x5969, CHIP_RV100, "ATI ES1000 RN50"}, \
{0x1002, 0x5a41, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART, "ATI Radeon XPRESS 200 5A41 (PCIE)"}, \
{0x1002, 0x5a42, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon XPRESS 200M 5A42 (PCIE)"}, \
{0x1002, 0x5a61, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_IGPGART, "ATI Radeon RC410 XPRESS 200"}, \
{0x1002, 0x5a62, CHIP_RS400|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_IS_IGPGART, "ATI Radeon RC410 XPRESS 200M"}, \
{0x1002, 0x5b60, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV370 X300 SE"}, \
{0x1002, 0x5b62, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV370 X600 Pro"}, \
{0x1002, 0x5b63, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI Radeon RV370 X550"}, \
{0x1002, 0x5b64, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI FireGL V3100 (RV370) 5B64"}, \
{0x1002, 0x5b65, CHIP_RV380|RADEON_NEW_MEMMAP, "ATI FireMV 2200 PCIE (RV370) 5B65"}, \
{0x1002, 0x5c61, CHIP_RV280|RADEON_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \
{0x1002, 0x5c63, CHIP_RV280|RADEON_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \
{0x1002, 0x5d48, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X800 XT M28"}, \
{0x1002, 0x5d49, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5100 M28"}, \
{0x1002, 0x5d4a, CHIP_R420|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X800 M28"}, \
{0x1002, 0x5d4c, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850"}, \
{0x1002, 0x5d4d, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 XT PE"}, \
{0x1002, 0x5d4e, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 SE"}, \
{0x1002, 0x5d4f, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 Pro"}, \
{0x1002, 0x5d50, CHIP_R420|RADEON_NEW_MEMMAP, "ATI unknown Radeon / FireGL R480"}, \
{0x1002, 0x5d52, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R480 X850 XT"}, \
{0x1002, 0x5d57, CHIP_R420|RADEON_NEW_MEMMAP, "ATI Radeon R423 X800 XT"}, \
{0x1002, 0x5e48, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI FireGL V5000 RV410"}, \
{0x1002, 0x5e4a, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 XT"}, \
{0x1002, 0x5e4b, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 Pro"}, \
{0x1002, 0x5e4c, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 SE"}, \
{0x1002, 0x5e4d, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700"}, \
{0x1002, 0x5e4f, CHIP_RV410|RADEON_NEW_MEMMAP, "ATI Radeon RV410 X700 SE"}, \
{0x1002, 0x7100, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \
{0x1002, 0x7101, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1800 XT"}, \
{0x1002, 0x7102, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1800"}, \
{0x1002, 0x7103, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V7200"}, \
{0x1002, 0x7104, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V7200"}, \
{0x1002, 0x7105, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V5300"}, \
{0x1002, 0x7106, CHIP_R520|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V7100"}, \
{0x1002, 0x7108, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \
{0x1002, 0x7109, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \
{0x1002, 0x710A, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \
{0x1002, 0x710B, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \
{0x1002, 0x710C, CHIP_R520|RADEON_NEW_MEMMAP, "ATI Radeon X1800"}, \
{0x1002, 0x710E, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V7300"}, \
{0x1002, 0x710F, CHIP_R520|RADEON_NEW_MEMMAP, "ATI FireGL V7350"}, \
{0x1002, 0x7140, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \
{0x1002, 0x7141, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI RV505"}, \
{0x1002, 0x7142, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \
{0x1002, 0x7143, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550"}, \
{0x1002, 0x7144, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI M54-GL"}, \
{0x1002, 0x7145, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1400"}, \
{0x1002, 0x7146, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \
{0x1002, 0x7147, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550 64-bit"}, \
{0x1002, 0x7149, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \
{0x1002, 0x714A, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \
{0x1002, 0x714B, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \
{0x1002, 0x714C, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1300"}, \
{0x1002, 0x714D, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \
{0x1002, 0x714E, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \
{0x1002, 0x714F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI RV505"}, \
{0x1002, 0x7151, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI RV505"}, \
{0x1002, 0x7152, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI FireGL V3300"}, \
{0x1002, 0x7153, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI FireGL V3350"}, \
{0x1002, 0x715E, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \
{0x1002, 0x715F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550 64-bit"}, \
{0x1002, 0x7180, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \
{0x1002, 0x7181, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \
{0x1002, 0x7183, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \
{0x1002, 0x7186, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1450"}, \
{0x1002, 0x7187, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300/X1550"}, \
{0x1002, 0x7188, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X2300"}, \
{0x1002, 0x718A, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X2300"}, \
{0x1002, 0x718B, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1350"}, \
{0x1002, 0x718C, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1350"}, \
{0x1002, 0x718D, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1450"}, \
{0x1002, 0x718F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1300"}, \
{0x1002, 0x7193, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550"}, \
{0x1002, 0x7196, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1350"}, \
{0x1002, 0x719B, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI FireMV 2250"}, \
{0x1002, 0x719F, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X1550 64-bit"}, \
{0x1002, 0x71C0, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \
{0x1002, 0x71C1, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \
{0x1002, 0x71C2, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \
{0x1002, 0x71C3, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \
{0x1002, 0x71C4, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5200"}, \
{0x1002, 0x71C5, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1600"}, \
{0x1002, 0x71C6, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \
{0x1002, 0x71C7, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \
{0x1002, 0x71CD, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1600"}, \
{0x1002, 0x71CE, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI Radeon X1300 XT/X1600 Pro"}, \
{0x1002, 0x71D2, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI FireGL V3400"}, \
{0x1002, 0x71D4, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility FireGL V5250"}, \
{0x1002, 0x71D5, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1700"}, \
{0x1002, 0x71D6, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1700 XT"}, \
{0x1002, 0x71DA, CHIP_RV530|RADEON_NEW_MEMMAP, "ATI FireGL V5200"}, \
{0x1002, 0x71DE, CHIP_RV530|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1700"}, \
{0x1002, 0x7200, CHIP_RV515|RADEON_NEW_MEMMAP, "ATI Radeon X2300HD"}, \
{0x1002, 0x7210, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2300"}, \
{0x1002, 0x7211, CHIP_RV515|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon HD 2300"}, \
{0x1002, 0x7240, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1950"}, \
{0x1002, 0x7243, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x7244, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1950"}, \
{0x1002, 0x7245, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x7246, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x7247, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x7248, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x7249, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x724A, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x724B, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x724C, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x724D, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x724E, CHIP_R580|RADEON_NEW_MEMMAP, "ATI AMD Stream Processor"}, \
{0x1002, 0x724F, CHIP_R580|RADEON_NEW_MEMMAP, "ATI Radeon X1900"}, \
{0x1002, 0x7280, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI Radeon X1950"}, \
{0x1002, 0x7281, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \
{0x1002, 0x7283, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \
{0x1002, 0x7284, CHIP_R580|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Mobility Radeon X1900"}, \
{0x1002, 0x7287, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \
{0x1002, 0x7288, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI Radeon X1950 GT"}, \
{0x1002, 0x7289, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI RV570"}, \
{0x1002, 0x728B, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI RV570"}, \
{0x1002, 0x728C, CHIP_RV570|RADEON_NEW_MEMMAP, "ATI ATI FireGL V7400"}, \
{0x1002, 0x7290, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \
{0x1002, 0x7291, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \
{0x1002, 0x7293, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI Radeon X1650"}, \
{0x1002, 0x7297, CHIP_RV560|RADEON_NEW_MEMMAP, "ATI RV560"}, \
{0x1002, 0x7834, CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP, "ATI Radeon RS350 9000/9100 IGP"}, \
{0x1002, 0x7835, CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP, "ATI Radeon RS350 Mobility IGP"}, \
{0x1002, 0x791e, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS690 X1250 IGP"}, \
{0x1002, 0x791f, CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART, "ATI Radeon RS690 X1270 IGP"}, \
{0, 0, 0, NULL}
#define r128_PCI_IDS \
{0x1002, 0x4c45, 0, "ATI Rage 128 Mobility LE (PCI)"}, \
{0x1002, 0x4c46, 0, "ATI Rage 128 Mobility LF (AGP)"}, \
{0x1002, 0x4d46, 0, "ATI Rage 128 Mobility MF (AGP)"}, \
{0x1002, 0x4d4c, 0, "ATI Rage 128 Mobility ML (AGP)"}, \
{0x1002, 0x5041, 0, "ATI Rage 128 Pro PA (PCI)"}, \
{0x1002, 0x5042, 0, "ATI Rage 128 Pro PB (AGP)"}, \
{0x1002, 0x5043, 0, "ATI Rage 128 Pro PC (AGP)"}, \
{0x1002, 0x5044, 0, "ATI Rage 128 Pro PD (PCI)"}, \
{0x1002, 0x5045, 0, "ATI Rage 128 Pro PE (AGP)"}, \
{0x1002, 0x5046, 0, "ATI Rage 128 Pro PF (AGP)"}, \
{0x1002, 0x5047, 0, "ATI Rage 128 Pro PG (PCI)"}, \
{0x1002, 0x5048, 0, "ATI Rage 128 Pro PH (AGP)"}, \
{0x1002, 0x5049, 0, "ATI Rage 128 Pro PI (AGP)"}, \
{0x1002, 0x504A, 0, "ATI Rage 128 Pro PJ (PCI)"}, \
{0x1002, 0x504B, 0, "ATI Rage 128 Pro PK (AGP)"}, \
{0x1002, 0x504C, 0, "ATI Rage 128 Pro PL (AGP)"}, \
{0x1002, 0x504D, 0, "ATI Rage 128 Pro PM (PCI)"}, \
{0x1002, 0x504E, 0, "ATI Rage 128 Pro PN (AGP)"}, \
{0x1002, 0x504F, 0, "ATI Rage 128 Pro PO (AGP)"}, \
{0x1002, 0x5050, 0, "ATI Rage 128 Pro PP (PCI)"}, \
{0x1002, 0x5051, 0, "ATI Rage 128 Pro PQ (AGP)"}, \
{0x1002, 0x5052, 0, "ATI Rage 128 Pro PR (PCI)"}, \
{0x1002, 0x5053, 0, "ATI Rage 128 Pro PS (PCI)"}, \
{0x1002, 0x5054, 0, "ATI Rage 128 Pro PT (AGP)"}, \
{0x1002, 0x5055, 0, "ATI Rage 128 Pro PU (AGP)"}, \
{0x1002, 0x5056, 0, "ATI Rage 128 Pro PV (PCI)"}, \
{0x1002, 0x5057, 0, "ATI Rage 128 Pro PW (AGP)"}, \
{0x1002, 0x5058, 0, "ATI Rage 128 Pro PX (AGP)"}, \
{0x1002, 0x5245, 0, "ATI Rage 128 RE (PCI)"}, \
{0x1002, 0x5246, 0, "ATI Rage 128 RF (AGP)"}, \
{0x1002, 0x5247, 0, "ATI Rage 128 RG (AGP)"}, \
{0x1002, 0x524b, 0, "ATI Rage 128 RK (PCI)"}, \
{0x1002, 0x524c, 0, "ATI Rage 128 RL (AGP)"}, \
{0x1002, 0x534d, 0, "ATI Rage 128 SM (AGP)"}, \
{0x1002, 0x5446, 0, "ATI Rage 128 Pro Ultra TF (AGP)"}, \
{0x1002, 0x544C, 0, "ATI Rage 128 Pro Ultra TL (AGP)"}, \
{0x1002, 0x5452, 0, "ATI Rage 128 Pro Ultra TR (AGP)"}, \
{0, 0, 0, NULL}
#define mga_PCI_IDS \
{0x102b, 0x0520, MGA_CARD_TYPE_G200, "Matrox G200 (PCI)"}, \
{0x102b, 0x0521, MGA_CARD_TYPE_G200, "Matrox G200 (AGP)"}, \
{0x102b, 0x0525, MGA_CARD_TYPE_G400, "Matrox G400/G450 (AGP)"}, \
{0x102b, 0x2527, MGA_CARD_TYPE_G550, "Matrox G550 (AGP)"}, \
{0, 0, 0, NULL}
#define mach64_PCI_IDS \
{0x1002, 0x4749, 0, "3D Rage Pro"}, \
{0x1002, 0x4750, 0, "3D Rage Pro 215GP"}, \
{0x1002, 0x4751, 0, "3D Rage Pro 215GQ"}, \
{0x1002, 0x4742, 0, "3D Rage Pro AGP 1X/2X"}, \
{0x1002, 0x4744, 0, "3D Rage Pro AGP 1X"}, \
{0x1002, 0x4c49, 0, "3D Rage LT Pro"}, \
{0x1002, 0x4c50, 0, "3D Rage LT Pro"}, \
{0x1002, 0x4c51, 0, "3D Rage LT Pro"}, \
{0x1002, 0x4c42, 0, "3D Rage LT Pro AGP-133"}, \
{0x1002, 0x4c44, 0, "3D Rage LT Pro AGP-66"}, \
{0x1002, 0x474c, 0, "Rage XC"}, \
{0x1002, 0x474f, 0, "Rage XL"}, \
{0x1002, 0x4752, 0, "Rage XL"}, \
{0x1002, 0x4753, 0, "Rage XC"}, \
{0x1002, 0x474d, 0, "Rage XL AGP 2X"}, \
{0x1002, 0x474e, 0, "Rage XC AGP"}, \
{0x1002, 0x4c52, 0, "Rage Mobility P/M"}, \
{0x1002, 0x4c53, 0, "Rage Mobility L"}, \
{0x1002, 0x4c4d, 0, "Rage Mobility P/M AGP 2X"}, \
{0x1002, 0x4c4e, 0, "Rage Mobility L AGP 2X"}, \
{0, 0, 0, NULL}
#define sis_PCI_IDS \
{0x1039, 0x0300, 0, "SiS 300/305"}, \
{0x1039, 0x5300, 0, "SiS 540"}, \
{0x1039, 0x6300, 0, "SiS 630"}, \
{0x1039, 0x6330, SIS_CHIP_315, "SiS 661"}, \
{0x1039, 0x7300, 0, "SiS 730"}, \
{0x18CA, 0x0040, SIS_CHIP_315, "Volari V3XT/V5/V8"}, \
{0x18CA, 0x0042, SIS_CHIP_315, "Volari Unknown"}, \
{0, 0, 0, NULL}
#define tdfx_PCI_IDS \
{0x121a, 0x0003, 0, "3dfx Voodoo Banshee"}, \
{0x121a, 0x0004, 0, "3dfx Voodoo3 2000"}, \
{0x121a, 0x0005, 0, "3dfx Voodoo3 3000"}, \
{0x121a, 0x0007, 0, "3dfx Voodoo4 4500"}, \
{0x121a, 0x0009, 0, "3dfx Voodoo5 5500"}, \
{0x121a, 0x000b, 0, "3dfx Voodoo4 4200"}, \
{0, 0, 0, NULL}
#define viadrv_PCI_IDS \
{0x1106, 0x3022, 0, "VIA CLE266 3022"}, \
{0x1106, 0x3118, VIA_PRO_GROUP_A, "VIA CN400 / PM8X0"}, \
{0x1106, 0x3122, 0, "VIA CLE266"}, \
{0x1106, 0x7205, 0, "VIA KM400"}, \
{0x1106, 0x3108, 0, "VIA K8M800"}, \
{0x1106, 0x3344, 0, "VIA CN700 / VM800 / P4M800Pro"}, \
{0x1106, 0x3343, 0, "VIA P4M890"}, \
{0x1106, 0x3230, VIA_DX9_0, "VIA K8M890"}, \
{0x1106, 0x3157, VIA_PRO_GROUP_A, "VIA CX700"}, \
{0x1106, 0x3371, VIA_DX9_0, "VIA P4M900 / VN896"}, \
{0, 0, 0, NULL}
#define i810_PCI_IDS \
{0x8086, 0x7121, 0, "Intel i810 GMCH"}, \
{0x8086, 0x7123, 0, "Intel i810-DC100 GMCH"}, \
{0x8086, 0x7125, 0, "Intel i810E GMCH"}, \
{0x8086, 0x1132, 0, "Intel i815 GMCH"}, \
{0, 0, 0, NULL}
#define i830_PCI_IDS \
{0x8086, 0x3577, 0, "Intel i830M GMCH"}, \
{0x8086, 0x2562, 0, "Intel i845G GMCH"}, \
{0x8086, 0x3582, 0, "Intel i852GM/i855GM GMCH"}, \
{0x8086, 0x2572, 0, "Intel i865G GMCH"}, \
{0, 0, 0, NULL}
#define gamma_PCI_IDS \
{0x3d3d, 0x0008, 0, "3DLabs GLINT Gamma G1"}, \
{0, 0, 0, NULL}
#define savage_PCI_IDS \
{0x5333, 0x8a20, S3_SAVAGE3D, "Savage 3D"}, \
{0x5333, 0x8a21, S3_SAVAGE3D, "Savage 3D/MV"}, \
{0x5333, 0x8a22, S3_SAVAGE4, "Savage4"}, \
{0x5333, 0x8a23, S3_SAVAGE4, "Savage4"}, \
{0x5333, 0x8c10, S3_SAVAGE_MX, "Savage/MX-MV"}, \
{0x5333, 0x8c11, S3_SAVAGE_MX, "Savage/MX"}, \
{0x5333, 0x8c12, S3_SAVAGE_MX, "Savage/IX-MV"}, \
{0x5333, 0x8c13, S3_SAVAGE_MX, "Savage/IX"}, \
{0x5333, 0x8c22, S3_SUPERSAVAGE, "SuperSavage MX/128"}, \
{0x5333, 0x8c24, S3_SUPERSAVAGE, "SuperSavage MX/64"}, \
{0x5333, 0x8c26, S3_SUPERSAVAGE, "SuperSavage MX/64C"}, \
{0x5333, 0x8c2a, S3_SUPERSAVAGE, "SuperSavage IX/128 SDR"}, \
{0x5333, 0x8c2b, S3_SUPERSAVAGE, "SuperSavage IX/128 DDR"}, \
{0x5333, 0x8c2c, S3_SUPERSAVAGE, "SuperSavage IX/64 SDR"}, \
{0x5333, 0x8c2d, S3_SUPERSAVAGE, "SuperSavage IX/64 DDR"}, \
{0x5333, 0x8c2e, S3_SUPERSAVAGE, "SuperSavage IX/C SDR"}, \
{0x5333, 0x8c2f, S3_SUPERSAVAGE, "SuperSavage IX/C DDR"}, \
{0x5333, 0x8a25, S3_PROSAVAGE, "ProSavage PM133"}, \
{0x5333, 0x8a26, S3_PROSAVAGE, "ProSavage KM133"}, \
{0x5333, 0x8d01, S3_TWISTER, "ProSavage Twister PN133"}, \
{0x5333, 0x8d02, S3_TWISTER, "ProSavage Twister KN133"}, \
{0x5333, 0x8d03, S3_PROSAVAGEDDR, "ProSavage DDR"}, \
{0x5333, 0x8d04, S3_PROSAVAGEDDR, "ProSavage DDR-K"}, \
{0, 0, 0, NULL}
#define ffb_PCI_IDS \
{0, 0, 0, NULL}
#define i915_PCI_IDS \
{0x8086, 0x3577, CHIP_I8XX, "Intel i830M GMCH"}, \
{0x8086, 0x2562, CHIP_I8XX, "Intel i845G GMCH"}, \
{0x8086, 0x3582, CHIP_I8XX, "Intel i852GM/i855GM GMCH"}, \
{0x8086, 0x2572, CHIP_I8XX, "Intel i865G GMCH"}, \
{0x8086, 0x2582, CHIP_I9XX|CHIP_I915, "Intel i915G"}, \
{0x8086, 0x258a, CHIP_I9XX|CHIP_I915, "Intel E7221 (i915)"}, \
{0x8086, 0x2592, CHIP_I9XX|CHIP_I915, "Intel i915GM"}, \
{0x8086, 0x2772, CHIP_I9XX|CHIP_I915, "Intel i945G"}, \
{0x8086, 0x27A2, CHIP_I9XX|CHIP_I915, "Intel i945GM"}, \
{0x8086, 0x27AE, CHIP_I9XX|CHIP_I915, "Intel i945GME"}, \
{0x8086, 0x2972, CHIP_I9XX|CHIP_I965, "Intel i946GZ"}, \
{0x8086, 0x2982, CHIP_I9XX|CHIP_I965, "Intel i965G"}, \
{0x8086, 0x2992, CHIP_I9XX|CHIP_I965, "Intel i965Q"}, \
{0x8086, 0x29A2, CHIP_I9XX|CHIP_I965, "Intel i965G"}, \
{0x8086, 0x2A02, CHIP_I9XX|CHIP_I965, "Intel i965GM"}, \
{0x8086, 0x2A12, CHIP_I9XX|CHIP_I965, "Intel i965GME/GLE"}, \
{0x8086, 0x29C2, CHIP_I9XX|CHIP_I915, "Intel G33"}, \
{0x8086, 0x29B2, CHIP_I9XX|CHIP_I915, "Intel Q35"}, \
{0x8086, 0x29D2, CHIP_I9XX|CHIP_I915, "Intel Q33"}, \
{0x8086, 0x2A42, CHIP_I9XX|CHIP_I965, "Intel Integrated Graphics Device"}, \
{0x8086, 0x2E02, CHIP_I9XX|CHIP_I965, "Intel Integrated Graphics Device"}, \
{0x8086, 0x2E12, CHIP_I9XX|CHIP_I965, "Intel Q45/Q43"}, \
{0x8086, 0x2E22, CHIP_I9XX|CHIP_I965, "Intel G45/G43"}, \
{0, 0, 0, NULL}
#define imagine_PCI_IDS \
{0x105d, 0x2309, IMAGINE_128, "Imagine 128"}, \
{0x105d, 0x2339, IMAGINE_128_2, "Imagine 128-II"}, \
{0x105d, 0x493d, IMAGINE_T2R, "Ticket to Ride"}, \
{0x105d, 0x5348, IMAGINE_REV4, "Revolution IV"}, \
{0, 0, 0, NULL}
#define nv_PCI_IDS \
{0x10DE, 0x0020, NV04, "NVidia RIVA TNT"}, \
{0x10DE, 0x0028, NV04, "NVidia RIVA TNT2"}, \
{0x10DE, 0x002A, NV04, "NVidia Unknown TNT2"}, \
{0x10DE, 0x002C, NV04, "NVidia Vanta"}, \
{0x10DE, 0x0029, NV04, "NVidia RIVA TNT2 Ultra"}, \
{0x10DE, 0x002D, NV04, "NVidia RIVA TNT2 Model 64"}, \
{0x10DE, 0x00A0, NV04, "NVidia Aladdin TNT2"}, \
{0x10DE, 0x0100, NV10, "NVidia GeForce 256"}, \
{0x10DE, 0x0101, NV10, "NVidia GeForce DDR"}, \
{0x10DE, 0x0103, NV10, "NVidia Quadro"}, \
{0x10DE, 0x0110, NV10, "NVidia GeForce2 MX/MX 400"}, \
{0x10DE, 0x0111, NV10, "NVidia GeForce2 MX 100/200"}, \
{0x10DE, 0x0112, NV10, "NVidia GeForce2 Go"}, \
{0x10DE, 0x0113, NV10, "NVidia Quadro2 MXR/EX/Go"}, \
{0x10DE, 0x0150, NV10, "NVidia GeForce2 GTS"}, \
{0x10DE, 0x0151, NV10, "NVidia GeForce2 Ti"}, \
{0x10DE, 0x0152, NV10, "NVidia GeForce2 Ultra"}, \
{0x10DE, 0x0153, NV10, "NVidia Quadro2 Pro"}, \
{0x10DE, 0x0170, NV10, "NVidia GeForce4 MX 460"}, \
{0x10DE, 0x0171, NV10, "NVidia GeForce4 MX 440"}, \
{0x10DE, 0x0172, NV10, "NVidia GeForce4 MX 420"}, \
{0x10DE, 0x0173, NV10, "NVidia GeForce4 MX 440-SE"}, \
{0x10DE, 0x0174, NV10, "NVidia GeForce4 440 Go"}, \
{0x10DE, 0x0175, NV10, "NVidia GeForce4 420 Go"}, \
{0x10DE, 0x0176, NV10, "NVidia GeForce4 420 Go 32M"}, \
{0x10DE, 0x0177, NV10, "NVidia GeForce4 460 Go"}, \
{0x10DE, 0x0178, NV10, "NVidia Quadro4 550 XGL"}, \
{0x10DE, 0x0179, NV10, "NVidia GeForce4"}, \
{0x10DE, 0x017A, NV10, "NVidia Quadro4 NVS"}, \
{0x10DE, 0x017C, NV10, "NVidia Quadro4 500 GoGL"}, \
{0x10DE, 0x017D, NV10, "NVidia GeForce4 410 Go 16M"}, \
{0x10DE, 0x0181, NV10, "NVidia GeForce4 MX 440 with AGP8X"}, \
{0x10DE, 0x0182, NV10, "NVidia GeForce4 MX 440SE with AGP8X"}, \
{0x10DE, 0x0183, NV10, "NVidia GeForce4 MX 420 with AGP8X"}, \
{0x10DE, 0x0185, NV10, "NVidia GeForce4 MX 4000"}, \
{0x10DE, 0x0186, NV10, "NVidia GeForce4 448 Go"}, \
{0x10DE, 0x0187, NV10, "NVidia GeForce4 488 Go"}, \
{0x10DE, 0x0188, NV10, "NVidia Quadro4 580 XGL"}, \
{0x10DE, 0x0189, NV10, "NVidia GeForce4 MX with AGP8X (Mac)"}, \
{0x10DE, 0x018A, NV10, "NVidia Quadro4 280 NVS"}, \
{0x10DE, 0x018B, NV10, "NVidia Quadro4 380 XGL"}, \
{0x10DE, 0x018C, NV10, "NVidia Quadro NVS 50 PCI"}, \
{0x10DE, 0x018D, NV10, "NVidia GeForce4 448 Go"}, \
{0x10DE, 0x01A0, NV10, "NVidia GeForce2 Integrated GPU"}, \
{0x10DE, 0x01F0, NV10, "NVidia GeForce4 MX Integrated GPU"}, \
{0x10DE, 0x0200, NV20, "NVidia GeForce3"}, \
{0x10DE, 0x0201, NV20, "NVidia GeForce3 Ti 200"}, \
{0x10DE, 0x0202, NV20, "NVidia GeForce3 Ti 500"}, \
{0x10DE, 0x0203, NV20, "NVidia Quadro DCC"}, \
{0x10DE, 0x0250, NV20, "NVidia GeForce4 Ti 4600"}, \
{0x10DE, 0x0251, NV20, "NVidia GeForce4 Ti 4400"}, \
{0x10DE, 0x0252, NV20, "NVidia 0x0252"}, \
{0x10DE, 0x0253, NV20, "NVidia GeForce4 Ti 4200"}, \
{0x10DE, 0x0258, NV20, "NVidia Quadro4 900 XGL"}, \
{0x10DE, 0x0259, NV20, "NVidia Quadro4 750 XGL"}, \
{0x10DE, 0x025B, NV20, "NVidia Quadro4 700 XGL"}, \
{0x10DE, 0x0280, NV20, "NVidia GeForce4 Ti 4800"}, \
{0x10DE, 0x0281, NV20, "NVidia GeForce4 Ti 4200 with AGP8X"}, \
{0x10DE, 0x0282, NV20, "NVidia GeForce4 Ti 4800 SE"}, \
{0x10DE, 0x0286, NV20, "NVidia GeForce4 4200 Go"}, \
{0x10DE, 0x028C, NV20, "NVidia Quadro4 700 GoGL"}, \
{0x10DE, 0x0288, NV20, "NVidia Quadro4 980 XGL"}, \
{0x10DE, 0x0289, NV20, "NVidia Quadro4 780 XGL"}, \
{0x10DE, 0x0301, NV30, "NVidia GeForce FX 5800 Ultra"}, \
{0x10DE, 0x0302, NV30, "NVidia GeForce FX 5800"}, \
{0x10DE, 0x0308, NV30, "NVidia Quadro FX 2000"}, \
{0x10DE, 0x0309, NV30, "NVidia Quadro FX 1000"}, \
{0x10DE, 0x0311, NV30, "NVidia GeForce FX 5600 Ultra"}, \
{0x10DE, 0x0312, NV30, "NVidia GeForce FX 5600"}, \
{0x10DE, 0x0313, NV30, "NVidia 0x0313"}, \
{0x10DE, 0x0314, NV30, "NVidia GeForce FX 5600SE"}, \
{0x10DE, 0x0316, NV30, "NVidia 0x0316"}, \
{0x10DE, 0x0317, NV30, "NVidia 0x0317"}, \
{0x10DE, 0x031A, NV30, "NVidia GeForce FX Go5600"}, \
{0x10DE, 0x031B, NV30, "NVidia GeForce FX Go5650"}, \
{0x10DE, 0x031C, NV30, "NVidia Quadro FX Go700"}, \
{0x10DE, 0x031D, NV30, "NVidia 0x031D"}, \
{0x10DE, 0x031E, NV30, "NVidia 0x031E"}, \
{0x10DE, 0x031F, NV30, "NVidia 0x031F"}, \
{0x10DE, 0x0320, NV30, "NVidia GeForce FX 5200"}, \
{0x10DE, 0x0321, NV30, "NVidia GeForce FX 5200 Ultra"}, \
{0x10DE, 0x0322, NV30, "NVidia GeForce FX 5200"}, \
{0x10DE, 0x0323, NV30, "NVidia GeForce FX 5200SE"}, \
{0x10DE, 0x0324, NV30, "NVidia GeForce FX Go5200"}, \
{0x10DE, 0x0325, NV30, "NVidia GeForce FX Go5250"}, \
{0x10DE, 0x0326, NV30, "NVidia GeForce FX 5500"}, \
{0x10DE, 0x0327, NV30, "NVidia GeForce FX 5100"}, \
{0x10DE, 0x0328, NV30, "NVidia GeForce FX Go5200 32M/64M"}, \
{0x10DE, 0x0329, NV30, "NVidia GeForce FX 5200 (Mac)"}, \
{0x10DE, 0x032A, NV30, "NVidia Quadro NVS 280 PCI"}, \
{0x10DE, 0x032B, NV30, "NVidia Quadro FX 500/600 PCI"}, \
{0x10DE, 0x032C, NV30, "NVidia GeForce FX Go53xx Series"}, \
{0x10DE, 0x032D, NV30, "NVidia GeForce FX Go5100"}, \
{0x10DE, 0x032F, NV30, "NVidia 0x032F"}, \
{0x10DE, 0x0330, NV30, "NVidia GeForce FX 5900 Ultra"}, \
{0x10DE, 0x0331, NV30, "NVidia GeForce FX 5900"}, \
{0x10DE, 0x0332, NV30, "NVidia GeForce FX 5900XT"}, \
{0x10DE, 0x0333, NV30, "NVidia GeForce FX 5950 Ultra"}, \
{0x10DE, 0x033F, NV30, "NVidia Quadro FX 700"}, \
{0x10DE, 0x0334, NV30, "NVidia GeForce FX 5900ZT"}, \
{0x10DE, 0x0338, NV30, "NVidia Quadro FX 3000"}, \
{0x10DE, 0x0341, NV30, "NVidia GeForce FX 5700 Ultra"}, \
{0x10DE, 0x0342, NV30, "NVidia GeForce FX 5700"}, \
{0x10DE, 0x0343, NV30, "NVidia GeForce FX 5700LE"}, \
{0x10DE, 0x0344, NV30, "NVidia GeForce FX 5700VE"}, \
{0x10DE, 0x0345, NV30, "NVidia 0x0345"}, \
{0x10DE, 0x0347, NV30, "NVidia GeForce FX Go5700"}, \
{0x10DE, 0x0348, NV30, "NVidia GeForce FX Go5700"}, \
{0x10DE, 0x0349, NV30, "NVidia 0x0349"}, \
{0x10DE, 0x034B, NV30, "NVidia 0x034B"}, \
{0x10DE, 0x034C, NV30, "NVidia Quadro FX Go1000"}, \
{0x10DE, 0x034E, NV30, "NVidia Quadro FX 1100"}, \
{0x10DE, 0x034F, NV30, "NVidia 0x034F"}, \
{0x10DE, 0x0040, NV40, "NVidia GeForce 6800 Ultra"}, \
{0x10DE, 0x0041, NV40, "NVidia GeForce 6800"}, \
{0x10DE, 0x0042, NV40, "NVidia GeForce 6800 LE"}, \
{0x10DE, 0x0043, NV40, "NVidia 0x0043"}, \
{0x10DE, 0x0045, NV40, "NVidia GeForce 6800 GT"}, \
{0x10DE, 0x0046, NV40, "NVidia GeForce 6800 GT"}, \
{0x10DE, 0x0049, NV40, "NVidia 0x0049"}, \
{0x10DE, 0x004E, NV40, "NVidia Quadro FX 4000"}, \
{0x10DE, 0x00C0, NV40, "NVidia 0x00C0"}, \
{0x10DE, 0x00C1, NV40, "NVidia GeForce 6800"}, \
{0x10DE, 0x00C2, NV40, "NVidia GeForce 6800 LE"}, \
{0x10DE, 0x00C8, NV40, "NVidia GeForce Go 6800"}, \
{0x10DE, 0x00C9, NV40, "NVidia GeForce Go 6800 Ultra"}, \
{0x10DE, 0x00CC, NV40, "NVidia Quadro FX Go1400"}, \
{0x10DE, 0x00CD, NV40, "NVidia Quadro FX 3450/4000 SDI"}, \
{0x10DE, 0x00CE, NV40, "NVidia Quadro FX 1400"}, \
{0x10de, 0x00f0, NV40, "Nvidia GeForce 6600 GT"}, \
{0x10de, 0x00f1, NV40, "Nvidia GeForce 6600 GT"}, \
{0x10DE, 0x0140, NV40, "NVidia GeForce 6600 GT"}, \
{0x10DE, 0x0141, NV40, "NVidia GeForce 6600"}, \
{0x10DE, 0x0142, NV40, "NVidia GeForce 6600 LE"}, \
{0x10DE, 0x0143, NV40, "NVidia 0x0143"}, \
{0x10DE, 0x0144, NV40, "NVidia GeForce Go 6600"}, \
{0x10DE, 0x0145, NV40, "NVidia GeForce 6610 XL"}, \
{0x10DE, 0x0146, NV40, "NVidia GeForce Go 6600 TE/6200 TE"}, \
{0x10DE, 0x0147, NV40, "NVidia GeForce 6700 XL"}, \
{0x10DE, 0x0148, NV40, "NVidia GeForce Go 6600"}, \
{0x10DE, 0x0149, NV40, "NVidia GeForce Go 6600 GT"}, \
{0x10DE, 0x014B, NV40, "NVidia 0x014B"}, \
{0x10DE, 0x014C, NV40, "NVidia 0x014C"}, \
{0x10DE, 0x014D, NV40, "NVidia 0x014D"}, \
{0x10DE, 0x014E, NV40, "NVidia Quadro FX 540"}, \
{0x10DE, 0x014F, NV40, "NVidia GeForce 6200"}, \
{0x10DE, 0x0160, NV40, "NVidia 0x0160"}, \
{0x10DE, 0x0161, NV40, "NVidia GeForce 6200 TurboCache(TM)"}, \
{0x10DE, 0x0162, NV40, "NVidia GeForce 6200SE TurboCache(TM)"}, \
{0x10DE, 0x0163, NV40, "NVidia 0x0163"}, \
{0x10DE, 0x0164, NV40, "NVidia GeForce Go 6200"}, \
{0x10DE, 0x0165, NV40, "NVidia Quadro NVS 285"}, \
{0x10DE, 0x0166, NV40, "NVidia GeForce Go 6400"}, \
{0x10DE, 0x0167, NV40, "NVidia GeForce Go 6200"}, \
{0x10DE, 0x0168, NV40, "NVidia GeForce Go 6400"}, \
{0x10DE, 0x0169, NV40, "NVidia 0x0169"}, \
{0x10DE, 0x016B, NV40, "NVidia 0x016B"}, \
{0x10DE, 0x016C, NV40, "NVidia 0x016C"}, \
{0x10DE, 0x016D, NV40, "NVidia 0x016D"}, \
{0x10DE, 0x016E, NV40, "NVidia 0x016E"}, \
{0x10DE, 0x0210, NV40, "NVidia 0x0210"}, \
{0x10DE, 0x0211, NV40, "NVidia GeForce 6800"}, \
{0x10DE, 0x0212, NV40, "NVidia GeForce 6800 LE"}, \
{0x10DE, 0x0215, NV40, "NVidia GeForce 6800 GT"}, \
{0x10DE, 0x0220, NV40, "NVidia 0x0220"}, \
{0x10DE, 0x0221, NV40, "NVidia GeForce 6200"}, \
{0x10DE, 0x0222, NV40, "NVidia 0x0222"}, \
{0x10DE, 0x0228, NV40, "NVidia 0x0228"}, \
{0x10DE, 0x0090, NV40, "NVidia 0x0090"}, \
{0x10DE, 0x0091, NV40, "NVidia GeForce 7800 GTX"}, \
{0x10DE, 0x0092, NV40, "NVidia 0x0092"}, \
{0x10DE, 0x0093, NV40, "NVidia 0x0093"}, \
{0x10DE, 0x0094, NV40, "NVidia 0x0094"}, \
{0x10DE, 0x0098, NV40, "NVidia 0x0098"}, \
{0x10DE, 0x0099, NV40, "NVidia GeForce Go 7800 GTX"}, \
{0x10DE, 0x009C, NV40, "NVidia 0x009C"}, \
{0x10DE, 0x009D, NV40, "NVidia Quadro FX 4500"}, \
{0x10DE, 0x009E, NV40, "NVidia 0x009E"}, \
{0, 0, 0, NULL}
#define xgi_PCI_IDS \
{0x18ca, 0x2200, 0, "XP5"}, \
{0x18ca, 0x0047, 0, "XP10 / XG47"}, \
{0, 0, 0, NULL}

92
sys/external/bsd/drm/dist/bsd-core/drm_scatter.c vendored
View File

@ -36,8 +36,10 @@
#include "drmP.h"
#if defined(__FreeBSD__)
static void drm_sg_alloc_cb(void *arg, bus_dma_segment_t *segs,
int nsegs, int error);
#endif
int
drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request)
@ -46,6 +48,9 @@ drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request)
struct drm_dma_handle *dmah;
unsigned long pages;
int ret;
#if defined(__NetBSD__)
int nsegs, i, npage;
#endif
if (dev->sg)
return EINVAL;
@ -66,6 +71,7 @@ drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request)
return ENOMEM;
}
#if defined(__FreeBSD__)
dmah = malloc(sizeof(struct drm_dma_handle), DRM_MEM_DMA,
M_ZERO | M_NOWAIT);
if (dmah == NULL) {
@ -109,6 +115,82 @@ drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request)
free(entry, DRM_MEM_SGLISTS);
return ENOMEM;
}
#elif defined(__NetBSD__)
dmah = malloc(sizeof(struct drm_dma_handle)
+ (pages - 1) * sizeof(bus_dma_segment_t),
DRM_MEM_DMA,
M_ZERO | M_NOWAIT);
if (dmah == NULL) {
free(entry->busaddr, DRM_MEM_PAGES);
free(entry, DRM_MEM_SGLISTS);
return ENOMEM;
}
dmah->tag = dev->pa.pa_dmat;
if ((ret = bus_dmamem_alloc(dmah->tag, request->size, PAGE_SIZE,
0, dmah->segs, pages, &nsegs,
BUS_DMA_WAITOK) != 0)) {
printf("drm: Unable to allocate %lu bytes of DMA, error %d\n",
request->size, ret);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
free(entry->busaddr, DRM_MEM_PAGES);
free(entry, DRM_MEM_SGLISTS);
return ENOMEM;
}
DRM_DEBUG("nsegs = %d\n", nsegs);
dmah->nsegs = nsegs;
if ((ret = bus_dmamem_map(dmah->tag, dmah->segs, nsegs, request->size,
&dmah->vaddr, BUS_DMA_NOWAIT | BUS_DMA_NOCACHE | BUS_DMA_COHERENT)) != 0) {
printf("drm: Unable to map DMA, error %d\n", ret);
bus_dmamem_free(dmah->tag, dmah->segs, dmah->nsegs);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
free(entry->busaddr, DRM_MEM_PAGES);
free(entry, DRM_MEM_SGLISTS);
return ENOMEM;
}
if ((ret = bus_dmamap_create(dmah->tag, request->size, nsegs,
request->size, 0,
BUS_DMA_NOWAIT, &dmah->map)) != 0) {
printf("drm: Unable to create DMA map, error %d\n", ret);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, request->size);
bus_dmamem_free(dmah->tag, dmah->segs, nsegs);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
free(entry->busaddr, DRM_MEM_PAGES);
free(entry, DRM_MEM_SGLISTS);
return ENOMEM;
}
if ((ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr,
request->size, NULL, BUS_DMA_NOWAIT | BUS_DMA_NOCACHE)) != 0) {
printf("drm: Unable to load DMA map, error %d\n", ret);
bus_dmamap_destroy(dmah->tag, dmah->map);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, request->size);
bus_dmamem_free(dmah->tag, dmah->segs, dmah->nsegs);
dmah->tag = NULL;
free(dmah, DRM_MEM_DMA);
return ENOMEM;
}
/*
* We are expected to return address for each page here.
* If bus_dmamem_alloc did not return each page in own segment
* (likely not), split them as if they were separate segments.
*/
for (i = 0, npage = 0 ; (i < nsegs) && (npage < pages) ; i++) {
bus_addr_t base = dmah->map->dm_segs[i].ds_addr;
bus_size_t offs;
for (offs = 0 ; (offs + PAGE_SIZE <= dmah->map->dm_segs[i].ds_len)
&& (npage < pages) ; offs += PAGE_SIZE) {
entry->busaddr[npage++] = base + offs;
}
}
KASSERT(i == nsegs);
KASSERT(npage == pages);
dmah->size = request->size;
memset(dmah->vaddr, 0, request->size);
#endif
entry->sg_dmah = dmah;
entry->handle = (unsigned long)dmah->vaddr;
@ -130,6 +212,7 @@ drm_sg_alloc(struct drm_device *dev, struct drm_scatter_gather *request)
return 0;
}
#if defined(__FreeBSD__)
static void
drm_sg_alloc_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
{
@ -143,6 +226,7 @@ drm_sg_alloc_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
entry->busaddr[i] = segs[i].ds_addr;
}
}
#endif
int
drm_sg_alloc_ioctl(struct drm_device *dev, void *data,
@ -160,9 +244,17 @@ drm_sg_cleanup(struct drm_sg_mem *entry)
{
struct drm_dma_handle *dmah = entry->sg_dmah;
#if defined(__FreeBSD__)
bus_dmamap_unload(dmah->tag, dmah->map);
bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map);
bus_dma_tag_destroy(dmah->tag);
#elif defined(__NetBSD__)
bus_dmamap_unload(dmah->tag, dmah->map);
bus_dmamap_destroy(dmah->tag, dmah->map);
bus_dmamem_unmap(dmah->tag, dmah->vaddr, dmah->size);
bus_dmamem_free(dmah->tag, dmah->segs, dmah->nsegs);
dmah->tag = NULL;
#endif
free(dmah, DRM_MEM_DMA);
free(entry->busaddr, DRM_MEM_PAGES);
free(entry, DRM_MEM_SGLISTS);

75
sys/external/bsd/drm/dist/bsd-core/drm_sysctl.c vendored
View File

@ -50,11 +50,12 @@ struct drm_sysctl_list {
struct drm_sysctl_info {
#if defined(__FreeBSD__)
struct sysctl_ctx_list ctx;
#elif defined(__NetBSD__)
char name[2];
#elif defined(__NetBSD__)
const struct sysctlnode *dri, *dri_card, *dri_debug;
const struct sysctlnode *dri_rest[DRM_SYSCTL_ENTRIES];
char name[7];
#endif
char name[7];
};
int drm_sysctl_init(struct drm_device *dev)
@ -66,7 +67,7 @@ int drm_sysctl_init(struct drm_device *dev)
#endif
int i;
info = malloc(sizeof *info, M_DRM, M_WAITOK | M_ZERO);
info = malloc(sizeof *info, DRM_MEM_DRIVER, M_WAITOK | M_ZERO);
if ( !info )
return 1;
dev->sysctl = info;
@ -110,12 +111,12 @@ int drm_sysctl_init(struct drm_device *dev)
SYSCTL_ADD_INT(&info->ctx, SYSCTL_CHILDREN(top), OID_AUTO, "debug",
CTLFLAG_RW, &drm_debug_flag, sizeof(drm_debug_flag),
"Enable debugging output");
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
sysctl_createv(NULL, 0, NULL, &info->dri,
CTLFLAG_READWRITE, CTLTYPE_NODE,
"dri", SYSCTL_DESCR("DRI Graphics"), NULL, 0, NULL, 0,
CTL_HW, CTL_CREATE);
snprintf(info->name, 7, "card%d", dev->unit);
snprintf(info->name, 7, "card%d", minor(dev->kdev));
sysctl_createv(NULL, 0, NULL, &info->dri_card,
CTLFLAG_READWRITE, CTLTYPE_NODE,
info->name, NULL, NULL, 0, NULL, 0,
@ -125,7 +126,7 @@ int drm_sysctl_init(struct drm_device *dev)
CTLFLAG_READONLY, CTLTYPE_STRING,
drm_sysctl_list[i].name, NULL,
drm_sysctl_list[i].f, 0, dev,
sizeof(drm_device_t*),
sizeof(struct drm_device*),
CTL_HW,
info->dri->sysctl_num,
info->dri_card->sysctl_num, CTL_CREATE);
@ -144,14 +145,13 @@ int drm_sysctl_cleanup(struct drm_device *dev)
{
#if defined(__FreeBSD__)
int error;
error = sysctl_ctx_free( &dev->sysctl->ctx );
free(dev->sysctl, M_DRM);
free(dev->sysctl, DRM_MEM_DRIVER);
dev->sysctl = NULL;
return error;
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
int i;
sysctl_destroyv(NULL, CTL_HW, dev->sysctl->dri->sysctl_num,
@ -167,7 +167,7 @@ int drm_sysctl_cleanup(struct drm_device *dev)
CTL_DESTROY);
sysctl_destroyv(NULL, CTL_HW, dev->sysctl->dri->sysctl_num, CTL_DESTROY);
free(dev->sysctl, M_DRM);
free(dev->sysctl, DRM_MEM_DRIVER);
dev->sysctl = NULL;
return 0;
@ -191,22 +191,22 @@ static int drm_name_info DRM_SYSCTL_HANDLER_ARGS
{
#if defined(__FreeBSD__)
struct drm_device *dev = arg1;
#elif defined(__NetBSD__)
drm_device_t *dev = rnode->sysctl_data;
int len = 0;
#elif defined(__NetBSD__)
struct drm_device *dev = rnode->sysctl_data;
int len = 0;
#endif
char buf[128];
int retcode;
int hasunique = 0;
#if defined(__FreeBSD__)
DRM_SYSCTL_PRINT("%s 0x%x", dev->driver.name, dev2udev(dev->devnode));
#elif defined(__NetBSD__)
DRM_SYSCTL_PRINT("%s 0x%x", dev->driver->name, dev2udev(dev->devnode));
#elif defined(__NetBSD__)
if (oldp == NULL)
return EINVAL;
*((char*)oldp) = '\0';
DRM_SYSCTL_PRINT("%s", dev->driver.name);
DRM_SYSCTL_PRINT("%s", dev->driver->name);
#endif
DRM_LOCK();
@ -229,9 +229,9 @@ static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
{
#if defined(__FreeBSD__)
struct drm_device *dev = arg1;
#elif defined(__NetBSD__)
drm_device_t *dev = rnode->sysctl_data;
int len = 0;
#elif defined(__NetBSD__)
struct drm_device *dev = rnode->sysctl_data;
int len = 0;
#endif
drm_local_map_t *map, *tempmaps;
const char *types[] = { "FB", "REG", "SHM", "AGP", "SG" };
@ -249,7 +249,8 @@ static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
TAILQ_FOREACH(map, &dev->maplist, link)
mapcount++;
tempmaps = malloc(sizeof(drm_local_map_t) * mapcount, M_DRM, M_NOWAIT);
tempmaps = malloc(sizeof(drm_local_map_t) * mapcount, DRM_MEM_DRIVER,
M_NOWAIT);
if (tempmaps == NULL) {
DRM_UNLOCK();
return ENOMEM;
@ -261,13 +262,13 @@ static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
DRM_UNLOCK();
DRM_SYSCTL_PRINT("\nslot offset size type flags "
"address mtrr\n");
DRM_SYSCTL_PRINT("\nslot offset size "
"type flags address mtrr\n");
for (i = 0; i < mapcount; i++) {
map = &tempmaps[i];
if ((int)map->type < 0 || map->type > 4)
if (map->type > 4)
type = "??";
else
type = types[map->type];
@ -278,14 +279,14 @@ static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
yesno = "yes";
DRM_SYSCTL_PRINT(
"%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx %s\n", i,
"%4d 0x%016lx 0x%08lx %4.4s 0x%02x 0x%016lx %s\n", i,
map->offset, map->size, type, map->flags,
(unsigned long)map->handle, yesno);
}
SYSCTL_OUT(req, "", 1);
done:
free(tempmaps, M_DRM);
free(tempmaps, DRM_MEM_DRIVER);
return retcode;
}
@ -293,9 +294,9 @@ static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
{
#if defined(__FreeBSD__)
struct drm_device *dev = arg1;
#elif defined(__NetBSD__)
drm_device_t *dev = rnode->sysctl_data;
int len = 0;
#elif defined(__NetBSD__)
struct drm_device *dev = rnode->sysctl_data;
int len = 0;
#endif
drm_device_dma_t *dma = dev->dma;
drm_device_dma_t tempdma;
@ -314,7 +315,8 @@ static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
}
DRM_SPINLOCK(&dev->dma_lock);
tempdma = *dma;
templists = malloc(sizeof(int) * dma->buf_count, M_DRM, M_NOWAIT);
templists = malloc(sizeof(int) * dma->buf_count, DRM_MEM_DRIVER,
M_NOWAIT);
for (i = 0; i < dma->buf_count; i++)
templists[i] = dma->buflist[i]->list;
dma = &tempdma;
@ -346,7 +348,7 @@ static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
SYSCTL_OUT(req, "", 1);
done:
free(templists, M_DRM);
free(templists, DRM_MEM_DRIVER);
return retcode;
}
@ -354,11 +356,11 @@ static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS
{
#if defined(__FreeBSD__)
struct drm_device *dev = arg1;
#elif defined(__NetBSD__)
drm_device_t *dev = rnode->sysctl_data;
int len = 0;
#elif defined(__NetBSD__)
struct drm_device *dev = rnode->sysctl_data;
int len = 0;
#endif
drm_file_t *priv, *tempprivs;
struct drm_file *priv, *tempprivs;
char buf[128];
int retcode;
int privcount, i;
@ -369,7 +371,8 @@ static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS
TAILQ_FOREACH(priv, &dev->files, link)
privcount++;
tempprivs = malloc(sizeof(drm_file_t) * privcount, M_DRM, M_NOWAIT);
tempprivs = malloc(sizeof(struct drm_file) * privcount, DRM_MEM_DRIVER,
M_NOWAIT);
if (tempprivs == NULL) {
DRM_UNLOCK();
return ENOMEM;
@ -394,6 +397,6 @@ static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS
SYSCTL_OUT(req, "", 1);
done:
free(tempprivs, M_DRM);
free(tempprivs, DRM_MEM_DRIVER);
return retcode;
}

118
sys/external/bsd/drm/dist/bsd-core/drm_vm.c vendored
View File

@ -28,37 +28,51 @@
#include "drmP.h"
#include "drm.h"
#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
#if defined(__FreeBSD__)
int drm_mmap(struct cdev *kdev, vm_offset_t offset, vm_paddr_t *paddr,
int prot)
#elif defined(__FreeBSD__)
int drm_mmap(dev_t kdev, vm_offset_t offset, int prot)
#elif defined(__NetBSD__) || defined(__OpenBSD__)
#elif defined(__NetBSD__)
paddr_t drm_mmap(dev_t kdev, off_t offset, int prot)
#endif
{
struct drm_device *dev = drm_get_device_from_kdev(kdev);
struct drm_file *file_priv = NULL;
drm_local_map_t *map;
drm_file_t *priv;
drm_map_type_t type;
#ifdef __FreeBSD__
enum drm_map_type type;
#if defined(__FreeBSD__)
vm_paddr_t phys;
#else
paddr_t phys;
off_t roffset;
int error;
#elif defined(__NetBSD__)
paddr_t phys;
unsigned long map_offs;
#endif
/*DRM_DEBUG("dev %llx offset %llx prot %d\n", (long long)kdev, (long long)offset, prot);*/
DRM_LOCK();
priv = drm_find_file_by_proc(dev, DRM_CURPROC);
DRM_UNLOCK();
if (priv == NULL) {
DRM_ERROR("can't find authenticator\n");
return -1;
#if defined(__FreeBSD__)
/* d_mmap gets called twice, we can only reference file_priv during
* the first call. We need to assume that if error is EBADF the
* call was succesful and the client is authenticated.
*/
error = devfs_get_cdevpriv((void **)&file_priv);
if (error == ENOENT) {
DRM_ERROR("Could not find authenticator!\n");
return EINVAL;
}
if (!priv->authenticated)
#elif defined(__NetBSD__)
DRM_LOCK();
file_priv = drm_find_file_by_proc(dev, DRM_CURPROC);
DRM_UNLOCK();
if (file_priv == NULL) {
DRM_ERROR("Could not find authenticator!\n");
return -1;
}
#endif
if (file_priv && !file_priv->authenticated)
#if defined(__NetBSD__)
return -1;
#else
return EACCES;
#endif
if (dev->dma && offset >= 0 && offset < ptoa(dev->dma->page_count)) {
drm_device_dma_t *dma = dev->dma;
@ -70,15 +84,11 @@ paddr_t drm_mmap(dev_t kdev, off_t offset, int prot)
unsigned long physaddr = dma->pagelist[page];
DRM_SPINUNLOCK(&dev->dma_lock);
#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
#if defined(__FreeBSD__)
*paddr = physaddr;
return 0;
#else
#if defined(__NetBSD__) && defined(macppc)
return physaddr;
#else
return atop(physaddr);
#endif
#elif defined(__NetBSD__)
return atop(physaddr);
#endif
} else {
DRM_SPINUNLOCK(&dev->dma_lock);
@ -94,27 +104,19 @@ paddr_t drm_mmap(dev_t kdev, off_t offset, int prot)
for performance, even if the list was a
bit longer. */
DRM_LOCK();
#ifdef __NetBSD__
roffset = DRM_NETBSD_HANDLE2ADDR(offset);
#endif
TAILQ_FOREACH(map, &dev->maplist, link) {
#ifdef __FreeBSD__
if (roffset >= map->offset && roffset < map->offset + map->size)
if (offset >= map->offset && offset < map->offset + map->size)
break;
#elif defined(__NetBSD__)
if (DRM_HANDLE_NEEDS_MASK(map->type)) {
if (roffset >= (uintptr_t)map->handle && roffset < (uintptr_t)map->handle + map->size)
break;
} else {
if (offset >= map->offset && offset < map->offset + map->size)
break;
}
#endif
}
if (map == NULL) {
DRM_DEBUG("Can't find map, requested offset = %" PRIx64 "\n",
offset);
TAILQ_FOREACH(map, &dev->maplist, link) {
DRM_DEBUG("map offset = %016lx, handle = %016lx\n",
map->offset, (unsigned long)map->handle);
}
DRM_UNLOCK();
DRM_DEBUG("can't find map\n");
return -1;
}
if (((map->flags&_DRM_RESTRICTED) && !DRM_SUSER(DRM_CURPROC))) {
@ -123,44 +125,44 @@ paddr_t drm_mmap(dev_t kdev, off_t offset, int prot)
return -1;
}
type = map->type;
#if defined(__NetBSD__)
map_offs = map->offset;
#endif
DRM_UNLOCK();
switch (type) {
case _DRM_FRAME_BUFFER:
case _DRM_REGISTERS:
case _DRM_AGP:
#if defined(__NetBSD__)
phys = bus_space_mmap(dev->pa.pa_memt, map->offset,
offset - map->offset, prot, BUS_SPACE_MAP_LINEAR);
if (phys == -1) {
DRM_ERROR("bus_space_mmap for %" PRIx64 " failed\n", offset);
return -1;
}
return phys;
#else
phys = offset;
#endif
break;
case _DRM_CONSISTENT:
phys = vtophys((vaddr_t)((char *)map->handle + (offset - map->offset)));
break;
case _DRM_SHM:
#ifndef __NetBSD__
phys = vtophys(offset);
break;
#endif
case _DRM_SCATTER_GATHER:
#ifndef __NetBSD__
case _DRM_SHM:
phys = vtophys(offset);
#else
phys = vtophys(roffset);
#endif
break;
default:
DRM_ERROR("bad map type %d\n", type);
return -1; /* This should never happen. */
}
#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
#if defined(__FreeBSD__)
*paddr = phys;
return 0;
#elif defined(__NetBSD__)
/*DRM_DEBUG("going to return phys %lx\n", phys);*/
#if defined(macppc)
return phys;
#else
return atop(phys);
#endif
#elif defined(__NetBSD__)
return atop(phys);
#endif
}

1
sys/external/bsd/drm/dist/bsd-core/i915/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = i915
NO_MAN = YES
NOMAN = YES
SRCS = i915_dma.c i915_drv.c i915_irq.c i915_mem.c i915_suspend.c
SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS += ${DEBUG_FLAGS} -I. -I..

124
sys/external/bsd/drm/dist/bsd-core/i915_drv.c vendored
View File

@ -40,10 +40,10 @@ static drm_pci_id_list_t i915_pciidlist[] = {
i915_PCI_IDS
};
#ifdef __FreeBSD__
static int i915_suspend(device_t nbdev)
#if defined(__FreeBSD__)
static int i915_suspend(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
struct drm_device *dev = device_get_softc(kdev);
struct drm_i915_private *dev_priv = dev->dev_private;
if (!dev || !dev_priv) {
@ -55,80 +55,89 @@ static int i915_suspend(device_t nbdev)
i915_save_state(dev);
return (bus_generic_suspend(nbdev));
return (bus_generic_suspend(kdev));
}
static int i915_resume(device_t nbdev)
static int i915_resume(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
struct drm_device *dev = device_get_softc(kdev);
i915_restore_state(dev);
return (bus_generic_resume(nbdev));
return (bus_generic_resume(kdev));
}
#endif
static void i915_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = sizeof(drm_i915_private_t);
dev->driver.load = i915_driver_load;
dev->driver.unload = i915_driver_unload;
dev->driver.firstopen = i915_driver_firstopen;
dev->driver.preclose = i915_driver_preclose;
dev->driver.lastclose = i915_driver_lastclose;
dev->driver.device_is_agp = i915_driver_device_is_agp;
dev->driver.get_vblank_counter = i915_get_vblank_counter;
dev->driver.enable_vblank = i915_enable_vblank;
dev->driver.disable_vblank = i915_disable_vblank;
dev->driver.irq_preinstall = i915_driver_irq_preinstall;
dev->driver.irq_postinstall = i915_driver_irq_postinstall;
dev->driver.irq_uninstall = i915_driver_irq_uninstall;
dev->driver.irq_handler = i915_driver_irq_handler;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
DRIVER_HAVE_IRQ;
dev->driver.ioctls = i915_ioctls;
dev->driver.max_ioctl = i915_max_ioctl;
dev->driver->buf_priv_size = sizeof(drm_i915_private_t);
dev->driver->load = i915_driver_load;
dev->driver->unload = i915_driver_unload;
dev->driver->preclose = i915_driver_preclose;
dev->driver->lastclose = i915_driver_lastclose;
dev->driver->device_is_agp = i915_driver_device_is_agp;
dev->driver->enable_vblank = i915_enable_vblank;
dev->driver->disable_vblank = i915_disable_vblank;
dev->driver->irq_preinstall = i915_driver_irq_preinstall;
dev->driver->irq_postinstall = i915_driver_irq_postinstall;
dev->driver->irq_uninstall = i915_driver_irq_uninstall;
dev->driver->irq_handler = i915_driver_irq_handler;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = i915_ioctls;
dev->driver->max_ioctl = i915_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.require_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_irq = 1;
dev->driver.use_vbl_irq = 1;
dev->driver.use_vbl_irq2 = 1;
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
static int
i915_probe(device_t dev)
i915_probe(device_t kdev)
{
return drm_probe(dev, i915_pciidlist);
return drm_probe(kdev, i915_pciidlist);
}
static int
i915_attach(device_t nbdev)
i915_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
i915_configure(dev);
return drm_attach(nbdev, i915_pciidlist);
return drm_attach(kdev, i915_pciidlist);
}
static int
i915_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t i915_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, i915_probe),
DEVMETHOD(device_attach, i915_attach),
#ifdef __FreeBSD__
DEVMETHOD(device_suspend, i915_suspend),
DEVMETHOD(device_resume, i915_resume),
#endif
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, i915_detach),
{ 0, 0 }
};
@ -151,13 +160,12 @@ DRIVER_MODULE(i915, agp, i915_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(i915, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
CFDRIVER_DECL(i915, DV_TTY, NULL);
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
static bool
i915drm_suspend(device_t self PMF_FN_ARGS)
{
drm_device_t *dev = device_private(self);
struct drm_device *dev = device_private(self);
i915_save_state(dev);
return true;
@ -166,24 +174,27 @@ i915drm_suspend(device_t self PMF_FN_ARGS)
static bool
i915drm_resume(device_t self PMF_FN_ARGS)
{
drm_device_t *dev = device_private(self);
struct drm_device *dev = device_private(self);
i915_restore_state(dev);
return true;
}
static int
i915drm_probe(struct device *parent, struct cfdata *match, void *aux)
i915drm_probe(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, i915_pciidlist);
}
static void
i915drm_attach(struct device *parent, struct device *self, void *aux)
i915drm_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
struct drm_device *dev = device_private(self);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
i915_configure(dev);
@ -192,8 +203,8 @@ i915drm_attach(struct device *parent, struct device *self, void *aux)
drm_attach(self, pa, i915_pciidlist);
}
CFATTACH_DECL_NEW(i915drm, sizeof(drm_device_t), i915drm_probe, i915drm_attach,
drm_detach, drm_activate);
CFATTACH_DECL_NEW(i915drm, sizeof(struct drm_device), i915drm_probe,
i915drm_attach, drm_detach, drm_activate);
#ifdef _MODULE
@ -252,4 +263,5 @@ i915drm_modcmd(modcmd_t cmd, void *arg)
}
}
#endif /* _MODULE */
#endif /* __FreeBSD__ */
#endif

1
sys/external/bsd/drm/dist/bsd-core/mach64/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = mach64
NO_MAN = YES
NOMAN = YES
SRCS = mach64_dma.c mach64_drv.c mach64_irq.c mach64_state.c
SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS += ${DEBUG_FLAGS} -I. -I..

115
sys/external/bsd/drm/dist/bsd-core/mach64_drv.c vendored
View File

@ -46,57 +46,76 @@ static drm_pci_id_list_t mach64_pciidlist[] = {
static void mach64_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = 1; /* No dev_priv */
dev->driver.lastclose = mach64_driver_lastclose;
dev->driver.get_vblank_counter = mach64_get_vblank_counter;
dev->driver.enable_vblank = mach64_enable_vblank;
dev->driver.disable_vblank = mach64_disable_vblank;
dev->driver.irq_preinstall = mach64_driver_irq_preinstall;
dev->driver.irq_postinstall = mach64_driver_irq_postinstall;
dev->driver.irq_uninstall = mach64_driver_irq_uninstall;
dev->driver.irq_handler = mach64_driver_irq_handler;
dev->driver.dma_ioctl = mach64_dma_buffers;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
dev->driver.ioctls = mach64_ioctls;
dev->driver.max_ioctl = mach64_max_ioctl;
dev->driver->buf_priv_size = 1; /* No dev_priv */
dev->driver->load = mach64_driver_load;
dev->driver->lastclose = mach64_driver_lastclose;
dev->driver->get_vblank_counter = mach64_get_vblank_counter;
dev->driver->enable_vblank = mach64_enable_vblank;
dev->driver->disable_vblank = mach64_disable_vblank;
dev->driver->irq_preinstall = mach64_driver_irq_preinstall;
dev->driver->irq_postinstall = mach64_driver_irq_postinstall;
dev->driver->irq_uninstall = mach64_driver_irq_uninstall;
dev->driver->irq_handler = mach64_driver_irq_handler;
dev->driver->dma_ioctl = mach64_dma_buffers;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = mach64_ioctls;
dev->driver->max_ioctl = mach64_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_pci_dma = 1;
dev->driver.use_dma = 1;
dev->driver.use_irq = 1;
dev->driver.use_vbl_irq = 1;
}
#ifdef __FreeBSD__
static int
mach64_probe(device_t dev)
{
return drm_probe(dev, mach64_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
mach64_attach(device_t nbdev)
mach64_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, mach64_pciidlist);
}
static int
mach64_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
mach64_configure(dev);
return drm_attach(nbdev, mach64_pciidlist);
return drm_attach(kdev, mach64_pciidlist);
}
int
mach64_driver_load(struct drm_device * dev, unsigned long flags)
{
return drm_vblank_init(dev, 1);
}
static int
mach64_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t mach64_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, mach64_probe),
DEVMETHOD(device_attach, mach64_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, mach64_detach),
{ 0, 0 }
};
@ -114,27 +133,3 @@ DRIVER_MODULE(mach64, vgapci, mach64_driver, drm_devclass, 0, 0);
DRIVER_MODULE(mach64, pci, mach64_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(mach64, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
CFDRIVER_DECL(mach64, DV_TTY, NULL);
#elif defined(__NetBSD__)
static int
mach64drm_probe(struct device *parent, struct cfdata *match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, mach64_pciidlist);
}
static void
mach64drm_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
mach64_configure(dev);
return drm_attach(self, pa, mach64_pciidlist);
}
CFATTACH_DECL_NEW(mach64drm, sizeof(drm_device_t), mach64drm_probe, mach64drm_attach,
drm_detach, drm_activate);
#endif

1
sys/external/bsd/drm/dist/bsd-core/mga/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD= mga
NO_MAN= YES
NOMAN = YES
SRCS= mga_drv.c mga_state.c mga_warp.c mga_dma.c mga_irq.c
SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS+= ${DEBUG_FLAGS} -I. -I..

128
sys/external/bsd/drm/dist/bsd-core/mga_drv.c vendored
View File

@ -73,80 +73,86 @@ static int mga_driver_device_is_agp(struct drm_device * dev)
*/
#if __FreeBSD_version >= 700010
bus = device_get_parent(device_get_parent(dev->device));
#elif defined(__NetBSD__)
bus = device_parent(&dev->device);
#else
bus = device_get_parent(dev->device);
#endif
#ifndef __NetBSD__ /* XXXMRG */
if (pci_get_device(dev->device) == 0x0525 &&
pci_get_vendor(bus) == 0x3388 &&
pci_get_device(bus) == 0x0021)
return DRM_IS_NOT_AGP;
else
#endif
return DRM_MIGHT_BE_AGP;
}
static void mga_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = sizeof(drm_mga_buf_priv_t);
dev->driver.load = mga_driver_load;
dev->driver.unload = mga_driver_unload;
dev->driver.lastclose = mga_driver_lastclose;
dev->driver.get_vblank_counter = mga_get_vblank_counter;
dev->driver.enable_vblank = mga_enable_vblank;
dev->driver.disable_vblank = mga_disable_vblank;
dev->driver.irq_preinstall = mga_driver_irq_preinstall;
dev->driver.irq_postinstall = mga_driver_irq_postinstall;
dev->driver.irq_uninstall = mga_driver_irq_uninstall;
dev->driver.irq_handler = mga_driver_irq_handler;
dev->driver.dma_ioctl = mga_dma_buffers;
dev->driver.dma_quiescent = mga_driver_dma_quiescent;
dev->driver.device_is_agp = mga_driver_device_is_agp;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | DRIVER_USE_MTRR |
DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
dev->driver.ioctls = mga_ioctls;
dev->driver.max_ioctl = mga_max_ioctl;
dev->driver->buf_priv_size = sizeof(drm_mga_buf_priv_t);
dev->driver->load = mga_driver_load;
dev->driver->unload = mga_driver_unload;
dev->driver->lastclose = mga_driver_lastclose;
dev->driver->get_vblank_counter = mga_get_vblank_counter;
dev->driver->enable_vblank = mga_enable_vblank;
dev->driver->disable_vblank = mga_disable_vblank;
dev->driver->irq_preinstall = mga_driver_irq_preinstall;
dev->driver->irq_postinstall = mga_driver_irq_postinstall;
dev->driver->irq_uninstall = mga_driver_irq_uninstall;
dev->driver->irq_handler = mga_driver_irq_handler;
dev->driver->dma_ioctl = mga_dma_buffers;
dev->driver->dma_quiescent = mga_driver_dma_quiescent;
dev->driver->device_is_agp = mga_driver_device_is_agp;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = mga_ioctls;
dev->driver->max_ioctl = mga_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.require_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_dma = 1;
dev->driver.use_irq = 1;
dev->driver.use_vbl_irq = 1;
}
#ifdef __FreeBSD__
static int
mga_probe(device_t dev)
{
return drm_probe(dev, mga_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
mga_attach(device_t nbdev)
mga_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, mga_pciidlist);
}
static int
mga_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
mga_configure(dev);
return drm_attach(nbdev, mga_pciidlist);
return drm_attach(kdev, mga_pciidlist);
}
static int
mga_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t mga_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, mga_probe),
DEVMETHOD(device_attach, mga_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, mga_detach),
{ 0, 0 }
};
@ -164,33 +170,3 @@ DRIVER_MODULE(mga, vgapci, mga_driver, drm_devclass, 0, 0);
DRIVER_MODULE(mga, pci, mga_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(mga, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
#ifdef _LKM
CFDRIVER_DECL(mga, DV_TTY, NULL);
#else
CFATTACH_DECL(mga, sizeof(struct drm_device), drm_probe, drm_attach, drm_detach,
drm_activate);
#endif
#elif defined(__NetBSD__)
static int
mgadrm_probe(struct device *parent, struct cfdata *match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, mga_pciidlist);
}
static void
mgadrm_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
mga_configure(dev);
return drm_attach(self, pa, mga_pciidlist);
}
CFATTACH_DECL_NEW(mgadrm, sizeof(drm_device_t), mgadrm_probe, mgadrm_attach,
drm_detach, drm_activate);
#endif

1
sys/external/bsd/drm/dist/bsd-core/r128/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = r128
NO_MAN = YES
NOMAN = YES
SRCS = r128_cce.c r128_drv.c r128_state.c r128_irq.c
SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS += ${DEBUG_FLAGS} -I. -I..

124
sys/external/bsd/drm/dist/bsd-core/r128_drv.c vendored
View File

@ -44,59 +44,76 @@ static drm_pci_id_list_t r128_pciidlist[] = {
static void r128_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = sizeof(drm_r128_buf_priv_t);
dev->driver.preclose = r128_driver_preclose;
dev->driver.lastclose = r128_driver_lastclose;
dev->driver.get_vblank_counter = r128_get_vblank_counter;
dev->driver.enable_vblank = r128_enable_vblank;
dev->driver.disable_vblank = r128_disable_vblank;
dev->driver.irq_preinstall = r128_driver_irq_preinstall;
dev->driver.irq_postinstall = r128_driver_irq_postinstall;
dev->driver.irq_uninstall = r128_driver_irq_uninstall;
dev->driver.irq_handler = r128_driver_irq_handler;
dev->driver.dma_ioctl = r128_cce_buffers;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
DRIVER_SG | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
dev->driver.ioctls = r128_ioctls;
dev->driver.max_ioctl = r128_max_ioctl;
dev->driver->buf_priv_size = sizeof(drm_r128_buf_priv_t);
dev->driver->load = r128_driver_load;
dev->driver->preclose = r128_driver_preclose;
dev->driver->lastclose = r128_driver_lastclose;
dev->driver->get_vblank_counter = r128_get_vblank_counter;
dev->driver->enable_vblank = r128_enable_vblank;
dev->driver->disable_vblank = r128_disable_vblank;
dev->driver->irq_preinstall = r128_driver_irq_preinstall;
dev->driver->irq_postinstall = r128_driver_irq_postinstall;
dev->driver->irq_uninstall = r128_driver_irq_uninstall;
dev->driver->irq_handler = r128_driver_irq_handler;
dev->driver->dma_ioctl = r128_cce_buffers;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = r128_ioctls;
dev->driver->max_ioctl = r128_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_pci_dma = 1;
dev->driver.use_sg = 1;
dev->driver.use_dma = 1;
dev->driver.use_irq = 1;
dev->driver.use_vbl_irq = 1;
}
#ifdef __FreeBSD__
static int
r128_probe(device_t dev)
{
return drm_probe(dev, r128_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
r128_attach(device_t nbdev)
r128_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, r128_pciidlist);
}
static int
r128_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
r128_configure(dev);
return drm_attach(nbdev, r128_pciidlist);
return drm_attach(kdev, r128_pciidlist);
}
int r128_driver_load(struct drm_device * dev, unsigned long flags)
{
return drm_vblank_init(dev, 1);
}
static int
r128_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t r128_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, r128_probe),
DEVMETHOD(device_attach, r128_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, r128_detach),
{ 0, 0 }
};
@ -114,34 +131,3 @@ DRIVER_MODULE(r128, vgapci, r128_driver, drm_devclass, 0, 0);
DRIVER_MODULE(r128, pci, r128_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(r128, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
#ifdef _LKM
CFDRIVER_DECL(r128, DV_TTY, NULL);
#else
CFATTACH_DECL(r128, sizeof(struct drm_device), drm_probe, drm_attach,
drm_detach, drm_activate);
#endif
#elif defined(__NetBSD__)
static int
r128drm_probe(struct device *parent, struct cfdata *match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, r128_pciidlist);
}
static void
r128drm_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
r128_configure(dev);
return drm_attach(self, pa, r128_pciidlist);
}
CFATTACH_DECL_NEW(r128drm, sizeof(drm_device_t), r128drm_probe, r128drm_attach,
drm_detach, drm_activate);
#endif

1
sys/external/bsd/drm/dist/bsd-core/radeon/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = radeon
NO_MAN = YES
NOMAN = YES
SRCS = r300_cmdbuf.c radeon_cp.c radeon_drv.c radeon_state.c radeon_irq.c \
radeon_mem.c
SRCS += device_if.h bus_if.h pci_if.h opt_drm.h

119
sys/external/bsd/drm/dist/bsd-core/radeon_drv.c vendored
View File

@ -44,65 +44,76 @@ static drm_pci_id_list_t radeon_pciidlist[] = {
static void radeon_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = sizeof(drm_radeon_buf_priv_t);
dev->driver.load = radeon_driver_load;
dev->driver.unload = radeon_driver_unload;
dev->driver.firstopen = radeon_driver_firstopen;
dev->driver.open = radeon_driver_open;
dev->driver.preclose = radeon_driver_preclose;
dev->driver.postclose = radeon_driver_postclose;
dev->driver.lastclose = radeon_driver_lastclose;
dev->driver.get_vblank_counter = radeon_get_vblank_counter;
dev->driver.enable_vblank = radeon_enable_vblank;
dev->driver.disable_vblank = radeon_disable_vblank;
dev->driver.irq_preinstall = radeon_driver_irq_preinstall;
dev->driver.irq_postinstall = radeon_driver_irq_postinstall;
dev->driver.irq_uninstall = radeon_driver_irq_uninstall;
dev->driver.irq_handler = radeon_driver_irq_handler;
dev->driver.dma_ioctl = radeon_cp_buffers;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
DRIVER_SG | DRIVER_HAVE_DMA | DRIVER_HAVE_IRQ;
dev->driver.ioctls = radeon_ioctls;
dev->driver.max_ioctl = radeon_max_ioctl;
dev->driver->buf_priv_size = sizeof(drm_radeon_buf_priv_t);
dev->driver->load = radeon_driver_load;
dev->driver->unload = radeon_driver_unload;
dev->driver->firstopen = radeon_driver_firstopen;
dev->driver->open = radeon_driver_open;
dev->driver->preclose = radeon_driver_preclose;
dev->driver->postclose = radeon_driver_postclose;
dev->driver->lastclose = radeon_driver_lastclose;
dev->driver->get_vblank_counter = radeon_get_vblank_counter;
dev->driver->enable_vblank = radeon_enable_vblank;
dev->driver->disable_vblank = radeon_disable_vblank;
dev->driver->irq_preinstall = radeon_driver_irq_preinstall;
dev->driver->irq_postinstall = radeon_driver_irq_postinstall;
dev->driver->irq_uninstall = radeon_driver_irq_uninstall;
dev->driver->irq_handler = radeon_driver_irq_handler;
dev->driver->dma_ioctl = radeon_cp_buffers;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = radeon_ioctls;
dev->driver->max_ioctl = radeon_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_pci_dma = 1;
dev->driver.use_sg = 1;
dev->driver.use_dma = 1;
dev->driver.use_irq = 1;
dev->driver.use_vbl_irq = 1;
dev->driver.use_vbl_irq2 = 1;
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
#ifdef __FreeBSD__
#if defined(__FreeBSD__)
static int
radeon_probe(device_t dev)
radeon_probe(device_t kdev)
{
return drm_probe(dev, radeon_pciidlist);
return drm_probe(kdev, radeon_pciidlist);
}
static int
radeon_attach(device_t nbdev)
radeon_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
radeon_configure(dev);
return drm_attach(nbdev, radeon_pciidlist);
return drm_attach(kdev, radeon_pciidlist);
}
static int
radeon_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t radeon_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, radeon_probe),
DEVMETHOD(device_attach, radeon_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, radeon_detach),
{ 0, 0 }
};
@ -121,34 +132,31 @@ DRIVER_MODULE(radeon, pci, radeon_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(radeon, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
#ifdef _LKM
CFDRIVER_DECL(radeon, DV_TTY, NULL);
#else
CFATTACH_DECL(radeon, sizeof(struct drm_device), drm_probe, drm_attach,
drm_detach, drm_activate);
#endif
#elif defined(__NetBSD__)
#elif defined(__NetBSD__)
static int
radeondrm_probe(struct device *parent, struct cfdata *match, void *aux)
radeondrm_probe(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, radeon_pciidlist);
}
static void
radeondrm_attach(struct device *parent, struct device *self, void *aux)
radeondrm_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
struct drm_device *dev = device_private(self);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
radeon_configure(dev);
return drm_attach(self, pa, radeon_pciidlist);
drm_attach(self, pa, radeon_pciidlist);
}
CFATTACH_DECL_NEW(radeondrm, sizeof(drm_device_t), radeondrm_probe, radeondrm_attach,
drm_detach, drm_activate);
CFATTACH_DECL_NEW(radeondrm, sizeof(struct drm_device),
radeondrm_probe, radeondrm_attach, drm_detach, drm_activate);
#ifdef _MODULE
@ -207,4 +215,5 @@ radeondrm_modcmd(modcmd_t cmd, void *arg)
}
}
#endif /* _MODULE */
#endif /* __FreeBSD__ */
#endif

1
sys/external/bsd/drm/dist/bsd-core/savage/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = savage
NO_MAN = YES
NOMAN = YES
SRCS = savage_bci.c savage_drv.c savage_state.c
SRCS += device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS += ${DEBUG_FLAGS} -I. -I..

101
sys/external/bsd/drm/dist/bsd-core/savage_drv.c vendored
View File

@ -39,52 +39,66 @@ static drm_pci_id_list_t savage_pciidlist[] = {
static void savage_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = sizeof(drm_savage_buf_priv_t);
dev->driver.load = savage_driver_load;
dev->driver.firstopen = savage_driver_firstopen;
dev->driver.lastclose = savage_driver_lastclose;
dev->driver.unload = savage_driver_unload;
dev->driver.reclaim_buffers_locked = savage_reclaim_buffers;
dev->driver.dma_ioctl = savage_bci_buffers;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA |
DRIVER_HAVE_DMA;
dev->driver.ioctls = savage_ioctls;
dev->driver.max_ioctl = savage_max_ioctl;
dev->driver->buf_priv_size = sizeof(drm_savage_buf_priv_t);
dev->driver->load = savage_driver_load;
dev->driver->firstopen = savage_driver_firstopen;
dev->driver->lastclose = savage_driver_lastclose;
dev->driver->unload = savage_driver_unload;
dev->driver->reclaim_buffers_locked = savage_reclaim_buffers;
dev->driver->dma_ioctl = savage_bci_buffers;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = savage_ioctls;
dev->driver->max_ioctl = savage_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_pci_dma = 1;
dev->driver.use_dma = 1;
}
#ifdef __FreeBSD__
static int
savage_probe(device_t dev)
{
return drm_probe(dev, savage_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
savage_attach(device_t nbdev)
savage_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, savage_pciidlist);
}
static int
savage_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
savage_configure(dev);
return drm_attach(nbdev, savage_pciidlist);
return drm_attach(kdev, savage_pciidlist);
}
static int
savage_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t savage_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, savage_probe),
DEVMETHOD(device_attach, savage_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, savage_detach),
{ 0, 0 }
};
@ -102,28 +116,3 @@ DRIVER_MODULE(savage, vgapci, savage_driver, drm_devclass, 0, 0);
DRIVER_MODULE(savage, pci, savage_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(savage, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
CFDRIVER_DECL(savage, DV_TTY, NULL);
#elif defined(__NetBSD__)
static int
savagedrm_probe(struct device *parent, struct cfdata *match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, savage_pciidlist);
}
static void
savagedrm_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
savage_configure(dev);
return drm_attach(self, pa, savage_pciidlist);
}
CFATTACH_DECL_NEW(savagedrm, sizeof(drm_device_t), savagedrm_probe, savagedrm_attach,
drm_detach, drm_activate);
#endif

1
sys/external/bsd/drm/dist/bsd-core/sis/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD= sis
NO_MAN= YES
NOMAN = YES
SRCS= sis_drv.c sis_ds.c sis_mm.c
SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS+= ${DEBUG_FLAGS} -I. -I..

95
sys/external/bsd/drm/dist/bsd-core/sis_drv.c vendored
View File

@ -38,46 +38,61 @@ static drm_pci_id_list_t sis_pciidlist[] = {
static void sis_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = 1; /* No dev_priv */
dev->driver.context_ctor = sis_init_context;
dev->driver.context_dtor = sis_final_context;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR;
dev->driver.ioctls = sis_ioctls;
dev->driver.max_ioctl = sis_max_ioctl;
dev->driver->buf_priv_size = 1; /* No dev_priv */
dev->driver->context_ctor = sis_init_context;
dev->driver->context_dtor = sis_final_context;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = sis_ioctls;
dev->driver->max_ioctl = sis_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.use_mtrr = 1;
}
#ifdef __FreeBSD__
static int
sis_probe(device_t dev)
{
return drm_probe(dev, sis_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
sis_attach(device_t nbdev)
sis_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, sis_pciidlist);
}
static int
sis_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
sis_configure(dev);
return drm_attach(nbdev, sis_pciidlist);
return drm_attach(kdev, sis_pciidlist);
}
static int
sis_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t sis_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, sis_probe),
DEVMETHOD(device_attach, sis_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, sis_detach),
{ 0, 0 }
};
@ -95,33 +110,3 @@ DRIVER_MODULE(sisdrm, vgapci, sis_driver, drm_devclass, 0, 0);
DRIVER_MODULE(sisdrm, pci, sis_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(sisdrm, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
#ifdef _LKM
CFDRIVER_DECL(sis, DV_TTY, NULL);
#else
CFATTACH_DECL(sis, sizeof(struct drm_device), drm_probe, drm_attach, drm_detach,
drm_activate);
#endif
#elif defined(__NetBSD__)
static int
sisdrm_probe(struct device *parent, struct cfdata *match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, sis_pciidlist);
}
static void
sisdrm_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
sis_configure(dev);
return drm_attach(self, pa, sis_pciidlist);
}
CFATTACH_DECL_NEW(sisdrm, sizeof(drm_device_t), sisdrm_probe, sisdrm_attach,
drm_detach, drm_activate);
#endif

1
sys/external/bsd/drm/dist/bsd-core/tdfx/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD= tdfx
NO_MAN= YES
NOMAN = YES
SRCS= tdfx_drv.c
SRCS+= device_if.h bus_if.h pci_if.h opt_drm.h
CFLAGS+= ${DEBUG_FLAGS} -I. -I..

88
sys/external/bsd/drm/dist/bsd-core/tdfx_drv.c vendored
View File

@ -43,42 +43,58 @@ static drm_pci_id_list_t tdfx_pciidlist[] = {
static void tdfx_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = 1; /* No dev_priv */
dev->driver->driver_features =
DRIVER_USE_MTRR;
dev->driver.max_ioctl = 0;
dev->driver->buf_priv_size = 1; /* No dev_priv */
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->max_ioctl = 0;
dev->driver.use_mtrr = 1;
}
#ifdef __FreeBSD__
static int
tdfx_probe(device_t dev)
{
return drm_probe(dev, tdfx_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
tdfx_attach(device_t nbdev)
tdfx_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, tdfx_pciidlist);
}
static int
tdfx_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
tdfx_configure(dev);
return drm_attach(nbdev, tdfx_pciidlist);
return drm_attach(kdev, tdfx_pciidlist);
}
static int
tdfx_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t tdfx_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, tdfx_probe),
DEVMETHOD(device_attach, tdfx_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, tdfx_detach),
{ 0, 0 }
};
@ -96,33 +112,3 @@ DRIVER_MODULE(tdfx, vgapci, tdfx_driver, drm_devclass, 0, 0);
DRIVER_MODULE(tdfx, pci, tdfx_driver, drm_devclass, 0, 0);
#endif
MODULE_DEPEND(tdfx, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
#ifdef _LKM
CFDRIVER_DECL(tdfx, DV_TTY, NULL);
#else
CFATTACH_DECL(tdfx, sizeof(struct drm_device), drm_probe, drm_attach,
drm_detach, drm_activate);
#endif
#elif defined(__NetBSD__)
static int
tdfxdrm_probe(struct device *parent, struct cfdata *match, void *aux)
{
struct pci_attach_args *pa = aux;
return drm_probe(pa, tdfx_pciidlist);
}
static void
tdfxdrm_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
drm_device_t *dev = device_private(self);
tdfx_configure(dev);
return drm_attach(self, pa, tdfx_pciidlist);
}
CFATTACH_DECL_NEW(tdfxdrm, sizeof(drm_device_t), tdfxdrm_probe, tdfxdrm_attach,
drm_detach, drm_activate);
#endif

1
sys/external/bsd/drm/dist/bsd-core/via/Makefile vendored
View File

@ -3,7 +3,6 @@
.PATH: ${.CURDIR}/..
KMOD = via
NO_MAN = YES
NOMAN = YES
SRCS = via_dma.c via_drv.c via_ds.c via_irq.c via_map.c via_mm.c \
via_verifier.c via_video.c
SRCS += device_if.h bus_if.h pci_if.h opt_drm.h

114
sys/external/bsd/drm/dist/bsd-core/via_drv.c vendored
View File

@ -41,56 +41,71 @@ static drm_pci_id_list_t via_pciidlist[] = {
static void via_configure(struct drm_device *dev)
{
dev->driver.buf_priv_size = 1;
dev->driver.load = via_driver_load;
dev->driver.unload = via_driver_unload;
dev->driver.context_ctor = via_init_context;
dev->driver.context_dtor = via_final_context;
dev->driver.vblank_wait = via_driver_vblank_wait;
dev->driver.irq_preinstall = via_driver_irq_preinstall;
dev->driver.irq_postinstall = via_driver_irq_postinstall;
dev->driver.irq_uninstall = via_driver_irq_uninstall;
dev->driver.irq_handler = via_driver_irq_handler;
dev->driver.dma_quiescent = via_driver_dma_quiescent;
dev->driver->driver_features =
DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_HAVE_IRQ;
dev->driver.ioctls = via_ioctls;
dev->driver.max_ioctl = via_max_ioctl;
dev->driver->buf_priv_size = 1;
dev->driver->load = via_driver_load;
dev->driver->unload = via_driver_unload;
dev->driver->context_ctor = via_init_context;
dev->driver->context_dtor = via_final_context;
dev->driver->get_vblank_counter = via_get_vblank_counter;
dev->driver->enable_vblank = via_enable_vblank;
dev->driver->disable_vblank = via_disable_vblank;
dev->driver->irq_preinstall = via_driver_irq_preinstall;
dev->driver->irq_postinstall = via_driver_irq_postinstall;
dev->driver->irq_uninstall = via_driver_irq_uninstall;
dev->driver->irq_handler = via_driver_irq_handler;
dev->driver->dma_quiescent = via_driver_dma_quiescent;
dev->driver.name = DRIVER_NAME;
dev->driver.desc = DRIVER_DESC;
dev->driver.date = DRIVER_DATE;
dev->driver.major = DRIVER_MAJOR;
dev->driver.minor = DRIVER_MINOR;
dev->driver.patchlevel = DRIVER_PATCHLEVEL;
dev->driver->ioctls = via_ioctls;
dev->driver->max_ioctl = via_max_ioctl;
dev->driver.use_agp = 1;
dev->driver.use_mtrr = 1;
dev->driver.use_irq = 1;
dev->driver.use_vbl_irq = 1;
}
#ifdef __FreeBSD__
static int
via_probe(device_t dev)
{
return drm_probe(dev, via_pciidlist);
dev->driver->name = DRIVER_NAME;
dev->driver->desc = DRIVER_DESC;
dev->driver->date = DRIVER_DATE;
dev->driver->major = DRIVER_MAJOR;
dev->driver->minor = DRIVER_MINOR;
dev->driver->patchlevel = DRIVER_PATCHLEVEL;
}
static int
via_attach(device_t nbdev)
via_probe(device_t kdev)
{
struct drm_device *dev = device_get_softc(nbdev);
return drm_probe(kdev, via_pciidlist);
}
static int
via_attach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
dev->driver = malloc(sizeof(struct drm_driver_info), DRM_MEM_DRIVER,
M_WAITOK | M_ZERO);
bzero(dev, sizeof(struct drm_device));
via_configure(dev);
return drm_attach(nbdev, via_pciidlist);
return drm_attach(kdev, via_pciidlist);
}
static int
via_detach(device_t kdev)
{
struct drm_device *dev = device_get_softc(kdev);
int ret;
ret = drm_detach(kdev);
free(dev->driver, DRM_MEM_DRIVER);
return ret;
}
static device_method_t via_methods[] = {
/* Device interface */
DEVMETHOD(device_probe, via_probe),
DEVMETHOD(device_attach, via_attach),
DEVMETHOD(device_detach, drm_detach),
DEVMETHOD(device_detach, via_detach),
{ 0, 0 }
};
@ -104,32 +119,3 @@ static driver_t via_driver = {
extern devclass_t drm_devclass;
DRIVER_MODULE(via, pci, via_driver, drm_devclass, 0, 0);
MODULE_DEPEND(via, drm, 1, 1, 1);
#elif defined(__OpenBSD__)
#ifdef _LKM
CFDRIVER_DECL(via, DV_TTY, NULL);
#else
CFATTACH_DECL(via, sizeof(struct drm_device), drm_probe, drm_attach, drm_detach,
drm_activate);
#endif
#elif defined(__NetBSD__)
static int
viadrm_probe(struct device *parent, struct cfdata *match, void *opaque)
{
struct pci_attach_args *pa = opaque;
return drm_probe(pa, via_pciidlist);
}
static void
viadrm_attach(struct device *parent, struct device *self, void *opaque)
{
struct pci_attach_args *pa = opaque;
drm_device_t *dev = device_private(self);
viadrm_configure(dev);
drm_attach(self, pa, via_pciidlist);
}
CFATTACH_DECL_NEW(viadrm, sizeof(drm_device_t), viadrm_probe, viadrm_attach,
drm_detach, drm_activate);
#endif

115
sys/external/bsd/drm/dist/shared-core/drm_pciids.txt vendored
View File

@ -233,12 +233,127 @@
0x1002 0x7297 CHIP_RV560|RADEON_NEW_MEMMAP "ATI RV560"
0x1002 0x7834 CHIP_RS300|RADEON_IS_IGP|RADEON_NEW_MEMMAP "ATI Radeon RS350 9000/9100 IGP"
0x1002 0x7835 CHIP_RS300|RADEON_IS_IGP|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Radeon RS350 Mobility IGP"
0x1002 0x793f CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP "ATI Radeon X1200"
0x1002 0x7941 CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP "ATI Radeon X1200"
0x1002 0x7942 CHIP_RS600|RADEON_IS_IGP|RADEON_NEW_MEMMAP "ATI Radeon X1200"
0x1002 0x791e CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS690 X1250 IGP"
0x1002 0x791f CHIP_RS690|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS690 X1270 IGP"
0x1002 0x796c CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
0x1002 0x796d CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
0x1002 0x796e CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
0x1002 0x796f CHIP_RS740|RADEON_IS_IGP|RADEON_NEW_MEMMAP|RADEON_IS_IGPGART "ATI Radeon RS740 HD2100 IGP"
0x1002 0x9400 CHIP_R600|RADEON_NEW_MEMMAP "ATI Radeon HD 2900 XT"
0x1002 0x9401 CHIP_R600|RADEON_NEW_MEMMAP "ATI Radeon HD 2900 XT"
0x1002 0x9402 CHIP_R600|RADEON_NEW_MEMMAP "ATI Radeon HD 2900 XT"
0x1002 0x9403 CHIP_R600|RADEON_NEW_MEMMAP "ATI Radeon HD 2900 Pro"
0x1002 0x9405 CHIP_R600|RADEON_NEW_MEMMAP "ATI Radeon HD 2900 GT"
0x1002 0x940A CHIP_R600|RADEON_NEW_MEMMAP "ATI FireGL V8650"
0x1002 0x940B CHIP_R600|RADEON_NEW_MEMMAP "ATI FireGL V8600"
0x1002 0x940F CHIP_R600|RADEON_NEW_MEMMAP "ATI FireGL V7600"
0x1002 0x94C0 CHIP_RV610|RADEON_NEW_MEMMAP "RV610"
0x1002 0x94C1 CHIP_RV610|RADEON_NEW_MEMMAP "Radeon HD 2400 XT"
0x1002 0x94C3 CHIP_RV610|RADEON_NEW_MEMMAP "Radeon HD 2400 Pro"
0x1002 0x94C4 CHIP_RV610|RADEON_NEW_MEMMAP "Radeon HD 2400 PRO AGP"
0x1002 0x94C5 CHIP_RV610|RADEON_NEW_MEMMAP "FireGL V4000"
0x1002 0x94C6 CHIP_RV610|RADEON_NEW_MEMMAP "RV610"
0x1002 0x94C7 CHIP_RV610|RADEON_NEW_MEMMAP "ATI Radeon HD 2350"
0x1002 0x94C8 CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2400 XT"
0x1002 0x94C9 CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2400"
0x1002 0x94CB CHIP_RV610|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI RADEON E2400"
0x1002 0x94CC CHIP_RV610|RADEON_NEW_MEMMAP "ATI RV610"
0x1002 0x94CD CHIP_RV610|RADEON_NEW_MEMMAP "ATI FireMV 2260"
0x1002 0x9500 CHIP_RV670|RADEON_NEW_MEMMAP "ATI RV670"
0x1002 0x9501 CHIP_RV670|RADEON_NEW_MEMMAP "ATI Radeon HD3870"
0x1002 0x9504 CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3850"
0x1002 0x9505 CHIP_RV670|RADEON_NEW_MEMMAP "ATI Radeon HD3850"
0x1002 0x9506 CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3850 X2"
0x1002 0x9507 CHIP_RV670|RADEON_NEW_MEMMAP "ATI RV670"
0x1002 0x9508 CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3870"
0x1002 0x9509 CHIP_RV670|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3870 X2"
0x1002 0x950F CHIP_RV670|RADEON_NEW_MEMMAP "ATI Radeon HD3870 X2"
0x1002 0x9511 CHIP_RV670|RADEON_NEW_MEMMAP "ATI FireGL V7700"
0x1002 0x9515 CHIP_RV670|RADEON_NEW_MEMMAP "ATI Radeon HD3850"
0x1002 0x9517 CHIP_RV670|RADEON_NEW_MEMMAP "ATI Radeon HD3690"
0x1002 0x9519 CHIP_RV670|RADEON_NEW_MEMMAP "AMD Firestream 9170"
0x1002 0x9580 CHIP_RV630|RADEON_NEW_MEMMAP "ATI RV630"
0x1002 0x9581 CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2600"
0x1002 0x9583 CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 2600 XT"
0x1002 0x9586 CHIP_RV630|RADEON_NEW_MEMMAP "ATI Radeon HD 2600 XT AGP"
0x1002 0x9587 CHIP_RV630|RADEON_NEW_MEMMAP "ATI Radeon HD 2600 Pro AGP"
0x1002 0x9588 CHIP_RV630|RADEON_NEW_MEMMAP "ATI Radeon HD 2600 XT"
0x1002 0x9589 CHIP_RV630|RADEON_NEW_MEMMAP "ATI Radeon HD 2600 Pro"
0x1002 0x958A CHIP_RV630|RADEON_NEW_MEMMAP "ATI Gemini RV630"
0x1002 0x958B CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Gemini Mobility Radeon HD 2600 XT"
0x1002 0x958C CHIP_RV630|RADEON_NEW_MEMMAP "ATI FireGL V5600"
0x1002 0x958D CHIP_RV630|RADEON_NEW_MEMMAP "ATI FireGL V3600"
0x1002 0x958E CHIP_RV630|RADEON_NEW_MEMMAP "ATI Radeon HD 2600 LE"
0x1002 0x958F CHIP_RV630|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL Graphics Processor"
0x1002 0x95C0 CHIP_RV620|RADEON_NEW_MEMMAP "ATI Radeon HD 3470"
0x1002 0x95C5 CHIP_RV620|RADEON_NEW_MEMMAP "ATI Radeon HD 3450"
0x1002 0x95C6 CHIP_RV620|RADEON_NEW_MEMMAP "ATI Radeon HD 3450"
0x1002 0x95C7 CHIP_RV620|RADEON_NEW_MEMMAP "ATI Radeon HD 3430"
0x1002 0x95C9 CHIP_RV620|RADEON_NEW_MEMMAP "ATI Radeon HD 3450"
0x1002 0x95C2 CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3430"
0x1002 0x95C4 CHIP_RV620|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3400 Series"
0x1002 0x95CC CHIP_RV620|RADEON_NEW_MEMMAP "ATI FirePro V3700"
0x1002 0x95CD CHIP_RV620|RADEON_NEW_MEMMAP "ATI FireMV 2450"
0x1002 0x95CE CHIP_RV620|RADEON_NEW_MEMMAP "ATI FireMV 2260"
0x1002 0x95CF CHIP_RV620|RADEON_NEW_MEMMAP "ATI FireMV 2260"
0x1002 0x9590 CHIP_RV635|RADEON_NEW_MEMMAP "ATI ATI Radeon HD 3600 Series"
0x1002 0x9596 CHIP_RV635|RADEON_NEW_MEMMAP "ATI ATI Radeon HD 3650 AGP"
0x1002 0x9597 CHIP_RV635|RADEON_NEW_MEMMAP "ATI ATI Radeon HD 3600 PRO"
0x1002 0x9598 CHIP_RV635|RADEON_NEW_MEMMAP "ATI ATI Radeon HD 3600 XT"
0x1002 0x9599 CHIP_RV635|RADEON_NEW_MEMMAP "ATI ATI Radeon HD 3600 PRO"
0x1002 0x9591 CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3650"
0x1002 0x9593 CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 3670"
0x1002 0x9595 CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5700"
0x1002 0x959B CHIP_RV635|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility FireGL V5725"
0x1002 0x9610 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon HD 3200 Graphics"
0x1002 0x9611 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon 3100 Graphics"
0x1002 0x9612 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon HD 3200 Graphics"
0x1002 0x9613 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon 3100 Graphics"
0x1002 0x9614 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon 3300 Graphics"
0x1002 0x9615 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon 3200 Graphics"
0x1002 0x9616 CHIP_RS780|RADEON_NEW_MEMMAP|RADEON_IS_IGP "ATI Radeon 3000 Graphics"
0x1002 0x9440 CHIP_RV770|RADEON_NEW_MEMMAP "ATI Radeon 4800 Series"
0x1002 0x9441 CHIP_RV770|RADEON_NEW_MEMMAP "ATI Radeon 4870 X2"
0x1002 0x9442 CHIP_RV770|RADEON_NEW_MEMMAP "ATI Radeon 4800 Series"
0x1002 0x944C CHIP_RV770|RADEON_NEW_MEMMAP "ATI Radeon 4800 Series"
0x1002 0x9450 CHIP_RV770|RADEON_NEW_MEMMAP "AMD FireStream 9270"
0x1002 0x9452 CHIP_RV770|RADEON_NEW_MEMMAP "AMD FireStream 9250"
0x1002 0x9444 CHIP_RV770|RADEON_NEW_MEMMAP "ATI FirePro V8750 (FireGL)"
0x1002 0x9446 CHIP_RV770|RADEON_NEW_MEMMAP "ATI FirePro V7760 (FireGL)"
0x1002 0x9456 CHIP_RV770|RADEON_NEW_MEMMAP "ATI FirePro V8700 (FireGL)"
0x1002 0x944E CHIP_RV770|RADEON_NEW_MEMMAP "ATI FirePro RV770"
0x1002 0x944A CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 4850"
0x1002 0x944B CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 4850 X2"
0x1002 0x945A CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 4870"
0x1002 0x945B CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon M98"
0x1002 0x9460 CHIP_RV770|RADEON_NEW_MEMMAP "ATI Radeon 4800 Series"
0x1002 0x9462 CHIP_RV770|RADEON_NEW_MEMMAP "ATI Radeon 4800 Series"
0x1002 0x946A CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI FirePro M7750"
0x1002 0x946B CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI M98"
0x1002 0x947A CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI M98"
0x1002 0x947B CHIP_RV770|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI M98"
0x1002 0x9487 CHIP_RV730|RADEON_NEW_MEMMAP "ATI Radeon RV730 (AGP)"
0x1002 0x948F CHIP_RV730|RADEON_NEW_MEMMAP "ATI Radeon RV730 (AGP)"
0x1002 0x9490 CHIP_RV730|RADEON_NEW_MEMMAP "ATI Radeon HD 4670"
0x1002 0x9498 CHIP_RV730|RADEON_NEW_MEMMAP "ATI Radeon HD 4650"
0x1002 0x9480 CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 4650"
0x1002 0x9488 CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon HD 4670"
0x1002 0x9489 CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI FirePro M5750"
0x1002 0x9491 CHIP_RV730|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI RADEON E4600"
0x1002 0x949C CHIP_RV730|RADEON_NEW_MEMMAP "ATI FirePro V7750 (FireGL)"
0x1002 0x949E CHIP_RV730|RADEON_NEW_MEMMAP "ATI FirePro V5700 (FireGL)"
0x1002 0x949F CHIP_RV730|RADEON_NEW_MEMMAP "ATI FirePro V3750 (FireGL)"
0x1002 0x9540 CHIP_RV710|RADEON_NEW_MEMMAP "ATI Radeon HD 4550"
0x1002 0x9541 CHIP_RV710|RADEON_NEW_MEMMAP "ATI Radeon RV710"
0x1002 0x9542 CHIP_RV710|RADEON_NEW_MEMMAP "ATI Radeon RV710"
0x1002 0x954E CHIP_RV710|RADEON_NEW_MEMMAP "ATI Radeon RV710"
0x1002 0x954F CHIP_RV710|RADEON_NEW_MEMMAP "ATI Radeon HD 4350"
0x1002 0x9552 CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon 4300 Series"
0x1002 0x9553 CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon 4500 Series"
0x1002 0x9555 CHIP_RV710|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP "ATI Mobility Radeon 4500 Series"
[r128]
0x1002 0x4c45 0 "ATI Rage 128 Mobility LE (PCI)"

866
sys/external/bsd/drm/dist/shared-core/i915_irq.c vendored
View File

File diff suppressed because it is too large Load Diff

9
sys/external/bsd/drm/dist/shared-core/i915_suspend.c vendored
View File

@ -243,9 +243,8 @@ int i915_save_state(struct drm_device *dev)
#if defined(__FreeBSD__)
dev_priv->saveLBB = (u8) pci_read_config(dev->device, LBB, 1);
#elif defined(__NetBSD__)
dev_priv->saveLBB = (u8)
pci_conf_read(dev->pa.pa_pc, dev->pa.pa_tag, LBB);
#elif defined(__NetBSD__)
dev_priv->saveLBB = (u8) pci_conf_read(dev->pa.pa_pc, dev->pa.pa_tag, LBB);
#else
pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
#endif
@ -375,8 +374,8 @@ int i915_restore_state(struct drm_device *dev)
#if defined(__FreeBSD__)
pci_write_config(dev->device, LBB, dev_priv->saveLBB, 1);
#elif defined(__NetBSD__)
pci_conf_write(dev->pa.pa_pc, dev->pa.pa_tag, LBB, dev_priv->saveLBB);
#elif defined(__NetBSD__)
pci_conf_write(dev->pa.pa_pc, dev->pa.pa_tag, LBB, dev_priv->saveLBB);
#else
pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
#endif

23
sys/external/bsd/drm/dist/shared-core/mach64_drv.h vendored
View File

@ -163,6 +163,7 @@ extern int mach64_dma_blit(struct drm_device *dev, void *data,
extern int mach64_get_param(struct drm_device *dev, void *data,
struct drm_file *file_priv);
extern int mach64_driver_load(struct drm_device * dev, unsigned long flags);
extern u32 mach64_get_vblank_counter(struct drm_device *dev, int crtc);
extern int mach64_enable_vblank(struct drm_device *dev, int crtc);
extern void mach64_disable_vblank(struct drm_device *dev, int crtc);
@ -776,7 +777,7 @@ do { \
#define DMAADVANCE( dev_priv, _discard ) \
do { \
struct list_head *ptr; \
int myret; \
int ret; \
\
if ( MACH64_VERBOSE ) { \
DRM_INFO( "DMAADVANCE() in \n" ); \
@ -789,9 +790,9 @@ do { \
} \
if (_buf->pending) { \
/* This is a resued buffer, so we need to find it in the pending list */ \
if ((myret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \
if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \
DRM_ERROR( "DMAADVANCE(): couldn't find pending buf %d\n", _buf->idx ); \
return myret; \
return ret; \
} \
if (_entry->discard) { \
DRM_ERROR( "DMAADVANCE(): sending discarded pending buf %d\n", _buf->idx ); \
@ -810,18 +811,18 @@ do { \
list_add_tail(ptr, &dev_priv->pending); \
} \
_entry->discard = (_discard); \
if ((myret = mach64_add_buf_to_ring( dev_priv, _entry ))) \
return myret; \
if ((ret = mach64_add_buf_to_ring( dev_priv, _entry ))) \
return ret; \
} while (0)
#define DMADISCARDBUF() \
do { \
if (_entry == NULL) { \
int myret; \
if ((myret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \
int ret; \
if ((ret = mach64_find_pending_buf_entry(dev_priv, &_entry, _buf))) { \
DRM_ERROR( "couldn't find pending buf %d\n", \
_buf->idx ); \
return myret; \
return ret; \
} \
} \
_entry->discard = 1; \
@ -830,7 +831,7 @@ do { \
#define DMAADVANCEHOSTDATA( dev_priv ) \
do { \
struct list_head *ptr; \
int myret; \
int ret; \
\
if ( MACH64_VERBOSE ) { \
DRM_INFO( "DMAADVANCEHOSTDATA() in \n" ); \
@ -852,8 +853,8 @@ do { \
_entry->buf->pending = 1; \
list_add_tail(ptr, &dev_priv->pending); \
_entry->discard = 1; \
if ((myret = mach64_add_hostdata_buf_to_ring( dev_priv, _entry ))) \
return myret; \
if ((ret = mach64_add_hostdata_buf_to_ring( dev_priv, _entry ))) \
return ret; \
} while (0)
#endif /* __MACH64_DRV_H__ */

52
sys/external/bsd/drm/dist/shared-core/nv_drv.h vendored
View File

@ -1,52 +0,0 @@
/* nv_drv.h -- NV DRM template customization -*- linux-c -*-
* Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com
*
* Copyright 2005 Lars Knoll <lars@trolltech.com>
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Authors:
* Lars Knoll <lars@trolltech.com>
*/
#ifndef __NV_H__
#define __NV_H__
/* General customization:
*/
#define DRIVER_AUTHOR "Lars Knoll"
#define DRIVER_NAME "nv"
#define DRIVER_DESC "NV"
#define DRIVER_DATE "20051006"
#define DRIVER_MAJOR 0
#define DRIVER_MINOR 0
#define DRIVER_PATCHLEVEL 1
#define NV04 04
#define NV10 10
#define NV20 20
#define NV30 30
#define NV40 40
#endif

2204
sys/external/bsd/drm/dist/shared-core/r600_cp.c vendored Normal file
View File

File diff suppressed because it is too large Load Diff

9025
sys/external/bsd/drm/dist/shared-core/r600_microcode.h vendored
View File

File diff suppressed because it is too large Load Diff

564
sys/external/bsd/drm/dist/shared-core/radeon_cp.c vendored
View File

@ -41,6 +41,20 @@
static int radeon_do_cleanup_cp(struct drm_device * dev);
static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr)
{
u32 ret;
if (addr < 0x10000)
ret = DRM_READ32( dev_priv->mmio, addr );
else {
DRM_WRITE32( dev_priv->mmio, RADEON_MM_INDEX, addr );
ret = DRM_READ32( dev_priv->mmio, RADEON_MM_DATA );
}
return ret;
}
static u32 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
{
u32 ret;
@ -68,62 +82,107 @@ static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
return ret;
}
static u32 RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
{
u32 ret;
RADEON_WRITE(RS600_MC_INDEX, ((addr & RS600_MC_ADDR_MASK) |
RS600_MC_IND_CITF_ARB0));
ret = RADEON_READ(RS600_MC_DATA);
return ret;
}
static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr)
{
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
return RS690_READ_MCIND(dev_priv, addr);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
return RS600_READ_MCIND(dev_priv, addr);
else
return RS480_READ_MCIND(dev_priv, addr);
}
u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv)
{
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
return RADEON_READ(R700_MC_VM_FB_LOCATION);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
return RADEON_READ(R600_MC_VM_FB_LOCATION);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
return RS600_READ_MCIND(dev_priv, RS600_MC_FB_LOCATION);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION);
else
return RADEON_READ(RADEON_MC_FB_LOCATION);
}
static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc)
{
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
RADEON_WRITE(R700_MC_VM_FB_LOCATION, fb_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
RADEON_WRITE(R600_MC_VM_FB_LOCATION, fb_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
RS600_WRITE_MCIND(RS600_MC_FB_LOCATION, fb_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc);
else
RADEON_WRITE(RADEON_MC_FB_LOCATION, fb_loc);
}
static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc)
{
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
/*R6xx/R7xx: AGP_TOP and BOT are actually 18 bits each */
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) {
RADEON_WRITE(R700_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */
RADEON_WRITE(R700_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff);
} else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
RADEON_WRITE(R600_MC_VM_AGP_BOT, agp_loc & 0xffff); /* FIX ME */
RADEON_WRITE(R600_MC_VM_AGP_TOP, (agp_loc >> 16) & 0xffff);
} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515)
R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
RS600_WRITE_MCIND(RS600_MC_AGP_LOCATION, agp_loc);
else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515)
R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc);
else
RADEON_WRITE(RADEON_MC_AGP_LOCATION, agp_loc);
}
static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base)
{
u32 agp_base_hi = upper_32_bits(agp_base);
u32 agp_base_lo = agp_base & 0xffffffff;
u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff;
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
// R6xx/R7xx must be aligned to a 4MB boundry
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
RADEON_WRITE(R700_MC_VM_AGP_BASE, r6xx_agp_base); /* FIX ME */
else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
RADEON_WRITE(R600_MC_VM_AGP_BASE, r6xx_agp_base); /* FIX ME */
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) {
R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo);
R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi);
} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo);
RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi);
} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
RS690_WRITE_MCIND(RS600_AGP_BASE, agp_base_lo);
RS690_WRITE_MCIND(RS600_AGP_BASE_2, agp_base_hi);
} else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) {
R500_WRITE_MCIND(R520_MC_AGP_BASE, agp_base_lo);
R500_WRITE_MCIND(R520_MC_AGP_BASE_2, agp_base_hi);
@ -311,85 +370,80 @@ static void radeon_init_pipes(drm_radeon_private_t * dev_priv)
* CP control, initialization
*/
/* Load the microcode for the CP */
static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
{
const u32 (*cp)[2];
int i;
DRM_DEBUG("\n");
switch (dev_priv->flags & RADEON_FAMILY_MASK) {
case CHIP_R100:
case CHIP_RV100:
case CHIP_RV200:
case CHIP_RS100:
case CHIP_RS200:
DRM_INFO("Loading R100 Microcode\n");
cp = R100_cp_microcode;
break;
case CHIP_R200:
case CHIP_RV250:
case CHIP_RV280:
case CHIP_RS300:
DRM_INFO("Loading R200 Microcode\n");
cp = R200_cp_microcode;
break;
case CHIP_R300:
case CHIP_R350:
case CHIP_RV350:
case CHIP_RV380:
case CHIP_RS400:
case CHIP_RS480:
DRM_INFO("Loading R300 Microcode\n");
cp = R300_cp_microcode;
break;
case CHIP_R420:
case CHIP_R423:
case CHIP_RV410:
DRM_INFO("Loading R400 Microcode\n");
cp = R420_cp_microcode;
break;
case CHIP_RS690:
case CHIP_RS740:
DRM_INFO("Loading RS690/RS740 Microcode\n");
cp = RS690_cp_microcode;
break;
case CHIP_RS600:
DRM_INFO("Loading RS600 Microcode\n");
cp = RS600_cp_microcode;
break;
case CHIP_RV515:
case CHIP_R520:
case CHIP_RV530:
case CHIP_R580:
case CHIP_RV560:
case CHIP_RV570:
DRM_INFO("Loading R500 Microcode\n");
cp = R520_cp_microcode;
break;
default:
return;
}
radeon_do_wait_for_idle(dev_priv);
RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R100) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV100) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV200) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS100) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS200)) {
DRM_INFO("Loading R100 Microcode\n");
for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
R100_cp_microcode[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
R100_cp_microcode[i][0]);
}
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R200) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV250) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV280) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS300)) {
DRM_INFO("Loading R200 Microcode\n");
for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
R200_cp_microcode[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
R200_cp_microcode[i][0]);
}
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV350) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV380) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
DRM_INFO("Loading R300 Microcode\n");
for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
R300_cp_microcode[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
R300_cp_microcode[i][0]);
}
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV410)) {
DRM_INFO("Loading R400 Microcode\n");
for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
R420_cp_microcode[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
R420_cp_microcode[i][0]);
}
} else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) {
DRM_INFO("Loading RS690 Microcode\n");
for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
RS690_cp_microcode[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
RS690_cp_microcode[i][0]);
}
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R520) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R580) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV560) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV570)) {
DRM_INFO("Loading R500 Microcode\n");
for (i = 0; i < 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
R520_cp_microcode[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
R520_cp_microcode[i][0]);
}
for (i = 0; i != 256; i++) {
RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, cp[i][1]);
RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, cp[i][0]);
}
}
/* Flush any pending commands to the CP. This should only be used just
* prior to a wait for idle, as it informs the engine that the command
* stream is ending.
@ -601,17 +655,10 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
} else
#endif
{
struct drm_sg_mem *entry = dev->sg;
unsigned long tmp_ofs, page_ofs;
tmp_ofs = dev_priv->ring_rptr->offset -
(unsigned long)dev->sg->virtual;
page_ofs = tmp_ofs >> PAGE_SHIFT;
RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]);
DRM_DEBUG("ring rptr: offset=0x%08lx handle=0x%08lx\n",
(unsigned long)entry->busaddr[page_ofs],
entry->handle + tmp_ofs);
RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR,
dev_priv->ring_rptr->offset
- ((unsigned long) dev->sg->virtual)
+ dev_priv->gart_vm_start);
}
/* Set ring buffer size */
@ -628,9 +675,6 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
dev_priv->ring.size_l2qw);
#endif
/* Start with assuming that writeback doesn't work */
dev_priv->writeback_works = 0;
/* Initialize the scratch register pointer. This will cause
* the scratch register values to be written out to memory
* whenever they are updated.
@ -648,8 +692,19 @@ static void radeon_cp_init_ring_buffer(struct drm_device * dev,
RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
/* Turn on bus mastering */
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) {
/* rs600/rs690/rs740 */
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RS600_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
} else if (((dev_priv->flags & RADEON_FAMILY_MASK) <= CHIP_RV350) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R420) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS400) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS480)) {
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
RADEON_WRITE(RADEON_BUS_CNTL, tmp);
} /* PCIE cards appears to not need this */
dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
@ -721,7 +776,8 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL);
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690)
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740))
IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN |
RS690_BLOCK_GFX_D3_EN));
else
@ -779,6 +835,82 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on)
}
}
/* Enable or disable IGP GART on the chip */
static void rs600_set_igpgart(drm_radeon_private_t * dev_priv, int on)
{
u32 temp;
int i;
if (on) {
DRM_DEBUG("programming igp gart %08X %08lX %08X\n",
dev_priv->gart_vm_start,
(long)dev_priv->gart_info.bus_addr,
dev_priv->gart_size);
IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (RS600_EFFECTIVE_L2_CACHE_SIZE(6) |
RS600_EFFECTIVE_L2_QUEUE_SIZE(6)));
for (i = 0; i < 19; i++)
IGP_WRITE_MCIND(RS600_MC_PT0_CLIENT0_CNTL + i,
(RS600_ENABLE_TRANSLATION_MODE_OVERRIDE |
RS600_SYSTEM_ACCESS_MODE_IN_SYS |
RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH |
RS600_EFFECTIVE_L1_CACHE_SIZE(3) |
RS600_ENABLE_FRAGMENT_PROCESSING |
RS600_EFFECTIVE_L1_QUEUE_SIZE(3)));
IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL, (RS600_ENABLE_PAGE_TABLE |
RS600_PAGE_TABLE_TYPE_FLAT));
/* disable all other contexts */
for (i = 1; i < 8; i++)
IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_CNTL + i, 0);
/* setup the page table aperture */
IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR,
dev_priv->gart_info.bus_addr);
IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR,
dev_priv->gart_vm_start);
IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR,
(dev_priv->gart_vm_start + dev_priv->gart_size - 1));
IGP_WRITE_MCIND(RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR, 0);
/* setup the system aperture */
IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR,
dev_priv->gart_vm_start);
IGP_WRITE_MCIND(RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR,
(dev_priv->gart_vm_start + dev_priv->gart_size - 1));
/* enable page tables */
temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, (temp | RS600_ENABLE_PT));
temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1);
IGP_WRITE_MCIND(RS600_MC_CNTL1, (temp | RS600_ENABLE_PAGE_TABLES));
/* invalidate the cache */
temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE);
IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
temp |= RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE;
IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
temp &= ~(RS600_INVALIDATE_ALL_L1_TLBS | RS600_INVALIDATE_L2_CACHE);
IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, temp);
temp = IGP_READ_MCIND(dev_priv, RS600_MC_PT0_CNTL);
} else {
IGP_WRITE_MCIND(RS600_MC_PT0_CNTL, 0);
temp = IGP_READ_MCIND(dev_priv, RS600_MC_CNTL1);
temp &= ~RS600_ENABLE_PAGE_TABLES;
IGP_WRITE_MCIND(RS600_MC_CNTL1, temp);
}
}
static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on)
{
u32 tmp = RADEON_READ_PCIE(dev_priv, RADEON_PCIE_TX_GART_CNTL);
@ -814,11 +946,17 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
u32 tmp;
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) ||
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740) ||
(dev_priv->flags & RADEON_IS_IGPGART)) {
radeon_set_igpgart(dev_priv, on);
return;
}
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) {
rs600_set_igpgart(dev_priv, on);
return;
}
if (dev_priv->flags & RADEON_IS_PCIE) {
radeon_set_pciegart(dev_priv, on);
return;
@ -853,6 +991,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
int ret;
DRM_DEBUG("\n");
@ -963,13 +1102,6 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
RADEON_ROUND_PREC_8TH_PIX);
#ifdef __NetBSD__ /* XXX */
init->ring_offset = DRM_NETBSD_HANDLE2ADDR(init->ring_offset);
init->ring_rptr_offset = DRM_NETBSD_HANDLE2ADDR(init->ring_rptr_offset);
init->buffers_offset = DRM_NETBSD_HANDLE2ADDR(init->buffers_offset);
init->gart_textures_offset = DRM_NETBSD_HANDLE2ADDR(init->gart_textures_offset);
#endif
dev_priv->ring_offset = init->ring_offset;
dev_priv->ring_rptr_offset = init->ring_rptr_offset;
dev_priv->buffers_offset = init->buffers_offset;
@ -984,8 +1116,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
dev_priv->cp_ring = drm_core_findmap(dev, init->ring_offset);
if (!dev_priv->cp_ring) {
DRM_ERROR("could not find cp ring region! offset 0x%lx\n",
init->ring_offset);
DRM_ERROR("could not find cp ring region!\n");
radeon_do_cleanup_cp(dev);
return -EINVAL;
}
@ -1019,9 +1150,9 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
#if __OS_HAS_AGP
if (dev_priv->flags & RADEON_IS_AGP) {
drm_core_ioremap(dev_priv->cp_ring, dev);
drm_core_ioremap(dev_priv->ring_rptr, dev);
drm_core_ioremap(dev->agp_buffer_map, dev);
drm_core_ioremap_wc(dev_priv->cp_ring, dev);
drm_core_ioremap_wc(dev_priv->ring_rptr, dev);
drm_core_ioremap_wc(dev->agp_buffer_map, dev);
if (!dev_priv->cp_ring->handle ||
!dev_priv->ring_rptr->handle ||
!dev->agp_buffer_map->handle) {
@ -1117,9 +1248,10 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
+ dev_priv->gart_vm_start);
DRM_DEBUG("dev_priv->gart_size %d\n", dev_priv->gart_size);
DRM_DEBUG("dev_priv->gart_vm_start 0x%x\n", dev_priv->gart_vm_start);
DRM_DEBUG("dev_priv->gart_vm_start 0x%x\n",
(unsigned int) dev_priv->gart_vm_start);
DRM_DEBUG("dev_priv->gart_buffers_offset 0x%lx\n",
dev_priv->gart_buffers_offset);
dev_priv->gart_buffers_offset);
dev_priv->ring.start = (u32 *) dev_priv->cp_ring->handle;
dev_priv->ring.end = ((u32 *) dev_priv->cp_ring->handle
@ -1155,6 +1287,12 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
dev_priv->gart_info.table_size;
drm_core_ioremap_wc(&dev_priv->gart_info.mapping, dev);
if (!dev_priv->gart_info.mapping.handle) {
DRM_ERROR("ioremap failed.\n");
radeon_do_cleanup_cp(dev);
return -EINVAL;
}
dev_priv->gart_info.addr =
dev_priv->gart_info.mapping.handle;
@ -1168,6 +1306,7 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
DRM_DEBUG("Setting phys_pci_gart to %p %08lX\n",
dev_priv->gart_info.addr,
dev_priv->pcigart_offset);
} else {
if (dev_priv->flags & RADEON_IS_IGPGART)
dev_priv->gart_info.gart_reg_if = DRM_ATI_GART_IGP;
@ -1185,7 +1324,12 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
}
}
if (!drm_ati_pcigart_init(dev, &dev_priv->gart_info)) {
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
ret = r600_page_table_init(dev);
else
ret = drm_ati_pcigart_init(dev, &dev_priv->gart_info);
if (!ret) {
DRM_ERROR("failed to init PCI GART!\n");
radeon_do_cleanup_cp(dev);
return -ENOMEM;
@ -1195,6 +1339,9 @@ static int radeon_do_init_cp(struct drm_device * dev, drm_radeon_init_t * init)
radeon_set_pcigart(dev_priv, 1);
}
/* Start with assuming that writeback doesn't work */
dev_priv->writeback_works = 0;
radeon_cp_load_microcode(dev_priv);
radeon_cp_init_ring_buffer(dev, dev_priv);
@ -1239,8 +1386,13 @@ static int radeon_do_cleanup_cp(struct drm_device * dev)
if (dev_priv->gart_info.bus_addr) {
/* Turn off PCI GART */
radeon_set_pcigart(dev_priv, 0);
if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
DRM_ERROR("failed to cleanup PCI GART!\n");
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600)
r600_page_table_cleanup(dev, &dev_priv->gart_info);
else {
if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info))
DRM_ERROR("failed to cleanup PCI GART!\n");
}
}
if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB)
@ -1297,6 +1449,7 @@ static int radeon_do_resume_cp(struct drm_device * dev)
int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
drm_radeon_init_t *init = data;
LOCK_TEST_WITH_RETURN(dev, file_priv);
@ -1309,8 +1462,13 @@ int radeon_cp_init(struct drm_device *dev, void *data, struct drm_file *file_pri
case RADEON_INIT_R200_CP:
case RADEON_INIT_R300_CP:
return radeon_do_init_cp(dev, init);
case RADEON_INIT_R600_CP:
return r600_do_init_cp(dev, init);
case RADEON_CLEANUP_CP:
return radeon_do_cleanup_cp(dev);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
return r600_do_cleanup_cp(dev);
else
return radeon_do_cleanup_cp(dev);
}
return -EINVAL;
@ -1333,7 +1491,10 @@ int radeon_cp_start(struct drm_device *dev, void *data, struct drm_file *file_pr
return 0;
}
radeon_do_cp_start(dev_priv);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
r600_do_cp_start(dev_priv);
else
radeon_do_cp_start(dev_priv);
return 0;
}
@ -1364,7 +1525,10 @@ int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_pri
* code so that the DRM ioctl wrapper can try again.
*/
if (stop->idle) {
ret = radeon_do_cp_idle(dev_priv);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
ret = r600_do_cp_idle(dev_priv);
else
ret = radeon_do_cp_idle(dev_priv);
if (ret)
return ret;
}
@ -1373,10 +1537,16 @@ int radeon_cp_stop(struct drm_device *dev, void *data, struct drm_file *file_pri
* we will get some dropped triangles as they won't be fully
* rendered before the CP is shut down.
*/
radeon_do_cp_stop(dev_priv);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
r600_do_cp_stop(dev_priv);
else
radeon_do_cp_stop(dev_priv);
/* Reset the engine */
radeon_do_engine_reset(dev);
if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600)
radeon_do_engine_reset(dev);
else
r600_do_engine_reset(dev);
return 0;
}
@ -1389,37 +1559,58 @@ void radeon_do_release(struct drm_device * dev)
if (dev_priv) {
if (dev_priv->cp_running) {
/* Stop the cp */
while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
while ((ret = r600_do_cp_idle(dev_priv)) != 0) {
DRM_DEBUG("r600_do_cp_idle %d\n", ret);
#ifdef __linux__
schedule();
schedule();
#else
#if defined(__FreeBSD__) && __FreeBSD_version > 500000
mtx_sleep(&ret, &dev->dev_lock, PZERO, "rdnrel",
1);
#elif defined(__NetBSD__)
mtsleep(&ret, PZERO, "rdnrel", 1,
&dev->dev_lock);
mtx_sleep(&ret, &dev->dev_lock, PZERO, "rdnrel",
1);
#elif defined(__NetBSD__)
mtsleep(&ret, 0, "rdnrel", 1, &dev->dev_lock);
#else
tsleep(&ret, PZERO, "rdnrel", 1);
tsleep(&ret, PZERO, "rdnrel", 1);
#endif
#endif
}
r600_do_cp_stop(dev_priv);
r600_do_engine_reset(dev);
} else {
while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
#ifdef __linux__
schedule();
#else
#if defined(__FreeBSD__) && __FreeBSD_version > 500000
mtx_sleep(&ret, &dev->dev_lock, PZERO, "rdnrel",
1);
#elif defined(__NetBSD__)
mtsleep(&ret, 0, "rdnrel", 1, &dev->dev_lock);
#else
tsleep(&ret, PZERO, "rdnrel", 1);
#endif
#endif
}
radeon_do_cp_stop(dev_priv);
radeon_do_engine_reset(dev);
}
radeon_do_cp_stop(dev_priv);
radeon_do_engine_reset(dev);
}
/* Disable *all* interrupts */
if (dev_priv->mmio) /* remove this after permanent addmaps */
RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R600) {
/* Disable *all* interrupts */
if (dev_priv->mmio) /* remove this after permanent addmaps */
RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
if (dev_priv->mmio) { /* remove all surfaces */
for (i = 0; i < RADEON_MAX_SURFACES; i++) {
RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0);
RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND +
16 * i, 0);
RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND +
16 * i, 0);
if (dev_priv->mmio) { /* remove all surfaces */
for (i = 0; i < RADEON_MAX_SURFACES; i++) {
RADEON_WRITE(RADEON_SURFACE0_INFO + 16 * i, 0);
RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND +
16 * i, 0);
RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND +
16 * i, 0);
}
}
}
@ -1428,7 +1619,10 @@ void radeon_do_release(struct drm_device * dev)
radeon_mem_takedown(&(dev_priv->fb_heap));
/* deallocate kernel resources */
radeon_do_cleanup_cp(dev);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
r600_do_cleanup_cp(dev);
else
radeon_do_cleanup_cp(dev);
}
}
@ -1446,7 +1640,10 @@ int radeon_cp_reset(struct drm_device *dev, void *data, struct drm_file *file_pr
return -EINVAL;
}
radeon_do_cp_reset(dev_priv);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
r600_do_cp_reset(dev_priv);
else
radeon_do_cp_reset(dev_priv);
/* The CP is no longer running after an engine reset */
dev_priv->cp_running = 0;
@ -1461,24 +1658,35 @@ int radeon_cp_idle(struct drm_device *dev, void *data, struct drm_file *file_pri
LOCK_TEST_WITH_RETURN(dev, file_priv);
return radeon_do_cp_idle(dev_priv);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
return r600_do_cp_idle(dev_priv);
else
return radeon_do_cp_idle(dev_priv);
}
/* Added by Charl P. Botha to call radeon_do_resume_cp().
*/
int radeon_cp_resume(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
return radeon_do_resume_cp(dev);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
return r600_do_resume_cp(dev);
else
return radeon_do_resume_cp(dev);
}
int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_file *file_priv)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
DRM_DEBUG("\n");
LOCK_TEST_WITH_RETURN(dev, file_priv);
return radeon_do_engine_reset(dev);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
return r600_do_engine_reset(dev);
else
return radeon_do_engine_reset(dev);
}
/* ================================================================
@ -1528,7 +1736,11 @@ struct drm_buf *radeon_freelist_get(struct drm_device * dev)
start = dev_priv->last_buf;
for (t = 0; t < dev_priv->usec_timeout; t++) {
u32 done_age = GET_SCRATCH(1);
u32 done_age;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
done_age = GET_R600_SCRATCH(1);
else
done_age = GET_SCRATCH(1);
DRM_DEBUG("done_age = %d\n", done_age);
for (i = start; i < dma->buf_count; i++) {
buf = dma->buflist[i];
@ -1611,10 +1823,20 @@ int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n)
{
drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
int i;
u32 last_head = GET_RING_HEAD(dev_priv);
u32 last_head;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
last_head = R600_GET_RING_HEAD(dev_priv);
else
last_head = GET_RING_HEAD(dev_priv);
for (i = 0; i < dev_priv->usec_timeout; i++) {
u32 head = GET_RING_HEAD(dev_priv);
u32 head;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
head = R600_GET_RING_HEAD(dev_priv);
else
head = GET_RING_HEAD(dev_priv);
ring->space = (head - ring->tail) * sizeof(u32);
if (ring->space <= 0)
@ -1698,6 +1920,47 @@ int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_
return ret;
}
void radeon_commit_ring(drm_radeon_private_t *dev_priv)
{
int i;
u32 *ring;
int tail_aligned;
/* check if the ring is padded out to 16-dword alignment */
tail_aligned = dev_priv->ring.tail & 0xf;
if (tail_aligned) {
int num_p2 = 16 - tail_aligned;
ring = dev_priv->ring.start;
/* pad with some CP_PACKET2 */
for (i = 0; i < num_p2; i++)
ring[dev_priv->ring.tail + i] = CP_PACKET2();
dev_priv->ring.tail += i;
dev_priv->ring.space -= num_p2 * sizeof(u32);
}
dev_priv->ring.tail &= dev_priv->ring.tail_mask;
DRM_MEMORYBARRIER();
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
R600_GET_RING_HEAD( dev_priv );
else
GET_RING_HEAD( dev_priv );
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
RADEON_WRITE(R600_CP_RB_WPTR, dev_priv->ring.tail);
/* read from PCI bus to ensure correct posting */
RADEON_READ(R600_CP_RB_RPTR);
} else {
RADEON_WRITE(RADEON_CP_RB_WPTR, dev_priv->ring.tail);
/* read from PCI bus to ensure correct posting */
RADEON_READ(RADEON_CP_RB_RPTR);
}
}
int radeon_driver_load(struct drm_device *dev, unsigned long flags)
{
drm_radeon_private_t *dev_priv;
@ -1718,6 +1981,7 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
case CHIP_R300:
case CHIP_R350:
case CHIP_R420:
case CHIP_R423:
case CHIP_RV410:
case CHIP_RV515:
case CHIP_R520:
@ -1738,6 +2002,12 @@ int radeon_driver_load(struct drm_device *dev, unsigned long flags)
else
dev_priv->flags |= RADEON_IS_PCI;
ret = drm_vblank_init(dev, 2);
if (ret) {
radeon_driver_unload(dev);
return ret;
}
DRM_DEBUG("%s card detected\n",
((dev_priv->flags & RADEON_IS_AGP) ? "AGP" : (((dev_priv->flags & RADEON_IS_PCIE) ? "PCIE" : "PCI"))));
return ret;

7
sys/external/bsd/drm/dist/shared-core/radeon_drm.h vendored
View File

@ -303,6 +303,7 @@ typedef union {
#define RADEON_INDEX_PRIM_OFFSET 20
#define RADEON_SCRATCH_REG_OFFSET 32
#define R600_SCRATCH_REG_OFFSET 256
#define RADEON_NR_SAREA_CLIPRECTS 12
@ -526,7 +527,8 @@ typedef struct drm_radeon_init {
RADEON_INIT_CP = 0x01,
RADEON_CLEANUP_CP = 0x02,
RADEON_INIT_R200_CP = 0x03,
RADEON_INIT_R300_CP = 0x04
RADEON_INIT_R300_CP = 0x04,
RADEON_INIT_R600_CP = 0x05,
} func;
unsigned long sarea_priv_offset;
int is_pci; /* for overriding only */
@ -652,6 +654,9 @@ typedef struct drm_radeon_indirect {
int discard;
} drm_radeon_indirect_t;
#define RADEON_INDIRECT_DISCARD (1 << 0)
#define RADEON_INDIRECT_NOFLUSH (1 << 1)
/* enum for card type parameters */
#define RADEON_CARD_PCI 0
#define RADEON_CARD_AGP 1

661
sys/external/bsd/drm/dist/shared-core/radeon_drv.h vendored
View File

@ -123,16 +123,29 @@ enum radeon_family {
CHIP_RV350,
CHIP_RV380,
CHIP_R420,
CHIP_R423,
CHIP_RV410,
CHIP_RS400,
CHIP_RS480,
CHIP_RS600,
CHIP_RS690,
CHIP_RS740,
CHIP_RV515,
CHIP_R520,
CHIP_RV530,
CHIP_RV560,
CHIP_RV570,
CHIP_R580,
CHIP_R600,
CHIP_RV610,
CHIP_RV630,
CHIP_RV620,
CHIP_RV635,
CHIP_RV670,
CHIP_RS780,
CHIP_RV770,
CHIP_RV730,
CHIP_RV710,
CHIP_LAST,
};
@ -157,6 +170,9 @@ enum radeon_chip_flags {
DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(RADEON_CP_RB_RPTR))
#define SET_RING_HEAD(dev_priv,val) DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
#define R600_GET_RING_HEAD(dev_priv) (dev_priv->writeback_works ? \
DRM_READ32( (dev_priv)->ring_rptr, 0 ) : RADEON_READ(R600_CP_RB_RPTR))
typedef struct drm_radeon_freelist {
unsigned int age;
struct drm_buf *buf;
@ -314,6 +330,26 @@ typedef struct drm_radeon_private {
int num_gb_pipes;
int track_flush;
uint32_t chip_family; /* extract from flags */
/* r6xx/r7xx pipe/shader config */
int r600_max_pipes;
int r600_max_tile_pipes;
int r600_max_simds;
int r600_max_backends;
int r600_max_gprs;
int r600_max_threads;
int r600_max_stack_entries;
int r600_max_hw_contexts;
int r600_max_gs_threads;
int r600_sx_max_export_size;
int r600_sx_max_export_pos_size;
int r600_sx_max_export_smx_size;
int r600_sq_num_cf_insts;
int r700_sx_num_of_sets;
int r700_sc_prim_fifo_size;
int r700_sc_hiz_tile_fifo_size;
int r700_sc_earlyz_tile_fifo_fize;
} drm_radeon_private_t;
typedef struct drm_radeon_buf_priv {
@ -357,11 +393,13 @@ extern int radeon_engine_reset(struct drm_device *dev, void *data, struct drm_fi
extern int radeon_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int radeon_cp_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
extern u32 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr);
extern void radeon_freelist_reset(struct drm_device * dev);
extern struct drm_buf *radeon_freelist_get(struct drm_device * dev);
extern int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n);
extern void radeon_commit_ring(drm_radeon_private_t *dev_priv);
extern int radeon_do_cp_idle(drm_radeon_private_t * dev_priv);
@ -401,6 +439,10 @@ extern int radeon_driver_open(struct drm_device * dev,
extern long radeon_compat_ioctl(struct file *filp, unsigned int cmd,
unsigned long arg);
void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc);
void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc);
void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base);
/* r300_cmdbuf.c */
extern void r300_init_reg_flags(struct drm_device *dev);
@ -408,6 +450,20 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
struct drm_file *file_priv,
drm_radeon_kcmd_buffer_t *cmdbuf);
/* r600 cp */
extern int r600_do_engine_reset(struct drm_device *dev);
extern int r600_do_cleanup_cp(struct drm_device *dev);
extern int r600_do_init_cp(struct drm_device *dev, drm_radeon_init_t *init);
extern int r600_do_resume_cp(struct drm_device *dev);
extern int r600_do_cp_idle(drm_radeon_private_t *dev_priv);
extern void r600_do_cp_start(drm_radeon_private_t *dev_priv);
extern void r600_do_cp_reset(drm_radeon_private_t *dev_priv);
extern void r600_do_cp_stop(drm_radeon_private_t *dev_priv);
extern int r600_cp_dispatch_indirect(struct drm_device *dev,
struct drm_buf *buf, int start, int end);
extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info *gart_info);
extern int r600_page_table_init(struct drm_device *dev);
/* Flags for stats.boxes
*/
#define RADEON_BOX_DMA_IDLE 0x1
@ -419,6 +475,9 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
/* Register definitions, register access macros and drmAddMap constants
* for Radeon kernel driver.
*/
#define RADEON_MM_INDEX 0x0000
#define RADEON_MM_DATA 0x0004
#define RADEON_AGP_COMMAND 0x0f60
#define RADEON_AGP_COMMAND_PCI_CONFIG 0x0060 /* offset in PCI config */
# define RADEON_AGP_ENABLE (1<<8)
@ -430,8 +489,31 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
# define RADEON_SCISSOR_1_ENABLE (1 << 29)
# define RADEON_SCISSOR_2_ENABLE (1 << 30)
/*
* PCIE radeons (rv370/rv380, rv410, r423/r430/r480, r5xx)
* don't have an explicit bus mastering disable bit. It's handled
* by the PCI D-states. PMI_BM_DIS disables D-state bus master
* handling, not bus mastering itself.
*/
#define RADEON_BUS_CNTL 0x0030
/* r1xx, r2xx, r300, r(v)350, r420/r481, rs400/rs480 */
# define RADEON_BUS_MASTER_DIS (1 << 6)
/* rs600/rs690/rs740 */
# define RS600_BUS_MASTER_DIS (1 << 14)
# define RS600_MSI_REARM (1 << 20)
/* see RS480_MSI_REARM in AIC_CNTL for rs480 */
#define RADEON_BUS_CNTL1 0x0034
# define RADEON_PMI_BM_DIS (1 << 2)
# define RADEON_PMI_INT_DIS (1 << 3)
#define RV370_BUS_CNTL 0x004c
# define RV370_PMI_BM_DIS (1 << 5)
# define RV370_PMI_INT_DIS (1 << 6)
#define RADEON_MSI_REARM_EN 0x0160
/* rv370/rv380, rv410, r423/r430/r480, r5xx */
# define RV370_MSI_REARM_EN (1 << 0)
#define RADEON_CLOCK_CNTL_DATA 0x000c
# define RADEON_PLL_WR_EN (1 << 7)
@ -517,6 +599,56 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RS690_MC_AGP_BASE 0x102
#define RS690_MC_AGP_BASE_2 0x103
#define RS600_MC_INDEX 0x70
# define RS600_MC_ADDR_MASK 0xffff
# define RS600_MC_IND_SEQ_RBS_0 (1 << 16)
# define RS600_MC_IND_SEQ_RBS_1 (1 << 17)
# define RS600_MC_IND_SEQ_RBS_2 (1 << 18)
# define RS600_MC_IND_SEQ_RBS_3 (1 << 19)
# define RS600_MC_IND_AIC_RBS (1 << 20)
# define RS600_MC_IND_CITF_ARB0 (1 << 21)
# define RS600_MC_IND_CITF_ARB1 (1 << 22)
# define RS600_MC_IND_WR_EN (1 << 23)
#define RS600_MC_DATA 0x74
#define RS600_MC_STATUS 0x0
# define RS600_MC_IDLE (1 << 1)
#define RS600_MC_FB_LOCATION 0x4
#define RS600_MC_AGP_LOCATION 0x5
#define RS600_AGP_BASE 0x6
#define RS600_AGP_BASE_2 0x7
#define RS600_MC_CNTL1 0x9
# define RS600_ENABLE_PAGE_TABLES (1 << 26)
#define RS600_MC_PT0_CNTL 0x100
# define RS600_ENABLE_PT (1 << 0)
# define RS600_EFFECTIVE_L2_CACHE_SIZE(x) ((x) << 15)
# define RS600_EFFECTIVE_L2_QUEUE_SIZE(x) ((x) << 21)
# define RS600_INVALIDATE_ALL_L1_TLBS (1 << 28)
# define RS600_INVALIDATE_L2_CACHE (1 << 29)
#define RS600_MC_PT0_CONTEXT0_CNTL 0x102
# define RS600_ENABLE_PAGE_TABLE (1 << 0)
# define RS600_PAGE_TABLE_TYPE_FLAT (0 << 1)
#define RS600_MC_PT0_SYSTEM_APERTURE_LOW_ADDR 0x112
#define RS600_MC_PT0_SYSTEM_APERTURE_HIGH_ADDR 0x114
#define RS600_MC_PT0_CONTEXT0_DEFAULT_READ_ADDR 0x11c
#define RS600_MC_PT0_CONTEXT0_FLAT_BASE_ADDR 0x12c
#define RS600_MC_PT0_CONTEXT0_FLAT_START_ADDR 0x13c
#define RS600_MC_PT0_CONTEXT0_FLAT_END_ADDR 0x14c
#define RS600_MC_PT0_CLIENT0_CNTL 0x16c
# define RS600_ENABLE_TRANSLATION_MODE_OVERRIDE (1 << 0)
# define RS600_TRANSLATION_MODE_OVERRIDE (1 << 1)
# define RS600_SYSTEM_ACCESS_MODE_MASK (3 << 8)
# define RS600_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 8)
# define RS600_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 8)
# define RS600_SYSTEM_ACCESS_MODE_IN_SYS (2 << 8)
# define RS600_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 8)
# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASSTHROUGH (0 << 10)
# define RS600_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 10)
# define RS600_EFFECTIVE_L1_CACHE_SIZE(x) ((x) << 11)
# define RS600_ENABLE_FRAGMENT_PROCESSING (1 << 14)
# define RS600_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15)
# define RS600_INVALIDATE_L1_TLB (1 << 20)
#define R520_MC_IND_INDEX 0x70
#define R520_MC_IND_WR_EN (1 << 24)
#define R520_MC_IND_DATA 0x74
@ -598,12 +730,29 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RADEON_SCRATCH_UMSK 0x0770
#define RADEON_SCRATCH_ADDR 0x0774
#define R600_SCRATCH_REG0 0x8500
#define R600_SCRATCH_REG1 0x8504
#define R600_SCRATCH_REG2 0x8508
#define R600_SCRATCH_REG3 0x850c
#define R600_SCRATCH_REG4 0x8510
#define R600_SCRATCH_REG5 0x8514
#define R600_SCRATCH_REG6 0x8518
#define R600_SCRATCH_REG7 0x851c
#define R600_SCRATCH_UMSK 0x8540
#define R600_SCRATCH_ADDR 0x8544
#define RADEON_SCRATCHOFF( x ) (RADEON_SCRATCH_REG_OFFSET + 4*(x))
#define R600_SCRATCHOFF( x ) (R600_SCRATCH_REG_OFFSET + 4*(x))
#define GET_SCRATCH( x ) (dev_priv->writeback_works \
? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \
: RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )
#define GET_R600_SCRATCH( x ) (dev_priv->writeback_works \
? DRM_READ32( dev_priv->ring_rptr, R600_SCRATCHOFF(x) ) \
: RADEON_READ( R600_SCRATCH_REG0 + 4*(x) ) )
#define RADEON_CRTC_CRNT_FRAME 0x0214
#define RADEON_CRTC2_CRNT_FRAME 0x0314
@ -868,6 +1017,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RADEON_SW_SEMAPHORE 0x013c
#define RADEON_WAIT_UNTIL 0x1720
#define R600_WAIT_UNTIL 0x8040
# define RADEON_WAIT_CRTC_PFLIP (1 << 0)
# define RADEON_WAIT_2D_IDLE (1 << 14)
# define RADEON_WAIT_3D_IDLE (1 << 15)
@ -890,6 +1040,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RADEON_CP_RB_CNTL 0x0704
# define RADEON_BUF_SWAP_32BIT (2 << 16)
# define RADEON_RB_NO_UPDATE (1 << 27)
# define RADEON_RB_RPTR_WR_ENA (1 << 31)
#define RADEON_CP_RB_RPTR_ADDR 0x070c
#define RADEON_CP_RB_RPTR 0x0710
#define RADEON_CP_RB_WPTR 0x0714
@ -911,6 +1062,7 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RADEON_AIC_CNTL 0x01d0
# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
# define RS400_MSI_REARM (1 << 3)
#define RADEON_AIC_STAT 0x01d4
#define RADEON_AIC_PT_BASE 0x01d8
#define RADEON_AIC_LO_ADDR 0x01dc
@ -950,6 +1102,13 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
# define RADEON_CNTL_BITBLT_MULTI 0x00009B00
# define RADEON_CNTL_SET_SCISSORS 0xC0001E00
# define R600_IT_INDIRECT_BUFFER 0x00003200
# define R600_IT_ME_INITIALIZE 0x00004400
# define R600_ME_INITIALIZE_DEVICE_ID(x) ((x) << 16)
# define R600_IT_EVENT_WRITE 0x00004600
# define R600_IT_SET_CONFIG_REG 0x00006800
# define R600_SET_CONFIG_REG_OFFSET 0x00008000
#define RADEON_CP_PACKET_MASK 0xC0000000
#define RADEON_CP_PACKET_COUNT_MASK 0x3fff0000
#define RADEON_CP_PACKET0_REG_MASK 0x000007ff
@ -1173,6 +1332,422 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define R500_D1_VBLANK_INTERRUPT (1 << 4)
#define R500_D2_VBLANK_INTERRUPT (1 << 5)
/* R6xx/R7xx registers */
#define R600_MC_VM_FB_LOCATION 0x2180
#define R600_MC_VM_AGP_TOP 0x2184
#define R600_MC_VM_AGP_BOT 0x2188
#define R600_MC_VM_AGP_BASE 0x218c
#define R600_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2190
#define R600_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2194
#define R600_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x2198
#define R700_MC_VM_FB_LOCATION 0x2024
#define R700_MC_VM_AGP_TOP 0x2028
#define R700_MC_VM_AGP_BOT 0x202c
#define R700_MC_VM_AGP_BASE 0x2030
#define R700_MC_VM_SYSTEM_APERTURE_LOW_ADDR 0x2034
#define R700_MC_VM_SYSTEM_APERTURE_HIGH_ADDR 0x2038
#define R700_MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR 0x203c
#define R600_MCD_RD_A_CNTL 0x219c
#define R600_MCD_RD_B_CNTL 0x21a0
#define R600_MCD_WR_A_CNTL 0x21a4
#define R600_MCD_WR_B_CNTL 0x21a8
#define R600_MCD_RD_SYS_CNTL 0x2200
#define R600_MCD_WR_SYS_CNTL 0x2214
#define R600_MCD_RD_GFX_CNTL 0x21fc
#define R600_MCD_RD_HDP_CNTL 0x2204
#define R600_MCD_RD_PDMA_CNTL 0x2208
#define R600_MCD_RD_SEM_CNTL 0x220c
#define R600_MCD_WR_GFX_CNTL 0x2210
#define R600_MCD_WR_HDP_CNTL 0x2218
#define R600_MCD_WR_PDMA_CNTL 0x221c
#define R600_MCD_WR_SEM_CNTL 0x2220
# define R600_MCD_L1_TLB (1 << 0)
# define R600_MCD_L1_FRAG_PROC (1 << 1)
# define R600_MCD_L1_STRICT_ORDERING (1 << 2)
# define R600_MCD_SYSTEM_ACCESS_MODE_MASK (3 << 6)
# define R600_MCD_SYSTEM_ACCESS_MODE_PA_ONLY (0 << 6)
# define R600_MCD_SYSTEM_ACCESS_MODE_USE_SYS_MAP (1 << 6)
# define R600_MCD_SYSTEM_ACCESS_MODE_IN_SYS (2 << 6)
# define R600_MCD_SYSTEM_ACCESS_MODE_NOT_IN_SYS (3 << 6)
# define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 8)
# define R600_MCD_SYSTEM_APERTURE_UNMAPPED_ACCESS_DEFAULT_PAGE (1 << 8)
# define R600_MCD_SEMAPHORE_MODE (1 << 10)
# define R600_MCD_WAIT_L2_QUERY (1 << 11)
# define R600_MCD_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 12)
# define R600_MCD_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 15)
#define R700_MC_VM_MD_L1_TLB0_CNTL 0x2654
#define R700_MC_VM_MD_L1_TLB1_CNTL 0x2658
#define R700_MC_VM_MD_L1_TLB2_CNTL 0x265c
#define R700_MC_VM_MB_L1_TLB0_CNTL 0x2234
#define R700_MC_VM_MB_L1_TLB1_CNTL 0x2238
#define R700_MC_VM_MB_L1_TLB2_CNTL 0x223c
#define R700_MC_VM_MB_L1_TLB3_CNTL 0x2240
# define R700_ENABLE_L1_TLB (1 << 0)
# define R700_ENABLE_L1_FRAGMENT_PROCESSING (1 << 1)
# define R700_SYSTEM_ACCESS_MODE_IN_SYS (2 << 3)
# define R700_SYSTEM_APERTURE_UNMAPPED_ACCESS_PASS_THRU (0 << 5)
# define R700_EFFECTIVE_L1_TLB_SIZE(x) ((x) << 15)
# define R700_EFFECTIVE_L1_QUEUE_SIZE(x) ((x) << 18)
#define R700_MC_ARB_RAMCFG 0x2760
# define R700_NOOFBANK_SHIFT 0
# define R700_NOOFBANK_MASK 0x3
# define R700_NOOFRANK_SHIFT 2
# define R700_NOOFRANK_MASK 0x1
# define R700_NOOFROWS_SHIFT 3
# define R700_NOOFROWS_MASK 0x7
# define R700_NOOFCOLS_SHIFT 6
# define R700_NOOFCOLS_MASK 0x3
# define R700_CHANSIZE_SHIFT 8
# define R700_CHANSIZE_MASK 0x1
# define R700_BURSTLENGTH_SHIFT 9
# define R700_BURSTLENGTH_MASK 0x1
#define R600_RAMCFG 0x2408
# define R600_NOOFBANK_SHIFT 0
# define R600_NOOFBANK_MASK 0x1
# define R600_NOOFRANK_SHIFT 1
# define R600_NOOFRANK_MASK 0x1
# define R600_NOOFROWS_SHIFT 2
# define R600_NOOFROWS_MASK 0x7
# define R600_NOOFCOLS_SHIFT 5
# define R600_NOOFCOLS_MASK 0x3
# define R600_CHANSIZE_SHIFT 7
# define R600_CHANSIZE_MASK 0x1
# define R600_BURSTLENGTH_SHIFT 8
# define R600_BURSTLENGTH_MASK 0x1
#define R600_VM_L2_CNTL 0x1400
# define R600_VM_L2_CACHE_EN (1 << 0)
# define R600_VM_L2_FRAG_PROC (1 << 1)
# define R600_VM_ENABLE_PTE_CACHE_LRU_W (1 << 9)
# define R600_VM_L2_CNTL_QUEUE_SIZE(x) ((x) << 13)
# define R700_VM_L2_CNTL_QUEUE_SIZE(x) ((x) << 14)
#define R600_VM_L2_CNTL2 0x1404
# define R600_VM_L2_CNTL2_INVALIDATE_ALL_L1_TLBS (1 << 0)
# define R600_VM_L2_CNTL2_INVALIDATE_L2_CACHE (1 << 1)
#define R600_VM_L2_CNTL3 0x1408
# define R600_VM_L2_CNTL3_BANK_SELECT_0(x) ((x) << 0)
# define R600_VM_L2_CNTL3_BANK_SELECT_1(x) ((x) << 5)
# define R600_VM_L2_CNTL3_CACHE_UPDATE_MODE(x) ((x) << 10)
# define R700_VM_L2_CNTL3_BANK_SELECT(x) ((x) << 0)
# define R700_VM_L2_CNTL3_CACHE_UPDATE_MODE(x) ((x) << 6)
#define R600_VM_L2_STATUS 0x140c
#define R600_VM_CONTEXT0_CNTL 0x1410
# define R600_VM_ENABLE_CONTEXT (1 << 0)
# define R600_VM_PAGE_TABLE_DEPTH_FLAT (0 << 1)
#define R600_VM_CONTEXT0_CNTL2 0x1430
#define R600_VM_CONTEXT0_REQUEST_RESPONSE 0x1470
#define R600_VM_CONTEXT0_INVALIDATION_LOW_ADDR 0x1490
#define R600_VM_CONTEXT0_INVALIDATION_HIGH_ADDR 0x14b0
#define R600_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x1574
#define R600_VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x1594
#define R600_VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x15b4
#define R700_VM_CONTEXT0_PAGE_TABLE_BASE_ADDR 0x153c
#define R700_VM_CONTEXT0_PAGE_TABLE_START_ADDR 0x155c
#define R700_VM_CONTEXT0_PAGE_TABLE_END_ADDR 0x157c
#define R600_HDP_HOST_PATH_CNTL 0x2c00
#define R600_GRBM_CNTL 0x8000
# define R600_GRBM_READ_TIMEOUT(x) ((x) << 0)
#define R600_GRBM_STATUS 0x8010
# define R600_CMDFIFO_AVAIL_MASK 0x1f
# define R700_CMDFIFO_AVAIL_MASK 0xf
# define R600_GUI_ACTIVE (1 << 31)
#define R600_GRBM_STATUS2 0x8014
#define R600_GRBM_SOFT_RESET 0x8020
# define R600_SOFT_RESET_CP (1 << 0)
#define R600_WAIT_UNTIL 0x8040
#define R600_CP_SEM_WAIT_TIMER 0x85bc
#define R600_CP_ME_CNTL 0x86d8
# define R600_CP_ME_HALT (1 << 28)
#define R600_CP_QUEUE_THRESHOLDS 0x8760
# define R600_ROQ_IB1_START(x) ((x) << 0)
# define R600_ROQ_IB2_START(x) ((x) << 8)
#define R600_CP_MEQ_THRESHOLDS 0x8764
# define R700_STQ_SPLIT(x) ((x) << 0)
# define R600_MEQ_END(x) ((x) << 16)
# define R600_ROQ_END(x) ((x) << 24)
#define R600_CP_PERFMON_CNTL 0x87fc
#define R600_CP_RB_BASE 0xc100
#define R600_CP_RB_CNTL 0xc104
# define R600_RB_BUFSZ(x) ((x) << 0)
# define R600_RB_BLKSZ(x) ((x) << 8)
# define R600_RB_NO_UPDATE (1 << 27)
# define R600_RB_RPTR_WR_ENA (1 << 31)
#define R600_CP_RB_RPTR_WR 0xc108
#define R600_CP_RB_RPTR_ADDR 0xc10c
#define R600_CP_RB_RPTR_ADDR_HI 0xc110
#define R600_CP_RB_WPTR 0xc114
#define R600_CP_RB_WPTR_ADDR 0xc118
#define R600_CP_RB_WPTR_ADDR_HI 0xc11c
#define R600_CP_RB_RPTR 0x8700
#define R600_CP_RB_WPTR_DELAY 0x8704
#define R600_CP_PFP_UCODE_ADDR 0xc150
#define R600_CP_PFP_UCODE_DATA 0xc154
#define R600_CP_ME_RAM_RADDR 0xc158
#define R600_CP_ME_RAM_WADDR 0xc15c
#define R600_CP_ME_RAM_DATA 0xc160
#define R600_CP_DEBUG 0xc1fc
#define R600_PA_CL_ENHANCE 0x8a14
# define R600_CLIP_VTX_REORDER_ENA (1 << 0)
# define R600_NUM_CLIP_SEQ(x) ((x) << 1)
#define R600_PA_SC_LINE_STIPPLE_STATE 0x8b10
#define R600_PA_SC_MULTI_CHIP_CNTL 0x8b20
#define R700_PA_SC_FORCE_EOV_MAX_CNTS 0x8b24
# define R700_FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0)
# define R700_FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16)
#define R600_PA_SC_AA_SAMPLE_LOCS_2S 0x8b40
#define R600_PA_SC_AA_SAMPLE_LOCS_4S 0x8b44
#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD0 0x8b48
#define R600_PA_SC_AA_SAMPLE_LOCS_8S_WD1 0x8b4c
# define R600_S0_X(x) ((x) << 0)
# define R600_S0_Y(x) ((x) << 4)
# define R600_S1_X(x) ((x) << 8)
# define R600_S1_Y(x) ((x) << 12)
# define R600_S2_X(x) ((x) << 16)
# define R600_S2_Y(x) ((x) << 20)
# define R600_S3_X(x) ((x) << 24)
# define R600_S3_Y(x) ((x) << 28)
# define R600_S4_X(x) ((x) << 0)
# define R600_S4_Y(x) ((x) << 4)
# define R600_S5_X(x) ((x) << 8)
# define R600_S5_Y(x) ((x) << 12)
# define R600_S6_X(x) ((x) << 16)
# define R600_S6_Y(x) ((x) << 20)
# define R600_S7_X(x) ((x) << 24)
# define R600_S7_Y(x) ((x) << 28)
#define R600_PA_SC_FIFO_SIZE 0x8bd0
# define R600_SC_PRIM_FIFO_SIZE(x) ((x) << 0)
# define R600_SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 8)
# define R600_SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 16)
#define R700_PA_SC_FIFO_SIZE_R7XX 0x8bcc
# define R700_SC_PRIM_FIFO_SIZE(x) ((x) << 0)
# define R700_SC_HIZ_TILE_FIFO_SIZE(x) ((x) << 12)
# define R700_SC_EARLYZ_TILE_FIFO_SIZE(x) ((x) << 20)
#define R600_PA_SC_ENHANCE 0x8bf0
# define R600_FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0)
# define R600_FORCE_EOV_MAX_TILE_CNT(x) ((x) << 12)
#define R600_PA_SC_CLIPRECT_RULE 0x2820c
#define R700_PA_SC_EDGERULE 0x28230
#define R600_PA_SC_LINE_STIPPLE 0x28a0c
#define R600_PA_SC_MODE_CNTL 0x28a4c
#define R600_PA_SC_AA_CONFIG 0x28c04
#define R600_SX_EXPORT_BUFFER_SIZES 0x900c
# define R600_COLOR_BUFFER_SIZE(x) ((x) << 0)
# define R600_POSITION_BUFFER_SIZE(x) ((x) << 8)
# define R600_SMX_BUFFER_SIZE(x) ((x) << 16)
#define R600_SX_DEBUG_1 0x9054
# define R600_SMX_EVENT_RELEASE (1 << 0)
# define R600_ENABLE_NEW_SMX_ADDRESS (1 << 16)
#define R700_SX_DEBUG_1 0x9058
# define R700_ENABLE_NEW_SMX_ADDRESS (1 << 16)
#define R600_SX_MISC 0x28350
#define R600_DB_DEBUG 0x9830
# define R600_PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31)
#define R600_DB_WATERMARKS 0x9838
# define R600_DEPTH_FREE(x) ((x) << 0)
# define R600_DEPTH_FLUSH(x) ((x) << 5)
# define R600_DEPTH_PENDING_FREE(x) ((x) << 15)
# define R600_DEPTH_CACHELINE_FREE(x) ((x) << 20)
#define R700_DB_DEBUG3 0x98b0
# define R700_DB_CLK_OFF_DELAY(x) ((x) << 11)
#define RV700_DB_DEBUG4 0x9b8c
# define RV700_DISABLE_TILE_COVERED_FOR_PS_ITER (1 << 6)
#define R600_VGT_CACHE_INVALIDATION 0x88c4
# define R600_CACHE_INVALIDATION(x) ((x) << 0)
# define R600_VC_ONLY 0
# define R600_TC_ONLY 1
# define R600_VC_AND_TC 2
# define R700_AUTO_INVLD_EN(x) ((x) << 6)
# define R700_NO_AUTO 0
# define R700_ES_AUTO 1
# define R700_GS_AUTO 2
# define R700_ES_AND_GS_AUTO 3
#define R600_VGT_GS_PER_ES 0x88c8
#define R600_VGT_ES_PER_GS 0x88cc
#define R600_VGT_GS_PER_VS 0x88e8
#define R600_VGT_GS_VERTEX_REUSE 0x88d4
#define R600_VGT_NUM_INSTANCES 0x8974
#define R600_VGT_STRMOUT_EN 0x28ab0
#define R600_VGT_EVENT_INITIATOR 0x28a90
# define R600_CACHE_FLUSH_AND_INV_EVENT (0x16 << 0)
#define R600_VGT_VERTEX_REUSE_BLOCK_CNTL 0x28c58
# define R600_VTX_REUSE_DEPTH_MASK 0xff
#define R600_VGT_OUT_DEALLOC_CNTL 0x28c5c
# define R600_DEALLOC_DIST_MASK 0x7f
#define R600_CB_COLOR0_BASE 0x28040
#define R600_CB_COLOR1_BASE 0x28044
#define R600_CB_COLOR2_BASE 0x28048
#define R600_CB_COLOR3_BASE 0x2804c
#define R600_CB_COLOR4_BASE 0x28050
#define R600_CB_COLOR5_BASE 0x28054
#define R600_CB_COLOR6_BASE 0x28058
#define R600_CB_COLOR7_BASE 0x2805c
#define R600_CB_COLOR7_FRAG 0x280fc
#define R600_TC_CNTL 0x9608
# define R600_TC_L2_SIZE(x) ((x) << 5)
# define R600_L2_DISABLE_LATE_HIT (1 << 9)
#define R600_ARB_POP 0x2418
# define R600_ENABLE_TC128 (1 << 30)
#define R600_ARB_GDEC_RD_CNTL 0x246c
#define R600_TA_CNTL_AUX 0x9508
# define R600_DISABLE_CUBE_WRAP (1 << 0)
# define R600_DISABLE_CUBE_ANISO (1 << 1)
# define R700_GETLOD_SELECT(x) ((x) << 2)
# define R600_SYNC_GRADIENT (1 << 24)
# define R600_SYNC_WALKER (1 << 25)
# define R600_SYNC_ALIGNER (1 << 26)
# define R600_BILINEAR_PRECISION_6_BIT (0 << 31)
# define R600_BILINEAR_PRECISION_8_BIT (1 << 31)
#define R700_TCP_CNTL 0x9610
#define R600_SMX_DC_CTL0 0xa020
# define R700_USE_HASH_FUNCTION (1 << 0)
# define R700_CACHE_DEPTH(x) ((x) << 1)
# define R700_FLUSH_ALL_ON_EVENT (1 << 10)
# define R700_STALL_ON_EVENT (1 << 11)
#define R700_SMX_EVENT_CTL 0xa02c
# define R700_ES_FLUSH_CTL(x) ((x) << 0)
# define R700_GS_FLUSH_CTL(x) ((x) << 3)
# define R700_ACK_FLUSH_CTL(x) ((x) << 6)
# define R700_SYNC_FLUSH_CTL (1 << 8)
#define R600_SQ_CONFIG 0x8c00
# define R600_VC_ENABLE (1 << 0)
# define R600_EXPORT_SRC_C (1 << 1)
# define R600_DX9_CONSTS (1 << 2)
# define R600_ALU_INST_PREFER_VECTOR (1 << 3)
# define R600_DX10_CLAMP (1 << 4)
# define R600_CLAUSE_SEQ_PRIO(x) ((x) << 8)
# define R600_PS_PRIO(x) ((x) << 24)
# define R600_VS_PRIO(x) ((x) << 26)
# define R600_GS_PRIO(x) ((x) << 28)
# define R600_ES_PRIO(x) ((x) << 30)
#define R600_SQ_GPR_RESOURCE_MGMT_1 0x8c04
# define R600_NUM_PS_GPRS(x) ((x) << 0)
# define R600_NUM_VS_GPRS(x) ((x) << 16)
# define R700_DYN_GPR_ENABLE (1 << 27)
# define R600_NUM_CLAUSE_TEMP_GPRS(x) ((x) << 28)
#define R600_SQ_GPR_RESOURCE_MGMT_2 0x8c08
# define R600_NUM_GS_GPRS(x) ((x) << 0)
# define R600_NUM_ES_GPRS(x) ((x) << 16)
#define R600_SQ_THREAD_RESOURCE_MGMT 0x8c0c
# define R600_NUM_PS_THREADS(x) ((x) << 0)
# define R600_NUM_VS_THREADS(x) ((x) << 8)
# define R600_NUM_GS_THREADS(x) ((x) << 16)
# define R600_NUM_ES_THREADS(x) ((x) << 24)
#define R600_SQ_STACK_RESOURCE_MGMT_1 0x8c10
# define R600_NUM_PS_STACK_ENTRIES(x) ((x) << 0)
# define R600_NUM_VS_STACK_ENTRIES(x) ((x) << 16)
#define R600_SQ_STACK_RESOURCE_MGMT_2 0x8c14
# define R600_NUM_GS_STACK_ENTRIES(x) ((x) << 0)
# define R600_NUM_ES_STACK_ENTRIES(x) ((x) << 16)
#define R600_SQ_MS_FIFO_SIZES 0x8cf0
# define R600_CACHE_FIFO_SIZE(x) ((x) << 0)
# define R600_FETCH_FIFO_HIWATER(x) ((x) << 8)
# define R600_DONE_FIFO_HIWATER(x) ((x) << 16)
# define R600_ALU_UPDATE_FIFO_HIWATER(x) ((x) << 24)
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_0 0x8db0
# define R700_SIMDA_RING0(x) ((x) << 0)
# define R700_SIMDA_RING1(x) ((x) << 8)
# define R700_SIMDB_RING0(x) ((x) << 16)
# define R700_SIMDB_RING1(x) ((x) << 24)
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_1 0x8db4
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_2 0x8db8
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_3 0x8dbc
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_4 0x8dc0
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_5 0x8dc4
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_6 0x8dc8
#define R700_SQ_DYN_GPR_SIZE_SIMD_AB_7 0x8dcc
#define R600_SPI_PS_IN_CONTROL_0 0x286cc
# define R600_NUM_INTERP(x) ((x) << 0)
# define R600_POSITION_ENA (1 << 8)
# define R600_POSITION_CENTROID (1 << 9)
# define R600_POSITION_ADDR(x) ((x) << 10)
# define R600_PARAM_GEN(x) ((x) << 15)
# define R600_PARAM_GEN_ADDR(x) ((x) << 19)
# define R600_BARYC_SAMPLE_CNTL(x) ((x) << 26)
# define R600_PERSP_GRADIENT_ENA (1 << 28)
# define R600_LINEAR_GRADIENT_ENA (1 << 29)
# define R600_POSITION_SAMPLE (1 << 30)
# define R600_BARYC_AT_SAMPLE_ENA (1 << 31)
#define R600_SPI_PS_IN_CONTROL_1 0x286d0
# define R600_GEN_INDEX_PIX (1 << 0)
# define R600_GEN_INDEX_PIX_ADDR(x) ((x) << 1)
# define R600_FRONT_FACE_ENA (1 << 8)
# define R600_FRONT_FACE_CHAN(x) ((x) << 9)
# define R600_FRONT_FACE_ALL_BITS (1 << 11)
# define R600_FRONT_FACE_ADDR(x) ((x) << 12)
# define R600_FOG_ADDR(x) ((x) << 17)
# define R600_FIXED_PT_POSITION_ENA (1 << 24)
# define R600_FIXED_PT_POSITION_ADDR(x) ((x) << 25)
# define R700_POSITION_ULC (1 << 30)
#define R600_SPI_INPUT_Z 0x286d8
#define R600_SPI_CONFIG_CNTL 0x9100
# define R600_GPR_WRITE_PRIORITY(x) ((x) << 0)
# define R600_DISABLE_INTERP_1 (1 << 5)
#define R600_SPI_CONFIG_CNTL_1 0x913c
# define R600_VTX_DONE_DELAY(x) ((x) << 0)
# define R600_INTERP_ONE_PRIM_PER_ROW (1 << 4)
#define R600_GB_TILING_CONFIG 0x98f0
# define R600_PIPE_TILING(x) ((x) << 1)
# define R600_BANK_TILING(x) ((x) << 4)
# define R600_GROUP_SIZE(x) ((x) << 6)
# define R600_ROW_TILING(x) ((x) << 8)
# define R600_BANK_SWAPS(x) ((x) << 11)
# define R600_SAMPLE_SPLIT(x) ((x) << 14)
# define R600_BACKEND_MAP(x) ((x) << 16)
#define R600_DCP_TILING_CONFIG 0x6ca0
#define R600_HDP_TILING_CONFIG 0x2f3c
#define R600_CC_RB_BACKEND_DISABLE 0x98f4
#define R700_CC_SYS_RB_BACKEND_DISABLE 0x3f88
# define R600_BACKEND_DISABLE(x) ((x) << 16)
#define R600_CC_GC_SHADER_PIPE_CONFIG 0x8950
#define R600_GC_USER_SHADER_PIPE_CONFIG 0x8954
# define R600_INACTIVE_QD_PIPES(x) ((x) << 8)
# define R600_INACTIVE_QD_PIPES_MASK (0xff << 8)
# define R600_INACTIVE_SIMDS(x) ((x) << 16)
# define R600_INACTIVE_SIMDS_MASK (0xff << 16)
#define R700_CGTS_SYS_TCC_DISABLE 0x3f90
#define R700_CGTS_USER_SYS_TCC_DISABLE 0x3f94
#define R700_CGTS_TCC_DISABLE 0x9148
#define R700_CGTS_USER_TCC_DISABLE 0x914c
/* Constants */
#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
@ -1182,6 +1757,12 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RADEON_LAST_SWI_REG RADEON_SCRATCH_REG3
#define RADEON_LAST_DISPATCH 1
#define R600_LAST_FRAME_REG R600_SCRATCH_REG0
#define R600_LAST_DISPATCH_REG R600_SCRATCH_REG1
#define R600_LAST_CLEAR_REG R600_SCRATCH_REG2
#define R600_LAST_SWI_REG R600_SCRATCH_REG3
#define RADEON_MAX_VB_AGE 0x7fffffff
#define RADEON_MAX_VB_VERTS (0xffff)
@ -1189,8 +1770,16 @@ extern int r300_do_cp_cmdbuf(struct drm_device *dev,
#define RADEON_PCIGART_TABLE_SIZE (32*1024)
#define RADEON_READ(reg) DRM_READ32( dev_priv->mmio, (reg) )
#define RADEON_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) )
#define RADEON_READ(reg) RADEON_READ_MM(dev_priv, reg)
#define RADEON_WRITE(reg,val) \
do { \
if (reg < 0x10000) { \
DRM_WRITE32( dev_priv->mmio, (reg), (val) ); \
} else { \
DRM_WRITE32( dev_priv->mmio, RADEON_MM_INDEX, (reg) ); \
DRM_WRITE32( dev_priv->mmio, RADEON_MM_DATA, (val) ); \
} \
} while (0)
#define RADEON_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) )
#define RADEON_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) )
@ -1230,11 +1819,20 @@ do { \
RADEON_WRITE(RS690_MC_INDEX, RS690_MC_INDEX_WR_ACK); \
} while (0)
#define RS600_WRITE_MCIND( addr, val ) \
do { \
RADEON_WRITE(RS600_MC_INDEX, RS600_MC_IND_WR_EN | RS600_MC_IND_CITF_ARB0 | ((addr) & RS600_MC_ADDR_MASK)); \
RADEON_WRITE(RS600_MC_DATA, val); \
} while (0)
#define IGP_WRITE_MCIND( addr, val ) \
do { \
if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) \
if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || \
((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) \
RS690_WRITE_MCIND( addr, val ); \
else \
else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS600) \
RS600_WRITE_MCIND( addr, val ); \
else \
RS480_WRITE_MCIND( addr, val ); \
} while (0)
@ -1254,26 +1852,38 @@ do { \
*/
#define RADEON_WAIT_UNTIL_2D_IDLE() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) \
OUT_RING( CP_PACKET0( R600_WAIT_UNTIL, 0 ) ); \
else \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN) ); \
} while (0)
#define RADEON_WAIT_UNTIL_3D_IDLE() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) \
OUT_RING( CP_PACKET0( R600_WAIT_UNTIL, 0 ) ); \
else \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( (RADEON_WAIT_3D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN) ); \
} while (0)
#define RADEON_WAIT_UNTIL_IDLE() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) \
OUT_RING( CP_PACKET0( R600_WAIT_UNTIL, 0 ) ); \
else \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( (RADEON_WAIT_2D_IDLECLEAN | \
RADEON_WAIT_3D_IDLECLEAN | \
RADEON_WAIT_HOST_IDLECLEAN) ); \
} while (0)
#define RADEON_WAIT_UNTIL_PAGE_FLIPPED() do { \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) \
OUT_RING( CP_PACKET0( R600_WAIT_UNTIL, 0 ) ); \
else \
OUT_RING( CP_PACKET0( RADEON_WAIT_UNTIL, 0 ) ); \
OUT_RING( RADEON_WAIT_CRTC_PFLIP ); \
} while (0)
@ -1334,11 +1944,11 @@ do { \
#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \
do { \
drm_radeon_sarea_t *test_sarea_priv = dev_priv->sarea_priv; \
if ( test_sarea_priv->last_dispatch >= RADEON_MAX_VB_AGE ) { \
drm_radeon_sarea_t *sarea_priv_ = dev_priv->sarea_priv; \
if ( sarea_priv_->last_dispatch >= RADEON_MAX_VB_AGE ) { \
int __ret = radeon_do_cp_idle( dev_priv ); \
if ( __ret ) return __ret; \
test_sarea_priv->last_dispatch = 0; \
sarea_priv_->last_dispatch = 0; \
radeon_freelist_reset( dev ); \
} \
} while (0)
@ -1358,6 +1968,24 @@ do { \
OUT_RING( age ); \
} while (0)
#define R600_DISPATCH_AGE(age) do { \
OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \
OUT_RING((R600_LAST_DISPATCH_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \
OUT_RING(age); \
} while (0)
#define R600_FRAME_AGE(age) do { \
OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \
OUT_RING((R600_LAST_FRAME_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \
OUT_RING(age); \
} while (0)
#define R600_CLEAR_AGE(age) do { \
OUT_RING(CP_PACKET3(R600_IT_SET_CONFIG_REG, 1)); \
OUT_RING((R600_LAST_CLEAR_REG - R600_SET_CONFIG_REG_OFFSET) >> 2); \
OUT_RING(age); \
} while (0)
/* ================================================================
* Ring control
*/
@ -1394,14 +2022,9 @@ do { \
dev_priv->ring.tail = write; \
} while (0)
#define COMMIT_RING() do { \
/* Flush writes to ring */ \
DRM_MEMORYBARRIER(); \
GET_RING_HEAD( dev_priv ); \
RADEON_WRITE( RADEON_CP_RB_WPTR, dev_priv->ring.tail ); \
/* read from PCI bus to ensure correct posting */ \
RADEON_READ( RADEON_CP_RB_RPTR ); \
} while (0)
#define COMMIT_RING() radeon_commit_ring(dev_priv)
#define OUT_RING( x ) do { \
if ( RADEON_VERBOSE ) { \

14
sys/external/bsd/drm/dist/shared-core/radeon_irq.c vendored
View File

@ -65,7 +65,7 @@ int radeon_enable_vblank(struct drm_device *dev, int crtc)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
switch (crtc) {
case 0:
r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 1);
@ -100,7 +100,7 @@ void radeon_disable_vblank(struct drm_device *dev, int crtc)
{
drm_radeon_private_t *dev_priv = dev->dev_private;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
switch (crtc) {
case 0:
r500_vbl_irq_set_state(dev, R500_D1MODE_INT_MASK, 0);
@ -135,7 +135,7 @@ static __inline__ u32 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv, u
u32 irq_mask = RADEON_SW_INT_TEST;
*r500_disp_int = 0;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
/* vbl interrupts in a different place */
if (irqs & R500_DISPLAY_INT_STATUS) {
@ -205,7 +205,7 @@ irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
DRM_WAKEUP(&dev_priv->swi_queue);
/* VBLANK interrupt */
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
if (r500_disp_int & R500_D1_VBLANK_INTERRUPT)
drm_handle_vblank(dev, 0);
if (r500_disp_int & R500_D2_VBLANK_INTERRUPT)
@ -295,7 +295,7 @@ u32 radeon_get_vblank_counter(struct drm_device *dev, int crtc)
return -EINVAL;
}
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690) {
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) {
if (crtc == 0)
return RADEON_READ(R500_D1CRTC_FRAME_COUNT);
else
@ -357,7 +357,7 @@ void radeon_driver_irq_preinstall(struct drm_device * dev)
u32 dummy;
/* Disable *all* interrupts */
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
@ -389,7 +389,7 @@ void radeon_driver_irq_uninstall(struct drm_device * dev)
dev_priv->irq_enabled = 0;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS690)
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
/* Disable *all* interrupts */
RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);

59
sys/external/bsd/drm/dist/shared-core/radeon_state.c vendored
View File

@ -1553,9 +1553,15 @@ static void radeon_cp_discard_buffer(struct drm_device * dev, struct drm_buf * b
buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
/* Emit the vertex buffer age */
BEGIN_RING(2);
RADEON_DISPATCH_AGE(buf_priv->age);
ADVANCE_RING();
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) {
BEGIN_RING(3);
R600_DISPATCH_AGE(buf_priv->age);
ADVANCE_RING();
} else {
BEGIN_RING(2);
RADEON_DISPATCH_AGE(buf_priv->age);
ADVANCE_RING();
}
buf->pending = 1;
buf->used = 0;
@ -2486,24 +2492,25 @@ static int radeon_cp_indirect(struct drm_device *dev, void *data, struct drm_fil
buf->used = indirect->end;
/* Wait for the 3D stream to idle before the indirect buffer
* containing 2D acceleration commands is processed.
*/
BEGIN_RING(2);
RADEON_WAIT_UNTIL_3D_IDLE();
ADVANCE_RING();
/* Dispatch the indirect buffer full of commands from the
* X server. This is insecure and is thus only available to
* privileged clients.
*/
radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
if (indirect->discard) {
radeon_cp_discard_buffer(dev, buf);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
r600_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
else {
/* Wait for the 3D stream to idle before the indirect buffer
* containing 2D acceleration commands is processed.
*/
BEGIN_RING(2);
RADEON_WAIT_UNTIL_3D_IDLE();
ADVANCE_RING();
radeon_cp_dispatch_indirect(dev, buf, indirect->start, indirect->end);
}
if (indirect->discard)
radeon_cp_discard_buffer(dev, buf);
COMMIT_RING();
return 0;
}
@ -3037,14 +3044,23 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
break;
case RADEON_PARAM_LAST_FRAME:
dev_priv->stats.last_frame_reads++;
value = GET_SCRATCH(0);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
value = GET_R600_SCRATCH(0);
else
value = GET_SCRATCH(0);
break;
case RADEON_PARAM_LAST_DISPATCH:
value = GET_SCRATCH(1);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
value = GET_R600_SCRATCH(1);
else
value = GET_SCRATCH(1);
break;
case RADEON_PARAM_LAST_CLEAR:
dev_priv->stats.last_clear_reads++;
value = GET_SCRATCH(2);
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
value = GET_R600_SCRATCH(2);
else
value = GET_SCRATCH(2);
break;
case RADEON_PARAM_IRQ_NR:
value = dev->irq;
@ -3079,7 +3095,10 @@ static int radeon_cp_getparam(struct drm_device *dev, void *data, struct drm_fil
case RADEON_PARAM_SCRATCH_OFFSET:
if (!dev_priv->writeback_works)
return -EINVAL;
value = RADEON_SCRATCH_REG_OFFSET;
if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
value = R600_SCRATCH_REG_OFFSET;
else
value = RADEON_SCRATCH_REG_OFFSET;
break;
case RADEON_PARAM_CARD_TYPE:
@ -3244,7 +3263,7 @@ struct drm_ioctl_desc radeon_ioctls[] = {
DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_ROOT_ONLY),
DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf, DRM_AUTH),
DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam, DRM_AUTH),

7
sys/external/bsd/drm/dist/shared-core/savage_bci.c vendored
View File

@ -656,19 +656,14 @@ int savage_driver_firstopen(struct drm_device *dev)
*/
void savage_driver_lastclose(struct drm_device *dev)
{
#ifndef DRM_NO_MTRR
drm_savage_private_t *dev_priv = dev->dev_private;
int i;
for (i = 0; i < 3; ++i)
if (dev_priv->mtrr[i].handle >= 0)
drm_mtrr_del(
#ifdef __FreeBSD__
dev_priv->mtrr[i].handle,
#endif
drm_mtrr_del(dev_priv->mtrr[i].handle,
dev_priv->mtrr[i].base,
dev_priv->mtrr[i].size, DRM_MTRR_WC);
#endif
}
int savage_driver_unload(struct drm_device *dev)

28
sys/external/bsd/drm/dist/shared-core/savage_state.c vendored
View File

@ -374,18 +374,18 @@ static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
/* Need to reorder indices for correct flat
* shading while preserving the clock sense
* for correct culling. Only on Savage3D. */
int ireorder[3] = { -1, -1, -1 };
ireorder[start % 3] = 2;
int reorder[3] = { -1, -1, -1 };
reorder[start % 3] = 2;
BEGIN_BCI((count + 1 + 1) / 2);
BCI_DRAW_INDICES_S3D(count, prim, start + 2);
for (i = start + 1; i + 1 < start + count; i += 2)
BCI_WRITE((i + ireorder[i % 3]) |
BCI_WRITE((i + reorder[i % 3]) |
((i + 1 +
ireorder[(i + 1) % 3]) << 16));
reorder[(i + 1) % 3]) << 16));
if (i < start + count)
BCI_WRITE(i + ireorder[i % 3]);
BCI_WRITE(i + reorder[i % 3]);
} else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
BEGIN_BCI((count + 1 + 1) / 2);
BCI_DRAW_INDICES_S3D(count, prim, start);
@ -493,14 +493,14 @@ static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
/* Need to reorder vertices for correct flat
* shading while preserving the clock sense
* for correct culling. Only on Savage3D. */
int ireorder[3] = { -1, -1, -1 };
ireorder[start % 3] = 2;
int reorder[3] = { -1, -1, -1 };
reorder[start % 3] = 2;
BEGIN_DMA(count * vtx_size + 1);
DMA_DRAW_PRIMITIVE(count, prim, skip);
for (i = start; i < start + count; ++i) {
unsigned int j = i + ireorder[i % 3];
unsigned int j = i + reorder[i % 3];
DMA_COPY(&vtxbuf[vb_stride * j], vtx_size);
}
@ -634,17 +634,17 @@ static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
/* Need to reorder indices for correct flat
* shading while preserving the clock sense
* for correct culling. Only on Savage3D. */
int ireorder[3] = { 2, -1, -1 };
int reorder[3] = { 2, -1, -1 };
BEGIN_BCI((count + 1 + 1) / 2);
BCI_DRAW_INDICES_S3D(count, prim, idx[2]);
for (i = 1; i + 1 < count; i += 2)
BCI_WRITE(idx[i + ireorder[i % 3]] |
BCI_WRITE(idx[i + reorder[i % 3]] |
(idx[i + 1 +
ireorder[(i + 1) % 3]] << 16));
reorder[(i + 1) % 3]] << 16));
if (i < count)
BCI_WRITE(idx[i + ireorder[i % 3]]);
BCI_WRITE(idx[i + reorder[i % 3]]);
} else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
BEGIN_BCI((count + 1 + 1) / 2);
BCI_DRAW_INDICES_S3D(count, prim, idx[0]);
@ -754,13 +754,13 @@ static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
/* Need to reorder vertices for correct flat
* shading while preserving the clock sense
* for correct culling. Only on Savage3D. */
int ireorder[3] = { 2, -1, -1 };
int reorder[3] = { 2, -1, -1 };
BEGIN_DMA(count * vtx_size + 1);
DMA_DRAW_PRIMITIVE(count, prim, skip);
for (i = 0; i < count; ++i) {
unsigned int j = idx[i + ireorder[i % 3]];
unsigned int j = idx[i + reorder[i % 3]];
DMA_COPY(&vtxbuf[vb_stride * j], vtx_size);
}

14
sys/external/bsd/drm/dist/shared-core/sis_ds.c vendored
View File

@ -57,18 +57,18 @@ set_t *setInit(void)
int setAdd(set_t * set, ITEM_TYPE item)
{
int myfree = set->free;
int free = set->free;
if (myfree != -1) {
set->list[myfree].val = item;
set->free = set->list[myfree].free_next;
if (free != -1) {
set->list[free].val = item;
set->free = set->list[free].free_next;
} else {
return 0;
}
set->list[myfree].alloc_next = set->alloc;
set->alloc = myfree;
set->list[myfree].free_next = -1;
set->list[free].alloc_next = set->alloc;
set->alloc = free;
set->list[free].free_next = -1;
return 1;
}