use designated initializer to make adaptability and flexibility for changing struct bus_space.
no functional change.
This commit is contained in:
ryo
parent
5db8fdfe6f
commit
509197b672
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@ -1,4 +1,4 @@
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/* $NetBSD: rsbus_io.c,v 1.4 2012/05/10 10:27:10 skrll Exp $ */
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/* $NetBSD: rsbus_io.c,v 1.5 2018/03/16 17:56:31 ryo Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: rsbus_io.c,v 1.4 2012/05/10 10:27:10 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: rsbus_io.c,v 1.5 2018/03/16 17:56:31 ryo Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -52,79 +52,79 @@ bs_protos(mainbus);
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/* Declare the rsbus bus space tag */
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struct bus_space rsbus_bs_tag = {
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/* cookie */
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(void *) 2, /* Shift to apply to registers */
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.bs_cookie = (void *) 2, /* Shift to apply to registers */
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/* mapping/unmapping */
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mainbus_bs_map,
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mainbus_bs_unmap,
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mainbus_bs_subregion,
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.bs_map = mainbus_bs_map,
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.bs_unmap = mainbus_bs_unmap,
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.bs_subregion = mainbus_bs_subregion,
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/* allocation/deallocation */
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mainbus_bs_alloc,
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mainbus_bs_free,
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.bs_alloc = mainbus_bs_alloc,
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.bs_free = mainbus_bs_free,
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/* get kernel virtual address */
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0, /* there is no linear mapping */
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.bs_vaddr = 0, /* there is no linear mapping */
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/* mmap bus space for userland */
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mainbus_bs_mmap,
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.bs_mmap = mainbus_bs_mmap,
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/* barrier */
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mainbus_bs_barrier,
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.bs_barrier = mainbus_bs_barrier,
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/* read (single) */
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rsbus_bs_r_1,
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rsbus_bs_r_2,
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rsbus_bs_r_4,
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bs_notimpl_bs_r_8,
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.bs_r_1 = rsbus_bs_r_1,
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.bs_r_2 = rsbus_bs_r_2,
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.bs_r_4 = rsbus_bs_r_4,
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.bs_r_8 = bs_notimpl_bs_r_8,
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/* read multiple */
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rsbus_bs_rm_1,
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rsbus_bs_rm_2,
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bs_notimpl_bs_rm_4,
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bs_notimpl_bs_rm_8,
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.bs_rm_1 = rsbus_bs_rm_1,
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.bs_rm_2 = rsbus_bs_rm_2,
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.bs_rm_4 = bs_notimpl_bs_rm_4,
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.bs_rm_8 = bs_notimpl_bs_rm_8,
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/* read region */
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rsbus_bs_rr_1,
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rsbus_bs_rr_2,
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bs_notimpl_bs_rr_4,
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bs_notimpl_bs_rr_8,
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.bs_rr_1 = rsbus_bs_rr_1,
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.bs_rr_2 = rsbus_bs_rr_2,
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.bs_rr_4 = bs_notimpl_bs_rr_4,
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.bs_rr_8 = bs_notimpl_bs_rr_8,
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/* write (single) */
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rsbus_bs_w_1,
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rsbus_bs_w_2,
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rsbus_bs_w_4,
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bs_notimpl_bs_w_8,
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.bs_w_1 = rsbus_bs_w_1,
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.bs_w_2 = rsbus_bs_w_2,
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.bs_w_4 = rsbus_bs_w_4,
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.bs_w_8 = bs_notimpl_bs_w_8,
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/* write multiple */
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rsbus_bs_wm_1,
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rsbus_bs_wm_2,
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bs_notimpl_bs_wm_4,
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bs_notimpl_bs_wm_8,
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.bs_wm_1 = rsbus_bs_wm_1,
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.bs_wm_2 = rsbus_bs_wm_2,
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.bs_wm_4 = bs_notimpl_bs_wm_4,
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.bs_wm_8 = bs_notimpl_bs_wm_8,
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/* write region */
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rsbus_bs_wr_1,
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rsbus_bs_wr_2,
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bs_notimpl_bs_wr_4,
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bs_notimpl_bs_wr_8,
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.bs_wr_1 = rsbus_bs_wr_1,
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.bs_wr_2 = rsbus_bs_wr_2,
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.bs_wr_4 = bs_notimpl_bs_wr_4,
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.bs_wr_8 = bs_notimpl_bs_wr_8,
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/* set multiple */
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bs_notimpl_bs_sm_1,
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bs_notimpl_bs_sm_2,
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bs_notimpl_bs_sm_4,
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bs_notimpl_bs_sm_8,
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.bs_sm_1 = bs_notimpl_bs_sm_1,
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.bs_sm_2 = bs_notimpl_bs_sm_2,
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.bs_sm_4 = bs_notimpl_bs_sm_4,
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.bs_sm_8 = bs_notimpl_bs_sm_8,
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/* set region */
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rsbus_bs_sr_1,
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rsbus_bs_sr_2,
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bs_notimpl_bs_sr_4,
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bs_notimpl_bs_sr_8,
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.bs_sr_1 = rsbus_bs_sr_1,
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.bs_sr_2 = rsbus_bs_sr_2,
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.bs_sr_4 = bs_notimpl_bs_sr_4,
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.bs_sr_8 = bs_notimpl_bs_sr_8,
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/* copy */
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bs_notimpl_bs_c_1,
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bs_notimpl_bs_c_2,
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bs_notimpl_bs_c_4,
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bs_notimpl_bs_c_8,
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.bs_c_1 = bs_notimpl_bs_c_1,
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.bs_c_2 = bs_notimpl_bs_c_2,
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.bs_c_4 = bs_notimpl_bs_c_4,
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.bs_c_8 = bs_notimpl_bs_c_8,
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};
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/* bus space functions */
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@ -1,4 +1,4 @@
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/* $NetBSD: podulebus_io.c,v 1.8 2012/05/10 10:27:10 skrll Exp $ */
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/* $NetBSD: podulebus_io.c,v 1.9 2018/03/16 17:56:31 ryo Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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@ -37,7 +37,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: podulebus_io.c,v 1.8 2012/05/10 10:27:10 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: podulebus_io.c,v 1.9 2018/03/16 17:56:31 ryo Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -52,79 +52,79 @@ bs_protos(bs_notimpl);
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struct bus_space podulebus_bs_tag = {
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/* cookie */
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(void *) 2, /* Shift to apply to registers */
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.bs_cookie = (void *) 2, /* Shift to apply to registers */
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/* mapping/unmapping */
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podulebus_bs_map,
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podulebus_bs_unmap,
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podulebus_bs_subregion,
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.bs_map = podulebus_bs_map,
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.bs_unmap = podulebus_bs_unmap,
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.bs_subregion = podulebus_bs_subregion,
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/* allocation/deallocation */
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podulebus_bs_alloc,
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podulebus_bs_free,
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.bs_alloc = podulebus_bs_alloc,
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.bs_free = podulebus_bs_free,
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/* get kernel virtual address */
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0, /* there is no linear mapping */
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.bs_vaddr = 0, /* there is no linear mapping */
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/* mmap bus space for userland */
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bs_notimpl_bs_mmap, /* there is no bus mapping ... well maybe EASI space? */
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.bs_mmap = bs_notimpl_bs_mmap, /* there is no bus mapping ... well maybe EASI space? */
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/* barrier */
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podulebus_bs_barrier,
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.bs_barrier = podulebus_bs_barrier,
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/* read (single) */
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podulebus_bs_r_1,
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podulebus_bs_r_2,
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podulebus_bs_r_4,
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bs_notimpl_bs_r_8,
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.bs_r_1 = podulebus_bs_r_1,
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.bs_r_2 = podulebus_bs_r_2,
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.bs_r_4 = podulebus_bs_r_4,
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.bs_r_8 = bs_notimpl_bs_r_8,
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/* read multiple */
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podulebus_bs_rm_1,
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podulebus_bs_rm_2,
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bs_notimpl_bs_rm_4,
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bs_notimpl_bs_rm_8,
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.bs_rm_1 = podulebus_bs_rm_1,
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.bs_rm_2 = podulebus_bs_rm_2,
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.bs_rm_4 = bs_notimpl_bs_rm_4,
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.bs_rm_8 = bs_notimpl_bs_rm_8,
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/* read region */
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podulebus_bs_rr_1,
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podulebus_bs_rr_2,
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bs_notimpl_bs_rr_4,
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bs_notimpl_bs_rr_8,
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.bs_rr_1 = podulebus_bs_rr_1,
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.bs_rr_2 = podulebus_bs_rr_2,
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.bs_rr_4 = bs_notimpl_bs_rr_4,
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.bs_rr_8 = bs_notimpl_bs_rr_8,
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/* write (single) */
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podulebus_bs_w_1,
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podulebus_bs_w_2,
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podulebus_bs_w_4,
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bs_notimpl_bs_w_8,
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.bs_w_1 = podulebus_bs_w_1,
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.bs_w_2 = podulebus_bs_w_2,
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.bs_w_4 = podulebus_bs_w_4,
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.bs_w_8 = bs_notimpl_bs_w_8,
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/* write multiple */
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podulebus_bs_wm_1,
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podulebus_bs_wm_2,
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bs_notimpl_bs_wm_4,
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bs_notimpl_bs_wm_8,
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.bs_wm_1 = podulebus_bs_wm_1,
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.bs_wm_2 = podulebus_bs_wm_2,
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.bs_wm_4 = bs_notimpl_bs_wm_4,
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.bs_wm_8 = bs_notimpl_bs_wm_8,
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/* write region */
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podulebus_bs_wr_1,
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podulebus_bs_wr_2,
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bs_notimpl_bs_wr_4,
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bs_notimpl_bs_wr_8,
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.bs_wr_1 = podulebus_bs_wr_1,
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.bs_wr_2 = podulebus_bs_wr_2,
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.bs_wr_4 = bs_notimpl_bs_wr_4,
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.bs_wr_8 = bs_notimpl_bs_wr_8,
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/* set multiple */
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bs_notimpl_bs_sm_1,
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bs_notimpl_bs_sm_2,
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bs_notimpl_bs_sm_4,
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bs_notimpl_bs_sm_8,
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.bs_sm_1 = bs_notimpl_bs_sm_1,
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.bs_sm_2 = bs_notimpl_bs_sm_2,
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.bs_sm_4 = bs_notimpl_bs_sm_4,
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.bs_sm_8 = bs_notimpl_bs_sm_8,
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/* set region */
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podulebus_bs_sr_1,
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podulebus_bs_sr_2,
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bs_notimpl_bs_sr_4,
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bs_notimpl_bs_sr_8,
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.bs_sr_1 = podulebus_bs_sr_1,
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.bs_sr_2 = podulebus_bs_sr_2,
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.bs_sr_4 = bs_notimpl_bs_sr_4,
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.bs_sr_8 = bs_notimpl_bs_sr_8,
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/* copy */
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bs_notimpl_bs_c_1,
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bs_notimpl_bs_c_2,
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bs_notimpl_bs_c_4,
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bs_notimpl_bs_c_8,
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.bs_c_1 = bs_notimpl_bs_c_1,
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.bs_c_2 = bs_notimpl_bs_c_2,
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.bs_c_4 = bs_notimpl_bs_c_4,
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.bs_c_8 = bs_notimpl_bs_c_8,
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};
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/* bus space functions */
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@ -1,4 +1,4 @@
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/* $NetBSD: armv7_generic_space.c,v 1.6 2018/01/22 13:29:28 skrll Exp $ */
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/* $NetBSD: armv7_generic_space.c,v 1.7 2018/03/16 17:56:31 ryo Exp $ */
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/*-
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* Copyright (c) 2012 The NetBSD Foundation, Inc.
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@ -31,7 +31,7 @@
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: armv7_generic_space.c,v 1.6 2018/01/22 13:29:28 skrll Exp $");
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__KERNEL_RCSID(0, "$NetBSD: armv7_generic_space.c,v 1.7 2018/03/16 17:56:31 ryo Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -56,231 +56,231 @@ bs_protos(generic_armv4);
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struct bus_space armv7_generic_bs_tag = {
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/* cookie */
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(void *) 0,
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.bs_cookie = (void *) 0,
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/* mapping/unmapping */
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armv7_generic_bs_map,
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armv7_generic_bs_unmap,
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armv7_generic_bs_subregion,
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.bs_map = armv7_generic_bs_map,
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.bs_unmap = armv7_generic_bs_unmap,
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.bs_subregion = armv7_generic_bs_subregion,
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/* allocation/deallocation */
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armv7_generic_bs_alloc, /* not implemented */
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armv7_generic_bs_free, /* not implemented */
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.bs_alloc = armv7_generic_bs_alloc, /* not implemented */
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.bs_free = armv7_generic_bs_free, /* not implemented */
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/* get kernel virtual address */
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armv7_generic_bs_vaddr,
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.bs_vaddr = armv7_generic_bs_vaddr,
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/* mmap */
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armv7_generic_bs_mmap,
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.bs_mmap = armv7_generic_bs_mmap,
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/* barrier */
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armv7_generic_bs_barrier,
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.bs_barrier = armv7_generic_bs_barrier,
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/* read (single) */
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generic_bs_r_1,
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NSWAP(generic_armv4_bs_r_2),
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NSWAP(generic_bs_r_4),
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bs_notimpl_bs_r_8,
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.bs_r_1 = generic_bs_r_1,
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.bs_r_2 = NSWAP(generic_armv4_bs_r_2),
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.bs_r_4 = NSWAP(generic_bs_r_4),
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.bs_r_8 = bs_notimpl_bs_r_8,
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/* read multiple */
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generic_bs_rm_1,
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NSWAP(generic_armv4_bs_rm_2),
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NSWAP(generic_bs_rm_4),
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bs_notimpl_bs_rm_8,
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.bs_rm_1 = generic_bs_rm_1,
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.bs_rm_2 = NSWAP(generic_armv4_bs_rm_2),
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.bs_rm_4 = NSWAP(generic_bs_rm_4),
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.bs_rm_8 = bs_notimpl_bs_rm_8,
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/* read region */
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generic_bs_rr_1,
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NSWAP(generic_armv4_bs_rr_2),
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NSWAP(generic_bs_rr_4),
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bs_notimpl_bs_rr_8,
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.bs_rr_1 = generic_bs_rr_1,
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.bs_rr_2 = NSWAP(generic_armv4_bs_rr_2),
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.bs_rr_4 = NSWAP(generic_bs_rr_4),
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.bs_rr_8 = bs_notimpl_bs_rr_8,
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/* write (single) */
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generic_bs_w_1,
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NSWAP(generic_armv4_bs_w_2),
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NSWAP(generic_bs_w_4),
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bs_notimpl_bs_w_8,
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.bs_w_1 = generic_bs_w_1,
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.bs_w_2 = NSWAP(generic_armv4_bs_w_2),
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.bs_w_4 = NSWAP(generic_bs_w_4),
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.bs_w_8 = bs_notimpl_bs_w_8,
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/* write multiple */
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generic_bs_wm_1,
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NSWAP(generic_armv4_bs_wm_2),
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NSWAP(generic_bs_wm_4),
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bs_notimpl_bs_wm_8,
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.bs_wm_1 = generic_bs_wm_1,
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.bs_wm_2 = NSWAP(generic_armv4_bs_wm_2),
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.bs_wm_4 = NSWAP(generic_bs_wm_4),
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.bs_wm_8 = bs_notimpl_bs_wm_8,
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/* write region */
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generic_bs_wr_1,
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NSWAP(generic_armv4_bs_wr_2),
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NSWAP(generic_bs_wr_4),
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bs_notimpl_bs_wr_8,
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.bs_wr_1 = generic_bs_wr_1,
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.bs_wr_2 = NSWAP(generic_armv4_bs_wr_2),
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.bs_wr_4 = NSWAP(generic_bs_wr_4),
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.bs_wr_8 = bs_notimpl_bs_wr_8,
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/* set multiple */
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bs_notimpl_bs_sm_1,
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bs_notimpl_bs_sm_2,
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bs_notimpl_bs_sm_4,
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bs_notimpl_bs_sm_8,
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.bs_sm_1 = bs_notimpl_bs_sm_1,
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.bs_sm_2 = bs_notimpl_bs_sm_2,
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.bs_sm_4 = bs_notimpl_bs_sm_4,
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.bs_sm_8 = bs_notimpl_bs_sm_8,
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/* set region */
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generic_bs_sr_1,
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NSWAP(generic_armv4_bs_sr_2),
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NSWAP(generic_bs_sr_4),
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bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = NSWAP(generic_armv4_bs_sr_2),
|
||||
.bs_sr_4 = NSWAP(generic_bs_sr_4),
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
NSWAP(generic_armv4_bs_r_2),
|
||||
NSWAP(generic_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = generic_bs_r_1,
|
||||
.bs_r_2_s = NSWAP(generic_armv4_bs_r_2),
|
||||
.bs_r_4_s = NSWAP(generic_bs_r_4),
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
NSWAP(generic_armv4_bs_rm_2),
|
||||
NSWAP(generic_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = generic_bs_rm_1,
|
||||
.bs_rm_2_s = NSWAP(generic_armv4_bs_rm_2),
|
||||
.bs_rm_4_s = NSWAP(generic_bs_rm_4),
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
NSWAP(generic_armv4_bs_rr_2),
|
||||
NSWAP(generic_bs_rr_4),
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = generic_bs_rr_1,
|
||||
.bs_rr_2_s = NSWAP(generic_armv4_bs_rr_2),
|
||||
.bs_rr_4_s = NSWAP(generic_bs_rr_4),
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
NSWAP(generic_armv4_bs_w_2),
|
||||
NSWAP(generic_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = generic_bs_w_1,
|
||||
.bs_w_2_s = NSWAP(generic_armv4_bs_w_2),
|
||||
.bs_w_4_s = NSWAP(generic_bs_w_4),
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
NSWAP(generic_armv4_bs_wm_2),
|
||||
NSWAP(generic_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = generic_bs_wm_1,
|
||||
.bs_wm_2_s = NSWAP(generic_armv4_bs_wm_2),
|
||||
.bs_wm_4_s = NSWAP(generic_bs_wm_4),
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
NSWAP(generic_armv4_bs_wr_2),
|
||||
NSWAP(generic_bs_wr_4),
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = generic_bs_wr_1,
|
||||
.bs_wr_2_s = NSWAP(generic_armv4_bs_wr_2),
|
||||
.bs_wr_4_s = NSWAP(generic_bs_wr_4),
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
struct bus_space armv7_generic_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
armv7_generic_bs_map,
|
||||
armv7_generic_bs_unmap,
|
||||
armv7_generic_a4x_bs_subregion,
|
||||
.bs_map = armv7_generic_bs_map,
|
||||
.bs_unmap = armv7_generic_bs_unmap,
|
||||
.bs_subregion = armv7_generic_a4x_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
armv7_generic_bs_alloc, /* not implemented */
|
||||
armv7_generic_bs_free, /* not implemented */
|
||||
.bs_alloc = armv7_generic_bs_alloc, /* not implemented */
|
||||
.bs_free = armv7_generic_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
armv7_generic_bs_vaddr,
|
||||
.bs_vaddr = armv7_generic_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
armv7_generic_a4x_bs_mmap,
|
||||
.bs_mmap = armv7_generic_a4x_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
armv7_generic_bs_barrier,
|
||||
.bs_barrier = armv7_generic_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
NSWAP(a4x_bs_r_2),
|
||||
NSWAP(a4x_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = NSWAP(a4x_bs_r_2),
|
||||
.bs_r_4 = NSWAP(a4x_bs_r_4),
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
NSWAP(a4x_bs_rm_2),
|
||||
NSWAP(a4x_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = NSWAP(a4x_bs_rm_2),
|
||||
.bs_rm_4 = NSWAP(a4x_bs_rm_4),
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
NSWAP(a4x_bs_w_2),
|
||||
NSWAP(a4x_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = NSWAP(a4x_bs_w_2),
|
||||
.bs_w_4 = NSWAP(a4x_bs_w_4),
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
NSWAP(a4x_bs_wm_2),
|
||||
NSWAP(a4x_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = NSWAP(a4x_bs_wm_2),
|
||||
.bs_wm_4 = NSWAP(a4x_bs_wm_4),
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
NSWAP(a4x_bs_r_2),
|
||||
NSWAP(a4x_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = a4x_bs_r_1,
|
||||
.bs_r_2_s = NSWAP(a4x_bs_r_2),
|
||||
.bs_r_4_s = NSWAP(a4x_bs_r_4),
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
NSWAP(a4x_bs_rm_2),
|
||||
NSWAP(a4x_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = a4x_bs_rm_1,
|
||||
.bs_rm_2_s = NSWAP(a4x_bs_rm_2),
|
||||
.bs_rm_4_s = NSWAP(a4x_bs_rm_4),
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2_s = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4_s = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
NSWAP(a4x_bs_w_2),
|
||||
NSWAP(a4x_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = a4x_bs_w_1,
|
||||
.bs_w_2_s = NSWAP(a4x_bs_w_2),
|
||||
.bs_w_4_s = NSWAP(a4x_bs_w_4),
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
NSWAP(a4x_bs_wm_2),
|
||||
NSWAP(a4x_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = a4x_bs_wm_1,
|
||||
.bs_wm_2_s = NSWAP(a4x_bs_wm_2),
|
||||
.bs_wm_4_s = NSWAP(a4x_bs_wm_4),
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2_s = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4_s = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: at91_bus_space.c,v 1.4 2011/07/01 19:31:16 dyoung Exp $ */
|
||||
/* $NetBSD: at91_bus_space.c,v 1.5 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Based on ep93xx_space.c
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: at91_bus_space.c,v 1.4 2011/07/01 19:31:16 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: at91_bus_space.c,v 1.5 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
/*
|
||||
* bus_space I/O functions for ep93xx
|
||||
|
|
@ -57,79 +57,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space at91_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
at91_bs_map,
|
||||
at91_bs_unmap,
|
||||
at91_bs_subregion,
|
||||
.bs_map = at91_bs_map,
|
||||
.bs_unmap = at91_bs_unmap,
|
||||
.bs_subregion = at91_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
at91_bs_alloc,
|
||||
at91_bs_free,
|
||||
.bs_alloc = at91_bs_alloc,
|
||||
.bs_free = at91_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
at91_bs_vaddr,
|
||||
.bs_vaddr = at91_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
at91_bs_mmap,
|
||||
.bs_mmap = at91_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
at91_bs_barrier,
|
||||
.bs_barrier = at91_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
/* read multiple */
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
/* read region */
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
/* write (single) */
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
/* write multiple */
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
/* write region */
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
/* set multiple */
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
/* set region */
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
/* copy */
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: bcmgen_space.c,v 1.5 2015/02/25 13:52:42 joerg Exp $ */
|
||||
/* $NetBSD: bcmgen_space.c,v 1.6 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
|
|
@ -31,7 +31,7 @@
|
|||
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.5 2015/02/25 13:52:42 joerg Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: bcmgen_space.c,v 1.6 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -55,116 +55,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space bcmgen_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
bcmgen_bs_map,
|
||||
bcmgen_bs_unmap,
|
||||
bcmgen_bs_subregion,
|
||||
.bs_map = bcmgen_bs_map,
|
||||
.bs_unmap = bcmgen_bs_unmap,
|
||||
.bs_subregion = bcmgen_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
bcmgen_bs_alloc, /* not implemented */
|
||||
bcmgen_bs_free, /* not implemented */
|
||||
.bs_alloc = bcmgen_bs_alloc, /* not implemented */
|
||||
.bs_free = bcmgen_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
bcmgen_bs_vaddr,
|
||||
.bs_vaddr = bcmgen_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
bcmgen_bs_barrier,
|
||||
.bs_barrier = bcmgen_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
NSWAP(generic_armv4_bs_r_2),
|
||||
NSWAP(generic_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = NSWAP(generic_armv4_bs_r_2),
|
||||
.bs_r_4 = NSWAP(generic_bs_r_4),
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
NSWAP(generic_armv4_bs_rm_2),
|
||||
NSWAP(generic_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = NSWAP(generic_armv4_bs_rm_2),
|
||||
.bs_rm_4 = NSWAP(generic_bs_rm_4),
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
NSWAP(generic_armv4_bs_rr_2),
|
||||
NSWAP(generic_bs_rr_4),
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = NSWAP(generic_armv4_bs_rr_2),
|
||||
.bs_rr_4 = NSWAP(generic_bs_rr_4),
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
NSWAP(generic_armv4_bs_w_2),
|
||||
NSWAP(generic_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = NSWAP(generic_armv4_bs_w_2),
|
||||
.bs_w_4 = NSWAP(generic_bs_w_4),
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
NSWAP(generic_armv4_bs_wm_2),
|
||||
NSWAP(generic_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = NSWAP(generic_armv4_bs_wm_2),
|
||||
.bs_wm_4 = NSWAP(generic_bs_wm_4),
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
NSWAP(generic_armv4_bs_wr_2),
|
||||
NSWAP(generic_bs_wr_4),
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = NSWAP(generic_armv4_bs_wr_2),
|
||||
.bs_wr_4 = NSWAP(generic_bs_wr_4),
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
NSWAP(generic_armv4_bs_sr_2),
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = NSWAP(generic_armv4_bs_sr_2),
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
NSWAP(generic_armv4_bs_r_2),
|
||||
NSWAP(generic_bs_r_4),
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = generic_bs_r_1,
|
||||
.bs_r_2_s = NSWAP(generic_armv4_bs_r_2),
|
||||
.bs_r_4_s = NSWAP(generic_bs_r_4),
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
NSWAP(generic_armv4_bs_rm_2),
|
||||
NSWAP(generic_bs_rm_4),
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = generic_bs_rm_1,
|
||||
.bs_rm_2_s = NSWAP(generic_armv4_bs_rm_2),
|
||||
.bs_rm_4_s = NSWAP(generic_bs_rm_4),
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
NSWAP(generic_armv4_bs_rr_2),
|
||||
NSWAP(generic_bs_rr_4),
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = generic_bs_rr_1,
|
||||
.bs_rr_2_s = NSWAP(generic_armv4_bs_rr_2),
|
||||
.bs_rr_4_s = NSWAP(generic_bs_rr_4),
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
NSWAP(generic_armv4_bs_w_2),
|
||||
NSWAP(generic_bs_w_4),
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = generic_bs_w_1,
|
||||
.bs_w_2_s = NSWAP(generic_armv4_bs_w_2),
|
||||
.bs_w_4_s = NSWAP(generic_bs_w_4),
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
NSWAP(generic_armv4_bs_wm_2),
|
||||
NSWAP(generic_bs_wm_4),
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = generic_bs_wm_1,
|
||||
.bs_wm_2_s = NSWAP(generic_armv4_bs_wm_2),
|
||||
.bs_wm_4_s = NSWAP(generic_bs_wm_4),
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
NSWAP(generic_armv4_bs_wr_2),
|
||||
NSWAP(generic_bs_wr_4),
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = generic_bs_wr_1,
|
||||
.bs_wr_2_s = NSWAP(generic_armv4_bs_wr_2),
|
||||
.bs_wr_4_s = NSWAP(generic_bs_wr_4),
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: clps711x_space.c,v 1.1 2013/04/28 11:57:13 kiyohara Exp $ */
|
||||
/* $NetBSD: clps711x_space.c,v 1.2 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2004 Jesse Off
|
||||
|
|
@ -27,7 +27,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: clps711x_space.c,v 1.1 2013/04/28 11:57:13 kiyohara Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: clps711x_space.c,v 1.2 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
/*
|
||||
* bus_space I/O functions for clps711x
|
||||
|
|
@ -48,79 +48,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space clps711x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
clps711x_bs_map,
|
||||
clps711x_bs_unmap,
|
||||
clps711x_bs_subregion,
|
||||
.bs_map = clps711x_bs_map,
|
||||
.bs_unmap = clps711x_bs_unmap,
|
||||
.bs_subregion = clps711x_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
clps711x_bs_alloc,
|
||||
clps711x_bs_free,
|
||||
.bs_alloc = clps711x_bs_alloc,
|
||||
.bs_free = clps711x_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
clps711x_bs_vaddr,
|
||||
.bs_vaddr = clps711x_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
clps711x_bs_mmap,
|
||||
.bs_mmap = clps711x_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
clps711x_bs_barrier,
|
||||
.bs_barrier = clps711x_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
bs_notimpl_bs_r_2, /* XXXX */
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = bs_notimpl_bs_r_2, /* XXXX */
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2, /* XXXX */
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2, /* XXXX */
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2, /* XXXX */
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2, /* XXXX */
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
bs_notimpl_bs_w_2, /* XXXX */
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = bs_notimpl_bs_w_2, /* XXXX */
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2, /* XXXX */
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2, /* XXXX */
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2, /* XXXX */
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2, /* XXXX */
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2, /* XXXX */
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2, /* XXXX */
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2, /* XXXX */
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2, /* XXXX */
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ep93xx_space.c,v 1.5 2011/07/01 19:31:17 dyoung Exp $ */
|
||||
/* $NetBSD: ep93xx_space.c,v 1.6 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2004 Jesse Off
|
||||
|
|
@ -27,7 +27,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ep93xx_space.c,v 1.5 2011/07/01 19:31:17 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ep93xx_space.c,v 1.6 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
/*
|
||||
* bus_space I/O functions for ep93xx
|
||||
|
|
@ -52,79 +52,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space ep93xx_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
ep93xx_bs_map,
|
||||
ep93xx_bs_unmap,
|
||||
ep93xx_bs_subregion,
|
||||
.bs_map = ep93xx_bs_map,
|
||||
.bs_unmap = ep93xx_bs_unmap,
|
||||
.bs_subregion = ep93xx_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
ep93xx_bs_alloc,
|
||||
ep93xx_bs_free,
|
||||
.bs_alloc = ep93xx_bs_alloc,
|
||||
.bs_free = ep93xx_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
ep93xx_bs_vaddr,
|
||||
.bs_vaddr = ep93xx_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
ep93xx_bs_mmap,
|
||||
.bs_mmap = ep93xx_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ep93xx_bs_barrier,
|
||||
.bs_barrier = ep93xx_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
/* read multiple */
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
/* read region */
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
/* write (single) */
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
/* write multiple */
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
/* write region */
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
/* set multiple */
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
/* set region */
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
/* copy */
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: footbridge_com_io.c,v 1.8 2012/02/12 16:34:07 matt Exp $ */
|
||||
/* $NetBSD: footbridge_com_io.c,v 1.9 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Mark Brinicombe.
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: footbridge_com_io.c,v 1.8 2012/02/12 16:34:07 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: footbridge_com_io.c,v 1.9 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -59,78 +59,78 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space fcomcons_bs_tag = {
|
||||
/* cookie */
|
||||
NULL,
|
||||
.bs_cookie = NULL,
|
||||
|
||||
/* mapping/unmapping */
|
||||
fcomcons_bs_map,
|
||||
fcomcons_bs_unmap,
|
||||
fcomcons_bs_subregion,
|
||||
.bs_map = fcomcons_bs_map,
|
||||
.bs_unmap = fcomcons_bs_unmap,
|
||||
.bs_subregion = fcomcons_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
fcomcons_bs_alloc,
|
||||
fcomcons_bs_free,
|
||||
.bs_alloc = fcomcons_bs_alloc,
|
||||
.bs_free = fcomcons_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
0, /* never used */
|
||||
.bs_vaddr = 0, /* never used */
|
||||
|
||||
/* Mmap bus space for user */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
fcomcons_bs_barrier,
|
||||
.bs_barrier = fcomcons_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
bs_notimpl_bs_r_1,
|
||||
bs_notimpl_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = bs_notimpl_bs_r_1,
|
||||
.bs_r_2 = bs_notimpl_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_notimpl_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = bs_notimpl_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
bs_notimpl_bs_w_1,
|
||||
bs_notimpl_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = bs_notimpl_bs_w_1,
|
||||
.bs_w_2 = bs_notimpl_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_notimpl_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = bs_notimpl_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: footbridge_io.c,v 1.23 2017/06/13 15:23:17 skrll Exp $ */
|
||||
/* $NetBSD: footbridge_io.c,v 1.24 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Causality Limited
|
||||
|
|
@ -39,7 +39,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.23 2017/06/13 15:23:17 skrll Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: footbridge_io.c,v 1.24 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -63,79 +63,79 @@ bs_mmap_proto(footbridge_mem);
|
|||
|
||||
struct bus_space footbridge_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0, /* Base address */
|
||||
.bs_cookie = (void *) 0, /* Base address */
|
||||
|
||||
/* mapping/unmapping */
|
||||
footbridge_bs_map,
|
||||
footbridge_bs_unmap,
|
||||
footbridge_bs_subregion,
|
||||
.bs_map = footbridge_bs_map,
|
||||
.bs_unmap = footbridge_bs_unmap,
|
||||
.bs_subregion = footbridge_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
footbridge_bs_alloc,
|
||||
footbridge_bs_free,
|
||||
.bs_alloc = footbridge_bs_alloc,
|
||||
.bs_free = footbridge_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
footbridge_bs_vaddr,
|
||||
.bs_vaddr = footbridge_bs_vaddr,
|
||||
|
||||
/* Mmap bus space for user */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
footbridge_bs_barrier,
|
||||
.bs_barrier = footbridge_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: isa_io.c,v 1.8 2014/09/13 18:08:38 matt Exp $ */
|
||||
/* $NetBSD: isa_io.c,v 1.9 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: isa_io.c,v 1.8 2014/09/13 18:08:38 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: isa_io.c,v 1.9 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -63,79 +63,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space isa_io_bs_tag = {
|
||||
/* cookie */
|
||||
NULL, /* initialized below */
|
||||
.bs_cookie = NULL, /* initialized below */
|
||||
|
||||
/* mapping/unmapping */
|
||||
isa_bs_map,
|
||||
isa_bs_unmap,
|
||||
isa_bs_subregion,
|
||||
.bs_map = isa_bs_map,
|
||||
.bs_unmap = isa_bs_unmap,
|
||||
.bs_subregion = isa_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
isa_bs_alloc,
|
||||
isa_bs_free,
|
||||
.bs_alloc = isa_bs_alloc,
|
||||
.bs_free = isa_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
isa_bs_vaddr,
|
||||
.bs_vaddr = isa_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap, /* XXX possible even? XXX */
|
||||
.bs_mmap = bs_notimpl_bs_mmap, /* XXX possible even? XXX */
|
||||
|
||||
/* barrier */
|
||||
isa_bs_barrier,
|
||||
.bs_barrier = isa_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = isa_bs_r_1,
|
||||
.bs_r_2 = isa_bs_r_2,
|
||||
.bs_r_4 = isa_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = isa_bs_rm_1,
|
||||
.bs_rm_2 = isa_bs_rm_2,
|
||||
.bs_rm_4 = isa_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = isa_bs_rr_1,
|
||||
.bs_rr_2 = isa_bs_rr_2,
|
||||
.bs_rr_4 = isa_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = isa_bs_w_1,
|
||||
.bs_w_2 = isa_bs_w_2,
|
||||
.bs_w_4 = isa_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = isa_bs_wm_1,
|
||||
.bs_wm_2 = isa_bs_wm_2,
|
||||
.bs_wm_4 = isa_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = isa_bs_wr_1,
|
||||
.bs_wr_2 = isa_bs_wr_2,
|
||||
.bs_wr_4 = isa_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
isa_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = isa_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -144,79 +144,79 @@ struct bus_space isa_io_bs_tag = {
|
|||
*/
|
||||
struct bus_space isa_mem_bs_tag = {
|
||||
/* cookie */
|
||||
NULL, /* initialized below */
|
||||
.bs_cookie = NULL, /* initialized below */
|
||||
|
||||
/* mapping/unmapping */
|
||||
isa_bs_map,
|
||||
isa_bs_unmap,
|
||||
isa_bs_subregion,
|
||||
.bs_map = isa_bs_map,
|
||||
.bs_unmap = isa_bs_unmap,
|
||||
.bs_subregion = isa_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
isa_bs_alloc,
|
||||
isa_bs_free,
|
||||
.bs_alloc = isa_bs_alloc,
|
||||
.bs_free = isa_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
isa_bs_vaddr,
|
||||
.bs_vaddr = isa_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap, /* XXX open for now ... XXX */
|
||||
.bs_mmap = bs_notimpl_bs_mmap, /* XXX open for now ... XXX */
|
||||
|
||||
/* barrier */
|
||||
isa_bs_barrier,
|
||||
.bs_barrier = isa_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = isa_bs_r_1,
|
||||
.bs_r_2 = isa_bs_r_2,
|
||||
.bs_r_4 = isa_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = isa_bs_rm_1,
|
||||
.bs_rm_2 = isa_bs_rm_2,
|
||||
.bs_rm_4 = isa_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = isa_bs_rr_1,
|
||||
.bs_rr_2 = isa_bs_rr_2,
|
||||
.bs_rr_4 = isa_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = isa_bs_w_1,
|
||||
.bs_w_2 = isa_bs_w_2,
|
||||
.bs_w_4 = isa_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = isa_bs_wm_1,
|
||||
.bs_wm_2 = isa_bs_wm_2,
|
||||
.bs_wm_4 = isa_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = isa_bs_wr_1,
|
||||
.bs_wr_2 = isa_bs_wr_2,
|
||||
.bs_wr_4 = isa_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
isa_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = isa_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: gemini_a4x_space.c,v 1.2 2011/07/01 19:32:28 dyoung Exp $ */
|
||||
/* $NetBSD: gemini_a4x_space.c,v 1.3 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/* adapted from:
|
||||
* NetBSD: pxa2x0_a4x_space.c,v 1.4 2006/07/28 08:15:29 simonb Exp
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: gemini_a4x_space.c,v 1.2 2011/07/01 19:32:28 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: gemini_a4x_space.c,v 1.3 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,77 +61,77 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space gemini_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
gemini_bs_map,
|
||||
gemini_bs_unmap,
|
||||
gemini_bs_subregion,
|
||||
.bs_map = gemini_bs_map,
|
||||
.bs_unmap = gemini_bs_unmap,
|
||||
.bs_subregion = gemini_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
gemini_bs_alloc, /* not implemented */
|
||||
gemini_bs_free, /* not implemented */
|
||||
.bs_alloc = gemini_bs_alloc, /* not implemented */
|
||||
.bs_free = gemini_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
gemini_bs_vaddr,
|
||||
.bs_vaddr = gemini_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
gemini_bs_barrier,
|
||||
.bs_barrier = gemini_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
a4x_bs_r_2,
|
||||
a4x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = a4x_bs_r_2,
|
||||
.bs_r_4 = a4x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
a4x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = a4x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
a4x_bs_w_2,
|
||||
a4x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = a4x_bs_w_2,
|
||||
.bs_w_4 = a4x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
a4x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = a4x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: gemini_space.c,v 1.4 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: gemini_space.c,v 1.5 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/* adapted from:
|
||||
* NetBSD: pxa2x0_space.c,v 1.8 2005/11/24 13:08:32 yamt Exp
|
||||
|
|
@ -79,7 +79,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: gemini_space.c,v 1.4 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: gemini_space.c,v 1.5 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -96,79 +96,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space gemini_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
gemini_bs_map,
|
||||
gemini_bs_unmap,
|
||||
gemini_bs_subregion,
|
||||
.bs_map = gemini_bs_map,
|
||||
.bs_unmap = gemini_bs_unmap,
|
||||
.bs_subregion = gemini_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
gemini_bs_alloc, /* not implemented */
|
||||
gemini_bs_free, /* not implemented */
|
||||
.bs_alloc = gemini_bs_alloc, /* not implemented */
|
||||
.bs_free = gemini_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
gemini_bs_vaddr,
|
||||
.bs_vaddr = gemini_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
gemini_bs_barrier,
|
||||
.bs_barrier = gemini_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $Id: imx23_space.c,v 1.2 2013/10/07 17:36:40 matt Exp $ */
|
||||
/* $Id: imx23_space.c,v 1.3 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
|
|
@ -62,79 +62,79 @@ bs_protos(generic_armv4);
|
|||
/* Describes bus space on i.MX23 */
|
||||
struct bus_space imx23_bus_space = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
imx23_bs_map,
|
||||
imx23_bs_unmap,
|
||||
imx23_bs_subregion,
|
||||
.bs_map = imx23_bs_map,
|
||||
.bs_unmap = imx23_bs_unmap,
|
||||
.bs_subregion = imx23_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
imx23_bs_alloc,
|
||||
imx23_bs_free,
|
||||
.bs_alloc = imx23_bs_alloc,
|
||||
.bs_free = imx23_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
imx23_bs_vaddr,
|
||||
.bs_vaddr = imx23_bs_vaddr,
|
||||
|
||||
/* mmap bus space for user */
|
||||
imx23_bs_mmap,
|
||||
.bs_mmap = imx23_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
imx23_bs_barrier,
|
||||
.bs_barrier = imx23_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/* $Id: imx_space.c,v 1.5 2012/09/01 14:44:42 matt Exp $ */
|
||||
/* $Id: imx_space.c,v 1.6 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/* derived from: */
|
||||
/* $NetBSD: imx_space.c,v 1.5 2012/09/01 14:44:42 matt Exp $ */
|
||||
/* $NetBSD: imx_space.c,v 1.6 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
|
||||
|
|
@ -89,116 +89,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space imx_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
imx_bs_map,
|
||||
imx_bs_unmap,
|
||||
imx_bs_subregion,
|
||||
.bs_map = imx_bs_map,
|
||||
.bs_unmap = imx_bs_unmap,
|
||||
.bs_subregion = imx_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
imx_bs_alloc, /* not implemented */
|
||||
imx_bs_free, /* not implemented */
|
||||
.bs_alloc = imx_bs_alloc, /* not implemented */
|
||||
.bs_free = imx_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
imx_bs_vaddr,
|
||||
.bs_vaddr = imx_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
imx_bs_barrier,
|
||||
.bs_barrier = imx_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = generic_bs_r_1,
|
||||
.bs_r_2_s = generic_armv4_bs_r_2,
|
||||
.bs_r_4_s = generic_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = generic_bs_rm_1,
|
||||
.bs_rm_2_s = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4_s = generic_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = generic_bs_rr_1,
|
||||
.bs_rr_2_s = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4_s = generic_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = generic_bs_w_1,
|
||||
.bs_w_2_s = generic_armv4_bs_w_2,
|
||||
.bs_w_4_s = generic_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = generic_bs_wm_1,
|
||||
.bs_wm_2_s = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4_s = generic_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = generic_bs_wr_1,
|
||||
.bs_wr_2_s = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4_s = generic_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: iomd_io.c,v 1.6 2011/07/01 20:26:35 dyoung Exp $ */
|
||||
/* $NetBSD: iomd_io.c,v 1.7 2018/03/16 17:56:31 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Mark Brinicombe.
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: iomd_io.c,v 1.6 2011/07/01 20:26:35 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: iomd_io.c,v 1.7 2018/03/16 17:56:31 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -53,79 +53,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space iomd_bs_tag = {
|
||||
/* cookie */
|
||||
NULL,
|
||||
.bs_cookie = NULL,
|
||||
|
||||
/* mapping/unmapping */
|
||||
iomd_bs_map,
|
||||
iomd_bs_unmap,
|
||||
iomd_bs_subregion,
|
||||
.bs_map = iomd_bs_map,
|
||||
.bs_unmap = iomd_bs_unmap,
|
||||
.bs_subregion = iomd_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
iomd_bs_alloc,
|
||||
iomd_bs_free,
|
||||
.bs_alloc = iomd_bs_alloc,
|
||||
.bs_free = iomd_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
0, /* there is no linear mapping */
|
||||
.bs_vaddr = 0, /* there is no linear mapping */
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap, /* XXX correct? XXX */
|
||||
.bs_mmap = bs_notimpl_bs_mmap, /* XXX correct? XXX */
|
||||
|
||||
/* barrier */
|
||||
iomd_bs_barrier,
|
||||
.bs_barrier = iomd_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
iomd_bs_r_1,
|
||||
iomd_bs_r_2,
|
||||
iomd_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = iomd_bs_r_1,
|
||||
.bs_r_2 = iomd_bs_r_2,
|
||||
.bs_r_4 = iomd_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_notimpl_bs_rm_1,
|
||||
iomd_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = bs_notimpl_bs_rm_1,
|
||||
.bs_rm_2 = iomd_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
iomd_bs_w_1,
|
||||
iomd_bs_w_2,
|
||||
iomd_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = iomd_bs_w_1,
|
||||
.bs_w_2 = iomd_bs_w_2,
|
||||
.bs_w_4 = iomd_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_notimpl_bs_wm_1,
|
||||
iomd_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = bs_notimpl_bs_wm_1,
|
||||
.bs_wm_2 = iomd_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ixp12x0_io.c,v 1.17 2014/02/23 08:07:33 martin Exp $ */
|
||||
/* $NetBSD: ixp12x0_io.c,v 1.18 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002, 2003
|
||||
|
|
@ -28,7 +28,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp12x0_io.c,v 1.17 2014/02/23 08:07:33 martin Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp12x0_io.c,v 1.18 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
/*
|
||||
* bus_space I/O functions for ixp12x0
|
||||
|
|
@ -53,79 +53,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space ixp12x0_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
ixp12x0_bs_map,
|
||||
ixp12x0_bs_unmap,
|
||||
ixp12x0_bs_subregion,
|
||||
.bs_map = ixp12x0_bs_map,
|
||||
.bs_unmap = ixp12x0_bs_unmap,
|
||||
.bs_subregion = ixp12x0_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
ixp12x0_bs_alloc,
|
||||
ixp12x0_bs_free,
|
||||
.bs_alloc = ixp12x0_bs_alloc,
|
||||
.bs_free = ixp12x0_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
ixp12x0_bs_vaddr,
|
||||
.bs_vaddr = ixp12x0_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ixp12x0_bs_barrier,
|
||||
.bs_barrier = ixp12x0_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* Common routines */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: mainbus_io.c,v 1.23 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: mainbus_io.c,v 1.24 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Mark Brinicombe.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: mainbus_io.c,v 1.23 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: mainbus_io.c,v 1.24 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -57,116 +57,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space mainbus_bs_tag = {
|
||||
/* cookie */
|
||||
NULL,
|
||||
.bs_cookie = NULL,
|
||||
|
||||
/* mapping/unmapping */
|
||||
mainbus_bs_map,
|
||||
mainbus_bs_unmap,
|
||||
mainbus_bs_subregion,
|
||||
.bs_map = mainbus_bs_map,
|
||||
.bs_unmap = mainbus_bs_unmap,
|
||||
.bs_subregion = mainbus_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
mainbus_bs_alloc,
|
||||
mainbus_bs_free,
|
||||
.bs_alloc = mainbus_bs_alloc,
|
||||
.bs_free = mainbus_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
0, /* there is no linear mapping */
|
||||
.bs_vaddr = NULL, /* there is no linear mapping */
|
||||
|
||||
/* Mmap bus space for user */
|
||||
mainbus_bs_mmap,
|
||||
.bs_mmap = mainbus_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
mainbus_bs_barrier,
|
||||
.bs_barrier = mainbus_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
mainbus_bs_r_1,
|
||||
mainbus_bs_r_2,
|
||||
mainbus_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = mainbus_bs_r_1,
|
||||
.bs_r_2 = mainbus_bs_r_2,
|
||||
.bs_r_4 = mainbus_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_notimpl_bs_rm_1,
|
||||
mainbus_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 =bs_notimpl_bs_rm_1,
|
||||
.bs_rm_2 = mainbus_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
mainbus_bs_w_1,
|
||||
mainbus_bs_w_2,
|
||||
mainbus_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = mainbus_bs_w_1,
|
||||
.bs_w_2 = mainbus_bs_w_2,
|
||||
.bs_w_4 = mainbus_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
mainbus_bs_wm_1,
|
||||
mainbus_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = mainbus_bs_wm_1,
|
||||
.bs_wm_2 = mainbus_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* stream methods */
|
||||
/* read (single) */
|
||||
mainbus_bs_r_1,
|
||||
mainbus_bs_r_2,
|
||||
mainbus_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = mainbus_bs_r_1,
|
||||
.bs_r_2_s = mainbus_bs_r_2,
|
||||
.bs_r_4_s = mainbus_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_notimpl_bs_rm_1,
|
||||
mainbus_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = bs_notimpl_bs_rm_1,
|
||||
.bs_rm_2_s = mainbus_bs_rm_2,
|
||||
.bs_rm_4_s = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2_s = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4_s = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
mainbus_bs_w_1,
|
||||
mainbus_bs_w_2,
|
||||
mainbus_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = mainbus_bs_w_1,
|
||||
.bs_w_2_s = mainbus_bs_w_2,
|
||||
.bs_w_4_s = mainbus_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
mainbus_bs_wm_1,
|
||||
mainbus_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = mainbus_bs_wm_1,
|
||||
.bs_wm_2_s = mainbus_bs_wm_2,
|
||||
.bs_wm_4_s = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2_s = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4_s = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: mvsoc_space.c,v 1.9 2017/03/10 15:44:24 skrll Exp $ */
|
||||
/* $NetBSD: mvsoc_space.c,v 1.10 2018/03/16 17:56:32 ryo Exp $ */
|
||||
/*
|
||||
* Copyright (c) 2007 KIYOHARA Takashi
|
||||
* All rights reserved.
|
||||
|
|
@ -26,7 +26,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.9 2017/03/10 15:44:24 skrll Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: mvsoc_space.c,v 1.10 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include "opt_mvsoc.h"
|
||||
#include "mvpex.h"
|
||||
|
|
@ -51,84 +51,121 @@ bs_protos(bs_notimpl);
|
|||
|
||||
#define MVSOC_BUS_SPACE_NORMAL_FUNCS \
|
||||
/* read (single) */ \
|
||||
generic_bs_r_1, \
|
||||
generic_armv4_bs_r_2, \
|
||||
generic_bs_r_4, \
|
||||
bs_notimpl_bs_r_8, \
|
||||
.bs_r_1 = generic_bs_r_1, \
|
||||
.bs_r_2 = generic_armv4_bs_r_2, \
|
||||
.bs_r_4 = generic_bs_r_4, \
|
||||
.bs_r_8 = bs_notimpl_bs_r_8, \
|
||||
\
|
||||
/* read multiple */ \
|
||||
generic_bs_rm_1, \
|
||||
generic_armv4_bs_rm_2, \
|
||||
generic_bs_rm_4, \
|
||||
bs_notimpl_bs_rm_8, \
|
||||
.bs_rm_1 = generic_bs_rm_1, \
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2, \
|
||||
.bs_rm_4 = generic_bs_rm_4, \
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8, \
|
||||
\
|
||||
/* read region */ \
|
||||
generic_bs_rr_1, \
|
||||
generic_armv4_bs_rr_2, \
|
||||
generic_bs_rr_4, \
|
||||
bs_notimpl_bs_rr_8, \
|
||||
.bs_rr_1 = generic_bs_rr_1, \
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2, \
|
||||
.bs_rr_4 = generic_bs_rr_4, \
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8, \
|
||||
\
|
||||
/* write (single) */ \
|
||||
generic_bs_w_1, \
|
||||
generic_armv4_bs_w_2, \
|
||||
generic_bs_w_4, \
|
||||
bs_notimpl_bs_w_8, \
|
||||
.bs_w_1 = generic_bs_w_1, \
|
||||
.bs_w_2 = generic_armv4_bs_w_2, \
|
||||
.bs_w_4 = generic_bs_w_4, \
|
||||
.bs_w_8 = bs_notimpl_bs_w_8, \
|
||||
\
|
||||
/* write multiple */ \
|
||||
generic_bs_wm_1, \
|
||||
generic_armv4_bs_wm_2, \
|
||||
generic_bs_wm_4, \
|
||||
bs_notimpl_bs_wm_8, \
|
||||
.bs_wm_1 = generic_bs_wm_1, \
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2, \
|
||||
.bs_wm_4 = generic_bs_wm_4, \
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8, \
|
||||
\
|
||||
/* write region */ \
|
||||
generic_bs_wr_1, \
|
||||
generic_armv4_bs_wr_2, \
|
||||
generic_bs_wr_4, \
|
||||
bs_notimpl_bs_wr_8
|
||||
.bs_wr_1 = generic_bs_wr_1, \
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2, \
|
||||
.bs_wr_4 = generic_bs_wr_4, \
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8
|
||||
|
||||
#define MVSOC_BUS_SPACE_STREAM_FUNCS \
|
||||
/* read stream (single) */ \
|
||||
.bs_r_1_s = generic_bs_r_1, \
|
||||
.bs_r_2_s = generic_armv4_bs_r_2, \
|
||||
.bs_r_4_s = generic_bs_r_4, \
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8, \
|
||||
\
|
||||
/* read multiple stream */ \
|
||||
.bs_rm_1_s = generic_bs_rm_1, \
|
||||
.bs_rm_2_s = generic_armv4_bs_rm_2, \
|
||||
.bs_rm_4_s = generic_bs_rm_4, \
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8, \
|
||||
\
|
||||
/* read region stream */ \
|
||||
.bs_rr_1_s = generic_bs_rr_1, \
|
||||
.bs_rr_2_s = generic_armv4_bs_rr_2, \
|
||||
.bs_rr_4_s = generic_bs_rr_4, \
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8, \
|
||||
\
|
||||
/* write stream (single) */ \
|
||||
.bs_w_1_s = generic_bs_w_1, \
|
||||
.bs_w_2_s = generic_armv4_bs_w_2, \
|
||||
.bs_w_4_s = generic_bs_w_4, \
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8, \
|
||||
\
|
||||
/* write multiple stream */ \
|
||||
.bs_wm_1_s = generic_bs_wm_1, \
|
||||
.bs_wm_2_s = generic_armv4_bs_wm_2, \
|
||||
.bs_wm_4_s = generic_bs_wm_4, \
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8, \
|
||||
\
|
||||
/* write region stream */ \
|
||||
.bs_wr_1_s = generic_bs_wr_1, \
|
||||
.bs_wr_2_s = generic_armv4_bs_wr_2, \
|
||||
.bs_wr_4_s = generic_bs_wr_4, \
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8
|
||||
|
||||
#define MVSOC_BUS_SPACE_DEFAULT_FUNCS \
|
||||
/* mapping/unmapping */ \
|
||||
mvsoc_bs_map, \
|
||||
mvsoc_bs_unmap, \
|
||||
mvsoc_bs_subregion, \
|
||||
.bs_map = mvsoc_bs_map, \
|
||||
.bs_unmap = mvsoc_bs_unmap, \
|
||||
.bs_subregion = mvsoc_bs_subregion, \
|
||||
\
|
||||
/* allocation/deallocation */ \
|
||||
mvsoc_bs_alloc, \
|
||||
mvsoc_bs_free, \
|
||||
.bs_alloc =mvsoc_bs_alloc, \
|
||||
.bs_free = mvsoc_bs_free, \
|
||||
\
|
||||
/* get kernel virtual address */ \
|
||||
mvsoc_bs_vaddr, \
|
||||
.bs_vaddr = mvsoc_bs_vaddr, \
|
||||
\
|
||||
/* mmap bus space for userland */ \
|
||||
bs_notimpl_bs_mmap, \
|
||||
.bs_mmap = bs_notimpl_bs_mmap, \
|
||||
\
|
||||
/* barrier */ \
|
||||
mvsoc_bs_barrier, \
|
||||
.bs_barrier = mvsoc_bs_barrier, \
|
||||
\
|
||||
MVSOC_BUS_SPACE_NORMAL_FUNCS, \
|
||||
\
|
||||
/* set multiple */ \
|
||||
bs_notimpl_bs_sm_1, \
|
||||
bs_notimpl_bs_sm_2, \
|
||||
bs_notimpl_bs_sm_4, \
|
||||
bs_notimpl_bs_sm_8, \
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1, \
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2, \
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4, \
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8, \
|
||||
\
|
||||
/* set region */ \
|
||||
bs_notimpl_bs_sr_1, \
|
||||
generic_armv4_bs_sr_2, \
|
||||
generic_bs_sr_4, \
|
||||
bs_notimpl_bs_sr_8, \
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1, \
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2, \
|
||||
.bs_sr_4 = generic_bs_sr_4, \
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8, \
|
||||
\
|
||||
/* copy */ \
|
||||
bs_notimpl_bs_c_1, \
|
||||
generic_armv4_bs_c_2, \
|
||||
bs_notimpl_bs_c_4, \
|
||||
bs_notimpl_bs_c_8
|
||||
.bs_c_1 = bs_notimpl_bs_c_1, \
|
||||
.bs_c_2 = generic_armv4_bs_c_2, \
|
||||
.bs_c_4 = bs_notimpl_bs_c_4, \
|
||||
.bs_c_8 = bs_notimpl_bs_c_8
|
||||
|
||||
|
||||
struct bus_space mvsoc_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)0,
|
||||
.bs_cookie = (void *)0,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -140,7 +177,7 @@ struct bus_space mvsoc_bs_tag = {
|
|||
#if defined(ORION)
|
||||
struct bus_space orion_pex0_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ORION_TAG_PEX0_MEM,
|
||||
.bs_cookie = (void *)ORION_TAG_PEX0_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -149,7 +186,7 @@ struct bus_space orion_pex0_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space orion_pex0_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ORION_TAG_PEX0_IO,
|
||||
.bs_cookie = (void *)ORION_TAG_PEX0_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -158,7 +195,7 @@ struct bus_space orion_pex0_io_bs_tag = {
|
|||
};
|
||||
struct bus_space orion_pex1_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ORION_TAG_PEX1_MEM,
|
||||
.bs_cookie = (void *)ORION_TAG_PEX1_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -167,7 +204,7 @@ struct bus_space orion_pex1_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space orion_pex1_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ORION_TAG_PEX1_IO,
|
||||
.bs_cookie = (void *)ORION_TAG_PEX1_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -179,7 +216,7 @@ struct bus_space orion_pex1_io_bs_tag = {
|
|||
#if defined(KIRKWOOD)
|
||||
struct bus_space kirkwood_pex_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)KIRKWOOD_TAG_PEX_MEM,
|
||||
.bs_cookie = (void *)KIRKWOOD_TAG_PEX_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -188,7 +225,7 @@ struct bus_space kirkwood_pex_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space kirkwood_pex_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)KIRKWOOD_TAG_PEX_IO,
|
||||
.bs_cookie = (void *)KIRKWOOD_TAG_PEX_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -197,7 +234,7 @@ struct bus_space kirkwood_pex_io_bs_tag = {
|
|||
};
|
||||
struct bus_space kirkwood_pex1_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)KIRKWOOD_TAG_PEX1_MEM,
|
||||
.bs_cookie = (void *)KIRKWOOD_TAG_PEX1_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -206,7 +243,7 @@ struct bus_space kirkwood_pex1_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space kirkwood_pex1_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)KIRKWOOD_TAG_PEX1_IO,
|
||||
.bs_cookie = (void *)KIRKWOOD_TAG_PEX1_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -218,7 +255,7 @@ struct bus_space kirkwood_pex1_io_bs_tag = {
|
|||
#if defined(DOVE)
|
||||
struct bus_space dove_pex0_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)DOVE_TAG_PEX0_MEM,
|
||||
.bs_cookie = (void *)DOVE_TAG_PEX0_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -227,7 +264,7 @@ struct bus_space dove_pex0_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space dove_pex0_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)DOVE_TAG_PEX0_IO,
|
||||
.bs_cookie = (void *)DOVE_TAG_PEX0_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -236,7 +273,7 @@ struct bus_space dove_pex0_io_bs_tag = {
|
|||
};
|
||||
struct bus_space dove_pex1_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)DOVE_TAG_PEX1_MEM,
|
||||
.bs_cookie = (void *)DOVE_TAG_PEX1_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -245,7 +282,7 @@ struct bus_space dove_pex1_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space dove_pex1_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)DOVE_TAG_PEX1_IO,
|
||||
.bs_cookie = (void *)DOVE_TAG_PEX1_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -257,85 +294,85 @@ struct bus_space dove_pex1_io_bs_tag = {
|
|||
#if defined(ARMADAXP)
|
||||
struct bus_space armadaxp_pex00_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX00_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX00_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex00_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX00_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX00_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex01_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX01_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX01_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex01_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX01_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX01_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex02_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX02_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX02_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex02_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX02_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX02_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex03_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX03_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX03_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex03_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX03_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX03_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex10_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX10_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX10_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex10_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX10_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX10_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex2_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX2_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX2_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex2_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX2_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX2_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex3_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX3_MEM,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX3_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
struct bus_space armadaxp_pex3_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ARMADAXP_TAG_PEX3_IO,
|
||||
.bs_cookie = (void *)ARMADAXP_TAG_PEX3_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS
|
||||
};
|
||||
|
|
@ -346,7 +383,7 @@ struct bus_space armadaxp_pex3_io_bs_tag = {
|
|||
#if defined(ORION)
|
||||
struct bus_space orion_pci_mem_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ORION_TAG_PCI_MEM,
|
||||
.bs_cookie = (void *)ORION_TAG_PCI_MEM,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
@ -355,7 +392,7 @@ struct bus_space orion_pci_mem_bs_tag = {
|
|||
};
|
||||
struct bus_space orion_pci_io_bs_tag = {
|
||||
/* cookie */
|
||||
(void *)ORION_TAG_PCI_IO,
|
||||
.bs_cookie = (void *)ORION_TAG_PCI_IO,
|
||||
|
||||
MVSOC_BUS_SPACE_DEFAULT_FUNCS,
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: mpcore_a2x_space.c,v 1.2 2011/07/01 20:30:21 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: mpcore_a2x_space.c,v 1.3 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -53,77 +53,77 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space mpcore_a2x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
mpcore_bs_map,
|
||||
mpcore_bs_unmap,
|
||||
mpcore_bs_subregion,
|
||||
.bs_map = mpcore_bs_map,
|
||||
.bs_unmap = mpcore_bs_unmap,
|
||||
.bs_subregion = mpcore_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
mpcore_bs_alloc, /* not implemented */
|
||||
mpcore_bs_free, /* not implemented */
|
||||
.bs_alloc = mpcore_bs_alloc, /* not implemented */
|
||||
.bs_free = mpcore_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
mpcore_bs_vaddr,
|
||||
.bs_vaddr = mpcore_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
mpcore_bs_barrier,
|
||||
.bs_barrier = mpcore_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a2x_bs_r_1,
|
||||
a2x_bs_r_2,
|
||||
a2x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a2x_bs_r_1,
|
||||
.bs_r_2 = a2x_bs_r_2,
|
||||
.bs_r_4 = a2x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a2x_bs_rm_1,
|
||||
a2x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a2x_bs_rm_1,
|
||||
.bs_rm_2 = a2x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a2x_bs_w_1,
|
||||
a2x_bs_w_2,
|
||||
a2x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a2x_bs_w_1,
|
||||
.bs_w_2 = a2x_bs_w_2,
|
||||
.bs_w_4 = a2x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a2x_bs_wm_1,
|
||||
a2x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a2x_bs_wm_1,
|
||||
.bs_wm_2 = a2x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: mpcore_a4x_space.c,v 1.2 2011/07/01 20:30:21 dyoung Exp $ */
|
||||
/* $NetBSD: mpcore_a4x_space.c,v 1.3 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/* derived from:
|
||||
NetBSD: pxa2x0_a4x_space.c,v 1.4 2006/07/28 08:15:29 simonb Exp */
|
||||
|
|
@ -35,7 +35,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: mpcore_a4x_space.c,v 1.2 2011/07/01 20:30:21 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: mpcore_a4x_space.c,v 1.3 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -53,77 +53,77 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space mpcore_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
mpcore_bs_map,
|
||||
mpcore_bs_unmap,
|
||||
mpcore_bs_subregion,
|
||||
.bs_map = mpcore_bs_map,
|
||||
.bs_unmap = mpcore_bs_unmap,
|
||||
.bs_subregion = mpcore_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
mpcore_bs_alloc, /* not implemented */
|
||||
mpcore_bs_free, /* not implemented */
|
||||
.bs_alloc = mpcore_bs_alloc, /* not implemented */
|
||||
.bs_free = mpcore_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
mpcore_bs_vaddr,
|
||||
.bs_vaddr = mpcore_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
mpcore_bs_barrier,
|
||||
.bs_barrier = mpcore_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
a4x_bs_r_2,
|
||||
a4x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = a4x_bs_r_2,
|
||||
.bs_r_4 = a4x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
a4x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = a4x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
a4x_bs_w_2,
|
||||
a4x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = a4x_bs_w_2,
|
||||
.bs_w_4 = a4x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
a4x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = a4x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: mpcore_space.c,v 1.3 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: mpcore_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/* derived from: */
|
||||
/* NetBSD: imx_space.c,v 1.2 2010/11/13 05:00:31 bsh Exp */
|
||||
|
|
@ -89,79 +89,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space mpcore_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
mpcore_bs_map,
|
||||
mpcore_bs_unmap,
|
||||
mpcore_bs_subregion,
|
||||
.bs_map = mpcore_bs_map,
|
||||
.bs_unmap = mpcore_bs_unmap,
|
||||
.bs_subregion = mpcore_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
mpcore_bs_alloc, /* not implemented */
|
||||
mpcore_bs_free, /* not implemented */
|
||||
.bs_alloc = mpcore_bs_alloc, /* not implemented */
|
||||
.bs_free = mpcore_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
mpcore_bs_vaddr,
|
||||
.bs_vaddr = mpcore_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
mpcore_bs_barrier,
|
||||
.bs_barrier = mpcore_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap_a2x_space.c,v 1.3 2012/07/15 20:54:15 matt Exp $ */
|
||||
/* $NetBSD: omap_a2x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Based on arch/arm/xscale/pxa2x0_a4x_space.c
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_a2x_space.c,v 1.3 2012/07/15 20:54:15 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_a2x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -57,117 +57,117 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space omap_a2x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
omap_bs_map,
|
||||
omap_bs_unmap,
|
||||
omap_bs_subregion,
|
||||
.bs_map = omap_bs_map,
|
||||
.bs_unmap = omap_bs_unmap,
|
||||
.bs_subregion = omap_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
omap_bs_alloc, /* not implemented */
|
||||
omap_bs_free, /* not implemented */
|
||||
.bs_alloc = omap_bs_alloc, /* not implemented */
|
||||
.bs_free = omap_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
omap_bs_vaddr,
|
||||
.bs_vaddr = omap_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
omap_bs_barrier,
|
||||
.bs_barrier = omap_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a2x_bs_r_1,
|
||||
a2x_bs_r_2,
|
||||
a2x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a2x_bs_r_1,
|
||||
.bs_r_2 = a2x_bs_r_2,
|
||||
.bs_r_4 = a2x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a2x_bs_rm_1,
|
||||
a2x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a2x_bs_rm_1,
|
||||
.bs_rm_2 = a2x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a2x_bs_w_1,
|
||||
a2x_bs_w_2,
|
||||
a2x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a2x_bs_w_1,
|
||||
.bs_w_2 = a2x_bs_w_2,
|
||||
.bs_w_4 = a2x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a2x_bs_wm_1,
|
||||
a2x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a2x_bs_wm_1,
|
||||
.bs_wm_2 = a2x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* stream methods */
|
||||
/* read (single) */
|
||||
a2x_bs_r_1,
|
||||
a2x_bs_r_2,
|
||||
a2x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = a2x_bs_r_1,
|
||||
.bs_r_2_s = a2x_bs_r_2,
|
||||
.bs_r_4_s = a2x_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a2x_bs_rm_1,
|
||||
a2x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = a2x_bs_rm_1,
|
||||
.bs_rm_2_s = a2x_bs_rm_2,
|
||||
.bs_rm_4_s = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2_s = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4_s = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a2x_bs_w_1,
|
||||
a2x_bs_w_2,
|
||||
a2x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = a2x_bs_w_1,
|
||||
.bs_w_2_s = a2x_bs_w_2,
|
||||
.bs_w_4_s = a2x_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a2x_bs_wm_1,
|
||||
a2x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = a2x_bs_wm_1,
|
||||
.bs_wm_2_s = a2x_bs_wm_2,
|
||||
.bs_wm_4_s = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2_s = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4_s = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap_a4x_space.c,v 1.3 2012/07/15 20:54:15 matt Exp $ */
|
||||
/* $NetBSD: omap_a4x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Based on arch/arm/xscale/pxa2x0_a4x_space.c
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_a4x_space.c,v 1.3 2012/07/15 20:54:15 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_a4x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -57,116 +57,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space omap_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
omap_bs_map,
|
||||
omap_bs_unmap,
|
||||
omap_bs_subregion,
|
||||
.bs_map = omap_bs_map,
|
||||
.bs_unmap = omap_bs_unmap,
|
||||
.bs_subregion = omap_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
omap_bs_alloc, /* not implemented */
|
||||
omap_bs_free, /* not implemented */
|
||||
.bs_alloc = omap_bs_alloc, /* not implemented */
|
||||
.bs_free = omap_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
omap_bs_vaddr,
|
||||
.bs_vaddr = omap_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
omap_bs_barrier,
|
||||
.bs_barrier = omap_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
a4x_bs_r_2,
|
||||
a4x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = a4x_bs_r_2,
|
||||
.bs_r_4 = a4x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
a4x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = a4x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
a4x_bs_w_2,
|
||||
a4x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = a4x_bs_w_2,
|
||||
.bs_w_4 = a4x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
a4x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = a4x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
a4x_bs_r_2,
|
||||
a4x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = a4x_bs_r_1,
|
||||
.bs_r_2_s = a4x_bs_r_2,
|
||||
.bs_r_4_s = a4x_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
a4x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = a4x_bs_rm_1,
|
||||
.bs_rm_2_s = a4x_bs_rm_2,
|
||||
.bs_rm_4_s = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2_s = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4_s = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
a4x_bs_w_2,
|
||||
a4x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = a4x_bs_w_1,
|
||||
.bs_w_2_s = a4x_bs_w_2,
|
||||
.bs_w_4_s = a4x_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
a4x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = a4x_bs_wm_1,
|
||||
.bs_wm_2_s = a4x_bs_wm_2,
|
||||
.bs_wm_4_s = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2_s = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4_s = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap_nobyteacc_space.c,v 1.3 2012/07/15 20:54:15 matt Exp $ */
|
||||
/* $NetBSD: omap_nobyteacc_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* "nobyteacc" bus_space functions for Texas Instruments OMAP processor.
|
||||
|
|
@ -73,7 +73,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_nobyteacc_space.c,v 1.3 2012/07/15 20:54:15 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_nobyteacc_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -91,116 +91,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space nobyteacc_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
omap_bs_map,
|
||||
omap_bs_unmap,
|
||||
omap_bs_subregion,
|
||||
.bs_map = omap_bs_map,
|
||||
.bs_unmap = omap_bs_unmap,
|
||||
.bs_subregion = omap_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
omap_bs_alloc, /* not implemented */
|
||||
omap_bs_free, /* not implemented */
|
||||
.bs_alloc = omap_bs_alloc, /* not implemented */
|
||||
.bs_free = omap_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
omap_bs_vaddr,
|
||||
.bs_vaddr = omap_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
omap_bs_barrier,
|
||||
.bs_barrier = omap_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
nobyteacc_bs_w_1, /* promote 8-bit writes to 16-bit */
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = nobyteacc_bs_w_1, /* promote 8-bit writes to 16-bit */
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_notimpl_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = bs_notimpl_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = generic_bs_r_1,
|
||||
.bs_r_2_s = generic_armv4_bs_r_2,
|
||||
.bs_r_4_s = generic_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = generic_bs_rm_1,
|
||||
.bs_rm_2_s = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4_s = generic_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = generic_bs_rr_1,
|
||||
.bs_rr_2_s = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4_s = generic_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
nobyteacc_bs_w_1, /* promote 8-bit writes to 16-bit */
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = nobyteacc_bs_w_1, /* promote 8-bit writes to 16-bit */
|
||||
.bs_w_2_s = generic_armv4_bs_w_2,
|
||||
.bs_w_4_s = generic_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_notimpl_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = bs_notimpl_bs_wm_1,
|
||||
.bs_wm_2_s = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4_s = generic_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2_s = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4_s = generic_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: omap_space.c,v 1.7 2013/01/01 17:28:27 jakllsch Exp $ */
|
||||
/* $NetBSD: omap_space.c,v 1.8 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* bus_space functions for Texas Instruments OMAP processor.
|
||||
|
|
@ -73,7 +73,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_space.c,v 1.7 2013/01/01 17:28:27 jakllsch Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: omap_space.c,v 1.8 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -90,116 +90,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space omap_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
omap_bs_map,
|
||||
omap_bs_unmap,
|
||||
omap_bs_subregion,
|
||||
.bs_map = omap_bs_map,
|
||||
.bs_unmap = omap_bs_unmap,
|
||||
.bs_subregion = omap_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
omap_bs_alloc, /* not implemented */
|
||||
omap_bs_free, /* not implemented */
|
||||
.bs_alloc = omap_bs_alloc, /* not implemented */
|
||||
.bs_free = omap_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
omap_bs_vaddr,
|
||||
.bs_vaddr = omap_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
omap_bs_barrier,
|
||||
.bs_barrier = omap_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = generic_bs_r_1,
|
||||
.bs_r_2_s = generic_armv4_bs_r_2,
|
||||
.bs_r_4_s = generic_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = generic_bs_rm_1,
|
||||
.bs_rm_2_s = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4_s = generic_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = generic_bs_rr_1,
|
||||
.bs_rr_2_s = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4_s = generic_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = generic_bs_w_1,
|
||||
.bs_w_2_s = generic_armv4_bs_w_2,
|
||||
.bs_w_4_s = generic_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = generic_bs_wm_1,
|
||||
.bs_wm_2_s = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4_s = generic_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = generic_bs_wr_1,
|
||||
.bs_wr_2_s = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4_s = generic_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: s3c2xx0_space.c,v 1.9 2011/07/01 20:31:39 dyoung Exp $ */
|
||||
/* $NetBSD: s3c2xx0_space.c,v 1.10 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002 Fujitsu Component Limited
|
||||
|
|
@ -74,7 +74,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: s3c2xx0_space.c,v 1.9 2011/07/01 20:31:39 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: s3c2xx0_space.c,v 1.10 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -91,79 +91,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space s3c2xx0_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
s3c2xx0_bs_map,
|
||||
s3c2xx0_bs_unmap,
|
||||
s3c2xx0_bs_subregion,
|
||||
.bs_map = s3c2xx0_bs_map,
|
||||
.bs_unmap = s3c2xx0_bs_unmap,
|
||||
.bs_subregion = s3c2xx0_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
s3c2xx0_bs_alloc, /* not implemented */
|
||||
s3c2xx0_bs_free, /* not implemented */
|
||||
.bs_alloc = s3c2xx0_bs_alloc, /* not implemented */
|
||||
.bs_free = s3c2xx0_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
s3c2xx0_bs_vaddr,
|
||||
.bs_vaddr = s3c2xx0_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
s3c2xx0_bs_barrier,
|
||||
.bs_barrier = s3c2xx0_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sa11x0_io.c,v 1.20 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: sa11x0_io.c,v 1.21 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Mark Brinicombe.
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: sa11x0_io.c,v 1.20 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: sa11x0_io.c,v 1.21 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,79 +61,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space sa11x0_bs_tag = {
|
||||
/* cookie */
|
||||
NULL,
|
||||
.bs_cookie = NULL,
|
||||
|
||||
/* mapping/unmapping */
|
||||
sa11x0_bs_map,
|
||||
sa11x0_bs_unmap,
|
||||
sa11x0_bs_subregion,
|
||||
.bs_map = sa11x0_bs_map,
|
||||
.bs_unmap = sa11x0_bs_unmap,
|
||||
.bs_subregion = sa11x0_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
sa11x0_bs_alloc,
|
||||
sa11x0_bs_free,
|
||||
.bs_alloc = sa11x0_bs_alloc,
|
||||
.bs_free = sa11x0_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
sa11x0_bs_vaddr,
|
||||
.bs_vaddr = sa11x0_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
sa11x0_bs_mmap,
|
||||
.bs_mmap = sa11x0_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
sa11x0_bs_barrier,
|
||||
.bs_barrier = sa11x0_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
sa11x0_bs_r_1,
|
||||
sa11x0_bs_r_2,
|
||||
sa11x0_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = sa11x0_bs_r_1,
|
||||
.bs_r_2 = sa11x0_bs_r_2,
|
||||
.bs_r_4 = sa11x0_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
sa11x0_bs_rm_1,
|
||||
sa11x0_bs_rm_2,
|
||||
sa11x0_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = sa11x0_bs_rm_1,
|
||||
.bs_rm_2 = sa11x0_bs_rm_2,
|
||||
.bs_rm_4 = sa11x0_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
sa11x0_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = sa11x0_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
sa11x0_bs_w_1,
|
||||
sa11x0_bs_w_2,
|
||||
sa11x0_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = sa11x0_bs_w_1,
|
||||
.bs_w_2 = sa11x0_bs_w_2,
|
||||
.bs_w_4 = sa11x0_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
sa11x0_bs_wm_1,
|
||||
sa11x0_bs_wm_2,
|
||||
sa11x0_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = sa11x0_bs_wm_1,
|
||||
.bs_wm_2 = sa11x0_bs_wm_2,
|
||||
.bs_wm_4 = sa11x0_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
sa11x0_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = sa11x0_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
sa11x0_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = sa11x0_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
sa11x0_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = sa11x0_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: becc_space.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $ */
|
||||
/* $NetBSD: becc_space.c,v 1.6 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: becc_space.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: becc_space.c,v 1.6 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -65,79 +65,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
const struct bus_space becc_bs_tag_template = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
NULL,
|
||||
NULL,
|
||||
becc_bs_subregion,
|
||||
.bs_map = NULL,
|
||||
.bs_unmap = NULL,
|
||||
.bs_subregion = becc_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
NULL,
|
||||
NULL,
|
||||
.bs_alloc = NULL,
|
||||
.bs_free = NULL,
|
||||
|
||||
/* get kernel virtual address */
|
||||
becc_bs_vaddr,
|
||||
.bs_vaddr = becc_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
becc_bs_mmap,
|
||||
.bs_mmap = becc_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
becc_bs_barrier,
|
||||
.bs_barrier = becc_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
becc_pci_bs_r_1,
|
||||
becc_pci_bs_r_2,
|
||||
becc_pci_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = becc_pci_bs_r_1,
|
||||
.bs_r_2 = becc_pci_bs_r_2,
|
||||
.bs_r_4 = becc_pci_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_notimpl_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = bs_notimpl_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
becc_pci_bs_w_1,
|
||||
becc_pci_bs_w_2,
|
||||
becc_pci_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = becc_pci_bs_w_1,
|
||||
.bs_w_2 = becc_pci_bs_w_2,
|
||||
.bs_w_4 = becc_pci_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_notimpl_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = bs_notimpl_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: i80312_space.c,v 1.11 2011/07/01 20:32:51 dyoung Exp $ */
|
||||
/* $NetBSD: i80312_space.c,v 1.12 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: i80312_space.c,v 1.11 2011/07/01 20:32:51 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: i80312_space.c,v 1.12 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -66,79 +66,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
const struct bus_space i80312_bs_tag_template = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
NULL,
|
||||
NULL,
|
||||
i80312_bs_subregion,
|
||||
.bs_map = NULL,
|
||||
.bs_unmap = NULL,
|
||||
.bs_subregion = i80312_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
NULL,
|
||||
NULL,
|
||||
.bs_alloc = NULL,
|
||||
.bs_free = NULL,
|
||||
|
||||
/* get kernel virtual address */
|
||||
i80312_bs_vaddr,
|
||||
.bs_vaddr = i80312_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
i80312_bs_mmap,
|
||||
.bs_mmap = i80312_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
i80312_bs_barrier,
|
||||
.bs_barrier = i80312_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: i80321_space.c,v 1.14 2014/03/02 13:23:16 joerg Exp $ */
|
||||
/* $NetBSD: i80321_space.c,v 1.15 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: i80321_space.c,v 1.14 2014/03/02 13:23:16 joerg Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: i80321_space.c,v 1.15 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -68,79 +68,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
const struct bus_space i80321_bs_tag_template = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
NULL,
|
||||
NULL,
|
||||
i80321_bs_subregion,
|
||||
.bs_map = NULL,
|
||||
.bs_unmap = NULL,
|
||||
.bs_subregion = i80321_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
NULL,
|
||||
NULL,
|
||||
.bs_alloc = NULL,
|
||||
.bs_free = NULL,
|
||||
|
||||
/* get kernel virtual address */
|
||||
i80321_bs_vaddr,
|
||||
.bs_vaddr = i80321_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
i80321_bs_mmap,
|
||||
.bs_mmap = i80321_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
i80321_bs_barrier,
|
||||
.bs_barrier = i80321_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ixp425_a4x_space.c,v 1.3 2011/07/01 20:32:51 dyoung Exp $ */
|
||||
/* $NetBSD: ixp425_a4x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -43,7 +43,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp425_a4x_space.c,v 1.3 2011/07/01 20:32:51 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp425_a4x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,77 +61,77 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space ixp425_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
ixp425_bs_map,
|
||||
ixp425_bs_unmap,
|
||||
ixp425_bs_subregion,
|
||||
.bs_map = ixp425_bs_map,
|
||||
.bs_unmap = ixp425_bs_unmap,
|
||||
.bs_subregion = ixp425_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
ixp425_bs_alloc, /* not implemented */
|
||||
ixp425_bs_free, /* not implemented */
|
||||
.bs_alloc = ixp425_bs_alloc, /* not implemented */
|
||||
.bs_free = ixp425_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
ixp425_bs_vaddr,
|
||||
.bs_vaddr = ixp425_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ixp425_bs_barrier,
|
||||
.bs_barrier = ixp425_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
a4x_bs_r_2,
|
||||
a4x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = a4x_bs_r_2,
|
||||
.bs_r_4 = a4x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
a4x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = a4x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
a4x_bs_w_2,
|
||||
a4x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = a4x_bs_w_2,
|
||||
.bs_w_4 = a4x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
a4x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = a4x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ixp425_pci_space.c,v 1.13 2014/02/24 10:50:40 martin Exp $ */
|
||||
/* $NetBSD: ixp425_pci_space.c,v 1.14 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2003
|
||||
|
|
@ -28,7 +28,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp425_pci_space.c,v 1.13 2014/02/24 10:50:40 martin Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp425_pci_space.c,v 1.14 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
/*
|
||||
* bus_space PCI functions for ixp425
|
||||
|
|
@ -72,79 +72,79 @@ void _pci_io_bs_w_4(void *, bus_space_handle_t, bus_size_t, uint32_t);
|
|||
|
||||
struct bus_space ixp425_pci_bs_tag_template = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
NULL,
|
||||
NULL,
|
||||
ixp425_pci_bs_subregion,
|
||||
.bs_map = NULL,
|
||||
.bs_unmap = NULL,
|
||||
.bs_subregion = ixp425_pci_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
NULL,
|
||||
NULL,
|
||||
.bs_alloc = NULL,
|
||||
.bs_free = NULL,
|
||||
|
||||
/* get kernel virtual address */
|
||||
NULL,
|
||||
.bs_vaddr = NULL,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
ixp425_pci_bs_mmap,
|
||||
.bs_mmap = ixp425_pci_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ixp425_pci_bs_barrier,
|
||||
.bs_barrier = ixp425_pci_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
bs_notimpl_bs_r_1,
|
||||
bs_notimpl_bs_r_2,
|
||||
bs_notimpl_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = bs_notimpl_bs_r_1,
|
||||
.bs_r_2 = bs_notimpl_bs_r_2,
|
||||
.bs_r_4 = bs_notimpl_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
bs_notimpl_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = bs_notimpl_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
bs_notimpl_bs_w_1,
|
||||
bs_notimpl_bs_w_2,
|
||||
bs_notimpl_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = bs_notimpl_bs_w_1,
|
||||
.bs_w_2 = bs_notimpl_bs_w_2,
|
||||
.bs_w_4 = bs_notimpl_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
bs_notimpl_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = bs_notimpl_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ixp425_space.c,v 1.8 2011/07/01 20:32:51 dyoung Exp $ */
|
||||
/* $NetBSD: ixp425_space.c,v 1.9 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2003
|
||||
|
|
@ -28,7 +28,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp425_space.c,v 1.8 2011/07/01 20:32:51 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ixp425_space.c,v 1.9 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
/*
|
||||
* bus_space I/O functions for ixp425
|
||||
|
|
@ -53,79 +53,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space ixp425_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
ixp425_bs_map,
|
||||
ixp425_bs_unmap,
|
||||
ixp425_bs_subregion,
|
||||
.bs_map = ixp425_bs_map,
|
||||
.bs_unmap = ixp425_bs_unmap,
|
||||
.bs_subregion = ixp425_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
ixp425_bs_alloc,
|
||||
ixp425_bs_free,
|
||||
.bs_alloc = ixp425_bs_alloc,
|
||||
.bs_free = ixp425_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
ixp425_bs_vaddr,
|
||||
.bs_vaddr = ixp425_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
ixp425_bs_mmap,
|
||||
.bs_mmap = ixp425_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ixp425_bs_barrier,
|
||||
.bs_barrier = ixp425_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
generic_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = generic_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pxa2x0_a4x_space.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $ */
|
||||
/* $NetBSD: pxa2x0_a4x_space.c,v 1.6 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002 Genetec Corporation. All rights reserved.
|
||||
|
|
@ -39,7 +39,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: pxa2x0_a4x_space.c,v 1.5 2011/07/01 20:32:51 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: pxa2x0_a4x_space.c,v 1.6 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -57,77 +57,77 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space pxa2x0_a4x_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
pxa2x0_bs_map,
|
||||
pxa2x0_bs_unmap,
|
||||
pxa2x0_bs_subregion,
|
||||
.bs_map = pxa2x0_bs_map,
|
||||
.bs_unmap = pxa2x0_bs_unmap,
|
||||
.bs_subregion = pxa2x0_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
pxa2x0_bs_alloc, /* not implemented */
|
||||
pxa2x0_bs_free, /* not implemented */
|
||||
.bs_alloc = pxa2x0_bs_alloc, /* not implemented */
|
||||
.bs_free = pxa2x0_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
pxa2x0_bs_vaddr,
|
||||
.bs_vaddr = pxa2x0_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
pxa2x0_bs_barrier,
|
||||
.bs_barrier = pxa2x0_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
a4x_bs_r_2,
|
||||
a4x_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = a4x_bs_r_2,
|
||||
.bs_r_4 = a4x_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
a4x_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = a4x_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
a4x_bs_w_2,
|
||||
a4x_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = a4x_bs_w_2,
|
||||
.bs_w_4 = a4x_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
a4x_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = a4x_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: pxa2x0_space.c,v 1.12 2014/02/24 00:32:17 msaitoh Exp $ */
|
||||
/* $NetBSD: pxa2x0_space.c,v 1.13 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002 Wasabi Systems, Inc.
|
||||
|
|
@ -76,7 +76,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: pxa2x0_space.c,v 1.12 2014/02/24 00:32:17 msaitoh Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: pxa2x0_space.c,v 1.13 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -93,79 +93,79 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space pxa2x0_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
pxa2x0_bs_map,
|
||||
pxa2x0_bs_unmap,
|
||||
pxa2x0_bs_subregion,
|
||||
.bs_map = pxa2x0_bs_map,
|
||||
.bs_unmap = pxa2x0_bs_unmap,
|
||||
.bs_subregion = pxa2x0_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
pxa2x0_bs_alloc, /* not implemented */
|
||||
pxa2x0_bs_free, /* not implemented */
|
||||
.bs_alloc = pxa2x0_bs_alloc, /* not implemented */
|
||||
.bs_free = pxa2x0_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
pxa2x0_bs_vaddr,
|
||||
.bs_vaddr = pxa2x0_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
pxa2x0_bs_barrier,
|
||||
.bs_barrier = pxa2x0_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: zynq_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $ */
|
||||
/* $NetBSD: zynq_space.c,v 1.3 2018/03/16 17:56:32 ryo Exp $ */
|
||||
/*-
|
||||
* Copyright (c) 2012 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
|
|
@ -29,7 +29,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: zynq_space.c,v 1.2 2015/02/25 13:52:42 joerg Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: zynq_space.c,v 1.3 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -46,116 +46,116 @@ bs_protos(bs_notimpl);
|
|||
|
||||
struct bus_space zynq_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
zynq_bs_map,
|
||||
zynq_bs_unmap,
|
||||
zynq_bs_subregion,
|
||||
.bs_map = zynq_bs_map,
|
||||
.bs_unmap = zynq_bs_unmap,
|
||||
.bs_subregion = zynq_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
zynq_bs_alloc, /* not implemented */
|
||||
zynq_bs_free, /* not implemented */
|
||||
.bs_alloc = zynq_bs_alloc, /* not implemented */
|
||||
.bs_free = zynq_bs_free, /* not implemented */
|
||||
|
||||
/* get kernel virtual address */
|
||||
zynq_bs_vaddr,
|
||||
.bs_vaddr = zynq_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
zynq_bs_barrier,
|
||||
.bs_barrier = zynq_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = generic_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
generic_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = generic_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = generic_bs_r_1,
|
||||
.bs_r_2_s = generic_armv4_bs_r_2,
|
||||
.bs_r_4_s = generic_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = generic_bs_rm_1,
|
||||
.bs_rm_2_s = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4_s = generic_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = generic_bs_rr_1,
|
||||
.bs_rr_2_s = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4_s = generic_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = generic_bs_w_1,
|
||||
.bs_w_2_s = generic_armv4_bs_w_2,
|
||||
.bs_w_4_s = generic_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = generic_bs_wm_1,
|
||||
.bs_wm_2_s = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4_s = generic_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
generic_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = generic_bs_wr_1,
|
||||
.bs_wr_2_s = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4_s = generic_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
#endif
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: external_io.c,v 1.2 2013/06/22 13:32:54 kiyohara Exp $ */
|
||||
/* $NetBSD: external_io.c,v 1.3 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Mark Brinicombe.
|
||||
|
|
@ -37,7 +37,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: external_io.c,v 1.2 2013/06/22 13:32:54 kiyohara Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: external_io.c,v 1.3 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -52,79 +52,79 @@ bs_protos(mainbus);
|
|||
/* Declare the external bus space tag */
|
||||
struct bus_space external_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0, /* Shift to apply to registers */
|
||||
.bs_cookie = (void *) 0, /* Shift to apply to registers */
|
||||
|
||||
/* mapping/unmapping */
|
||||
mainbus_bs_map,
|
||||
mainbus_bs_unmap,
|
||||
external_bs_subregion,
|
||||
.bs_map = mainbus_bs_map,
|
||||
.bs_unmap = mainbus_bs_unmap,
|
||||
.bs_subregion = external_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
mainbus_bs_alloc,
|
||||
mainbus_bs_free,
|
||||
.bs_alloc = mainbus_bs_alloc,
|
||||
.bs_free = mainbus_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
0, /* there is no linear mapping */
|
||||
.bs_vaddr = 0, /* there is no linear mapping */
|
||||
|
||||
/* mmap bus space for userland */
|
||||
mainbus_bs_mmap,
|
||||
.bs_mmap = mainbus_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
mainbus_bs_barrier,
|
||||
.bs_barrier = mainbus_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
external_bs_r_1,
|
||||
bs_notimpl_bs_r_2,
|
||||
external_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = external_bs_r_1,
|
||||
.bs_r_2 = bs_notimpl_bs_r_2,
|
||||
.bs_r_4 = external_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
external_bs_rm_1,
|
||||
external_bs_rm_2,
|
||||
external_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = external_bs_rm_1,
|
||||
.bs_rm_2 = external_bs_rm_2,
|
||||
.bs_rm_4 = external_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
external_bs_rr_1,
|
||||
external_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = external_bs_rr_1,
|
||||
.bs_rr_2 = external_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
external_bs_w_1,
|
||||
bs_notimpl_bs_w_2,
|
||||
external_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = external_bs_w_1,
|
||||
.bs_w_2 = bs_notimpl_bs_w_2,
|
||||
.bs_w_4 = external_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
external_bs_wm_1,
|
||||
external_bs_wm_2,
|
||||
external_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = external_bs_wm_1,
|
||||
.bs_wm_2 = external_bs_wm_2,
|
||||
.bs_wm_4 = external_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
external_bs_wr_1,
|
||||
external_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = external_bs_wr_1,
|
||||
.bs_wr_2 = external_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
external_bs_sr_1,
|
||||
external_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = external_bs_sr_1,
|
||||
.bs_sr_2 = external_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: obio_space.c,v 1.8 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: obio_space.c,v 1.9 2018/03/16 17:56:32 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.8 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.9 2018/03/16 17:56:32 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,79 +61,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space obio_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
obio_bs_map,
|
||||
obio_bs_unmap,
|
||||
obio_bs_subregion,
|
||||
.bs_map = obio_bs_map,
|
||||
.bs_unmap = obio_bs_unmap,
|
||||
.bs_subregion = obio_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
obio_bs_alloc,
|
||||
obio_bs_free,
|
||||
.bs_alloc = obio_bs_alloc,
|
||||
.bs_free = obio_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
obio_bs_vaddr,
|
||||
.bs_vaddr = obio_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
obio_bs_barrier,
|
||||
.bs_barrier = obio_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: obio_space.c,v 1.4 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: obio_space.c,v 1.5 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.4 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.5 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,79 +61,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space obio_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
obio_bs_map,
|
||||
obio_bs_unmap,
|
||||
obio_bs_subregion,
|
||||
.bs_map = obio_bs_map,
|
||||
.bs_unmap = obio_bs_unmap,
|
||||
.bs_subregion = obio_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
obio_bs_alloc,
|
||||
obio_bs_free,
|
||||
.bs_alloc = obio_bs_alloc,
|
||||
.bs_free = obio_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
obio_bs_vaddr,
|
||||
.bs_vaddr = obio_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
obio_bs_barrier,
|
||||
.bs_barrier = obio_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: ifpga_io.c,v 1.12 2013/02/19 10:57:10 skrll Exp $ */
|
||||
/* $NetBSD: ifpga_io.c,v 1.13 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 1997 Causality Limited
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v 1.12 2013/02/19 10:57:10 skrll Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: ifpga_io.c,v 1.13 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -64,158 +64,158 @@ bs_unmap_proto(ifpga_mem);
|
|||
|
||||
struct bus_space ifpga_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0, /* Physical base address */
|
||||
.bs_cookie = (void *) 0, /* Physical base address */
|
||||
|
||||
/* mapping/unmapping */
|
||||
ifpga_bs_map,
|
||||
ifpga_bs_unmap,
|
||||
ifpga_bs_subregion,
|
||||
.bs_map = ifpga_bs_map,
|
||||
.bs_unmap = ifpga_bs_unmap,
|
||||
.bs_subregion = ifpga_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
ifpga_bs_alloc,
|
||||
ifpga_bs_free,
|
||||
.bs_alloc = ifpga_bs_alloc,
|
||||
.bs_free = ifpga_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
ifpga_bs_vaddr,
|
||||
.bs_vaddr = ifpga_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ifpga_bs_barrier,
|
||||
.bs_barrier = ifpga_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* This is a preinitialized version of ifpga_bs_tag */
|
||||
|
||||
struct bus_space ifpga_common_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) IFPGA_IO_BASE, /* Physical base address */
|
||||
.bs_cookie = (void *) IFPGA_IO_BASE, /* Physical base address */
|
||||
|
||||
/* mapping/unmapping */
|
||||
ifpga_mem_bs_map,
|
||||
ifpga_mem_bs_unmap,
|
||||
ifpga_bs_subregion,
|
||||
.bs_map = ifpga_mem_bs_map,
|
||||
.bs_unmap = ifpga_mem_bs_unmap,
|
||||
.bs_subregion = ifpga_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
ifpga_bs_alloc,
|
||||
ifpga_bs_free,
|
||||
.bs_alloc = ifpga_bs_alloc,
|
||||
.bs_free = ifpga_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
ifpga_bs_vaddr,
|
||||
.bs_vaddr = ifpga_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
ifpga_bs_barrier,
|
||||
.bs_barrier = ifpga_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
generic_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = generic_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
generic_armv4_bs_rr_2,
|
||||
generic_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = generic_armv4_bs_rr_2,
|
||||
.bs_rr_4 = generic_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
generic_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = generic_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
generic_armv4_bs_wr_2,
|
||||
generic_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = generic_armv4_bs_wr_2,
|
||||
.bs_wr_4 = generic_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
generic_armv4_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = generic_armv4_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
generic_armv4_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = generic_armv4_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: obio_space.c,v 1.15 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: obio_space.c,v 1.16 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.15 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.16 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -60,79 +60,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space obio_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
obio_bs_map,
|
||||
obio_bs_unmap,
|
||||
obio_bs_subregion,
|
||||
.bs_map = obio_bs_map,
|
||||
.bs_unmap = obio_bs_unmap,
|
||||
.bs_subregion = obio_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
obio_bs_alloc,
|
||||
obio_bs_free,
|
||||
.bs_alloc = obio_bs_alloc,
|
||||
.bs_free = obio_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
obio_bs_vaddr,
|
||||
.bs_vaddr = obio_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
obio_bs_barrier,
|
||||
.bs_barrier = obio_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
bs_notimpl_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = bs_notimpl_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
bs_notimpl_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = bs_notimpl_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: obio_space.c,v 1.12 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: obio_space.c,v 1.13 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.12 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.13 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,79 +61,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space obio_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
obio_bs_map,
|
||||
obio_bs_unmap,
|
||||
obio_bs_subregion,
|
||||
.bs_map = obio_bs_map,
|
||||
.bs_unmap = obio_bs_unmap,
|
||||
.bs_subregion = obio_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
obio_bs_alloc,
|
||||
obio_bs_free,
|
||||
.bs_alloc = obio_bs_alloc,
|
||||
.bs_free = obio_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
obio_bs_vaddr,
|
||||
.bs_vaddr = obio_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
obio_bs_barrier,
|
||||
.bs_barrier = obio_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
generic_armv4_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = generic_armv4_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
generic_armv4_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = generic_armv4_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: sm_obio_space.c,v 1.4 2011/07/01 20:42:37 dyoung Exp $ */
|
||||
/* $NetBSD: sm_obio_space.c,v 1.5 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2002, 2003 Genetec Corporation. All rights reserved.
|
||||
|
|
@ -34,7 +34,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: sm_obio_space.c,v 1.4 2011/07/01 20:42:37 dyoung Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: sm_obio_space.c,v 1.5 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -57,79 +57,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space smobio8_bs_tag = {
|
||||
/* cookie */
|
||||
NULL,
|
||||
.bs_cookie = NULL,
|
||||
|
||||
/* mapping/unmapping */
|
||||
pxa2x0_bs_map,
|
||||
pxa2x0_bs_unmap,
|
||||
pxa2x0_bs_subregion,
|
||||
.bs_map = pxa2x0_bs_map,
|
||||
.bs_unmap = pxa2x0_bs_unmap,
|
||||
.bs_subregion = pxa2x0_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
pxa2x0_bs_alloc,
|
||||
pxa2x0_bs_free,
|
||||
.bs_alloc = pxa2x0_bs_alloc,
|
||||
.bs_free = pxa2x0_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
pxa2x0_bs_vaddr,
|
||||
.bs_vaddr = pxa2x0_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
pxa2x0_bs_barrier,
|
||||
.bs_barrier = pxa2x0_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
a4x_bs_r_1,
|
||||
smobio8_bs_r_2,
|
||||
bs_notimpl_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = a4x_bs_r_1,
|
||||
.bs_r_2 = smobio8_bs_r_2,
|
||||
.bs_r_4 = bs_notimpl_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
a4x_bs_rm_1,
|
||||
smobio8_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = a4x_bs_rm_1,
|
||||
.bs_rm_2 = smobio8_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
bs_notimpl_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = bs_notimpl_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
a4x_bs_w_1,
|
||||
smobio8_bs_w_2,
|
||||
bs_notimpl_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = a4x_bs_w_1,
|
||||
.bs_w_2 = smobio8_bs_w_2,
|
||||
.bs_w_4 = bs_notimpl_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
a4x_bs_wm_1,
|
||||
smobio8_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = a4x_bs_wm_1,
|
||||
.bs_wm_2 = smobio8_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: isa_io.c,v 1.11 2014/09/13 18:08:39 matt Exp $ */
|
||||
/* $NetBSD: isa_io.c,v 1.12 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: isa_io.c,v 1.11 2014/09/13 18:08:39 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: isa_io.c,v 1.12 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -66,79 +66,79 @@ void isa_bs_mallocok(void);
|
|||
*/
|
||||
struct bus_space isa_io_bs_tag = {
|
||||
/* cookie */
|
||||
NULL, /* initialized below */
|
||||
.bs_cookie = NULL, /* initialized below */
|
||||
|
||||
/* mapping/unmapping */
|
||||
isa_bs_map,
|
||||
isa_bs_unmap,
|
||||
isa_bs_subregion,
|
||||
.bs_map = isa_bs_map,
|
||||
.bs_unmap = isa_bs_unmap,
|
||||
.bs_subregion = isa_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
isa_bs_alloc,
|
||||
isa_bs_free,
|
||||
.bs_alloc = isa_bs_alloc,
|
||||
.bs_free = isa_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
isa_bs_vaddr,
|
||||
.bs_vaddr = isa_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap, /* XXX possible even? XXX */
|
||||
.bs_mmap = bs_notimpl_bs_mmap, /* XXX possible even? XXX */
|
||||
|
||||
/* barrier */
|
||||
isa_bs_barrier,
|
||||
.bs_barrier = isa_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = isa_bs_r_1,
|
||||
.bs_r_2 = isa_bs_r_2,
|
||||
.bs_r_4 = isa_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = isa_bs_rm_1,
|
||||
.bs_rm_2 = isa_bs_rm_2,
|
||||
.bs_rm_4 = isa_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = isa_bs_rr_1,
|
||||
.bs_rr_2 = isa_bs_rr_2,
|
||||
.bs_rr_4 = isa_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = isa_bs_w_1,
|
||||
.bs_w_2 = isa_bs_w_2,
|
||||
.bs_w_4 = isa_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = isa_bs_wm_1,
|
||||
.bs_wm_2 = isa_bs_wm_2,
|
||||
.bs_wm_4 = isa_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = isa_bs_wr_1,
|
||||
.bs_wr_2 = isa_bs_wr_2,
|
||||
.bs_wr_4 = isa_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
isa_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = isa_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -147,79 +147,79 @@ struct bus_space isa_io_bs_tag = {
|
|||
*/
|
||||
struct bus_space isa_mem_bs_tag = {
|
||||
/* cookie */
|
||||
NULL, /* initialized below */
|
||||
.bs_cookie = NULL, /* initialized below */
|
||||
|
||||
/* mapping/unmapping */
|
||||
isa_bs_map,
|
||||
isa_bs_unmap,
|
||||
isa_bs_subregion,
|
||||
.bs_map = isa_bs_map,
|
||||
.bs_unmap = isa_bs_unmap,
|
||||
.bs_subregion = isa_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
isa_bs_alloc,
|
||||
isa_bs_free,
|
||||
.bs_alloc = isa_bs_alloc,
|
||||
.bs_free = isa_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
isa_bs_vaddr,
|
||||
.bs_vaddr = isa_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
bs_notimpl_bs_mmap, /* XXX open for now ... XXX */
|
||||
.bs_mmap = bs_notimpl_bs_mmap, /* XXX open for now ... XXX */
|
||||
|
||||
/* barrier */
|
||||
isa_bs_barrier,
|
||||
.bs_barrier = isa_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = isa_bs_r_1,
|
||||
.bs_r_2 = isa_bs_r_2,
|
||||
.bs_r_4 = isa_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = isa_bs_rm_1,
|
||||
.bs_rm_2 = isa_bs_rm_2,
|
||||
.bs_rm_4 = isa_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = isa_bs_rr_1,
|
||||
.bs_rr_2 = isa_bs_rr_2,
|
||||
.bs_rr_4 = isa_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = isa_bs_w_1,
|
||||
.bs_w_2 = isa_bs_w_2,
|
||||
.bs_w_4 = isa_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = isa_bs_wm_1,
|
||||
.bs_wm_2 = isa_bs_wm_2,
|
||||
.bs_wm_4 = isa_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = isa_bs_wr_1,
|
||||
.bs_wr_2 = isa_bs_wr_2,
|
||||
.bs_wr_4 = isa_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
isa_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = isa_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
static long isaio_ex_storage[EXTENT_FIXED_STORAGE_SIZE(8) / sizeof(long)];
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: obio_space.c,v 1.6 2014/02/22 20:33:00 matt Exp $ */
|
||||
/* $NetBSD: obio_space.c,v 1.7 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright (c) 2001, 2002, 2003 Wasabi Systems, Inc.
|
||||
|
|
@ -40,7 +40,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.6 2014/02/22 20:33:00 matt Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: obio_space.c,v 1.7 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -61,79 +61,79 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space obio_bs_tag = {
|
||||
/* cookie */
|
||||
(void *) 0,
|
||||
.bs_cookie = (void *) 0,
|
||||
|
||||
/* mapping/unmapping */
|
||||
obio_bs_map,
|
||||
obio_bs_unmap,
|
||||
obio_bs_subregion,
|
||||
.bs_map = obio_bs_map,
|
||||
.bs_unmap = obio_bs_unmap,
|
||||
.bs_subregion = obio_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
obio_bs_alloc,
|
||||
obio_bs_free,
|
||||
.bs_alloc = obio_bs_alloc,
|
||||
.bs_free = obio_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
obio_bs_vaddr,
|
||||
.bs_vaddr = obio_bs_vaddr,
|
||||
|
||||
/* mmap */
|
||||
bs_notimpl_bs_mmap,
|
||||
.bs_mmap = bs_notimpl_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
obio_bs_barrier,
|
||||
.bs_barrier = obio_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
generic_bs_r_1,
|
||||
generic_armv4_bs_r_2,
|
||||
generic_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = generic_bs_r_1,
|
||||
.bs_r_2 = generic_armv4_bs_r_2,
|
||||
.bs_r_4 = generic_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
generic_bs_rm_1,
|
||||
bs_notimpl_bs_rm_2,
|
||||
bs_notimpl_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = generic_bs_rm_1,
|
||||
.bs_rm_2 = bs_notimpl_bs_rm_2,
|
||||
.bs_rm_4 = bs_notimpl_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
generic_bs_rr_1,
|
||||
bs_notimpl_bs_rr_2,
|
||||
bs_notimpl_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = generic_bs_rr_1,
|
||||
.bs_rr_2 = bs_notimpl_bs_rr_2,
|
||||
.bs_rr_4 = bs_notimpl_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
generic_bs_w_1,
|
||||
generic_armv4_bs_w_2,
|
||||
generic_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = generic_bs_w_1,
|
||||
.bs_w_2 = generic_armv4_bs_w_2,
|
||||
.bs_w_4 = generic_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
generic_bs_wm_1,
|
||||
bs_notimpl_bs_wm_2,
|
||||
bs_notimpl_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = generic_bs_wm_1,
|
||||
.bs_wm_2 = bs_notimpl_bs_wm_2,
|
||||
.bs_wm_4 = bs_notimpl_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
bs_notimpl_bs_wr_1,
|
||||
bs_notimpl_bs_wr_2,
|
||||
bs_notimpl_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = bs_notimpl_bs_wr_1,
|
||||
.bs_wr_2 = bs_notimpl_bs_wr_2,
|
||||
.bs_wr_4 = bs_notimpl_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
bs_notimpl_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = bs_notimpl_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
bs_notimpl_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = bs_notimpl_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
};
|
||||
|
||||
int
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
/* $NetBSD: isa_io.c,v 1.14 2016/08/26 22:19:48 macallan Exp $ */
|
||||
/* $NetBSD: isa_io.c,v 1.15 2018/03/16 17:56:33 ryo Exp $ */
|
||||
|
||||
/*
|
||||
* Copyright 1997
|
||||
|
|
@ -38,7 +38,7 @@
|
|||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: isa_io.c,v 1.14 2016/08/26 22:19:48 macallan Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: isa_io.c,v 1.15 2018/03/16 17:56:33 ryo Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
|
|
@ -78,116 +78,116 @@ bs_protos(bs_notimpl);
|
|||
*/
|
||||
struct bus_space isa_io_bs_tag = {
|
||||
/* cookie */
|
||||
NULL, /* initialized below */
|
||||
.bs_cookie = NULL, /* initialized below */
|
||||
|
||||
/* mapping/unmapping */
|
||||
isa_bs_map,
|
||||
isa_bs_unmap,
|
||||
isa_bs_subregion,
|
||||
.bs_map = isa_bs_map,
|
||||
.bs_unmap = isa_bs_unmap,
|
||||
.bs_subregion = isa_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
isa_bs_alloc,
|
||||
isa_bs_free,
|
||||
.bs_alloc = isa_bs_alloc,
|
||||
.bs_free = isa_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
isa_bs_vaddr,
|
||||
.bs_vaddr = isa_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
isa_bs_mmap,
|
||||
.bs_mmap = isa_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
isa_bs_barrier,
|
||||
.bs_barrier = isa_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = isa_bs_r_1,
|
||||
.bs_r_2 = isa_bs_r_2,
|
||||
.bs_r_4 = isa_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = isa_bs_rm_1,
|
||||
.bs_rm_2 = isa_bs_rm_2,
|
||||
.bs_rm_4 = isa_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = isa_bs_rr_1,
|
||||
.bs_rr_2 = isa_bs_rr_2,
|
||||
.bs_rr_4 = isa_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = isa_bs_w_1,
|
||||
.bs_w_2 = isa_bs_w_2,
|
||||
.bs_w_4 = isa_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = isa_bs_wm_1,
|
||||
.bs_wm_2 = isa_bs_wm_2,
|
||||
.bs_wm_4 = isa_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = isa_bs_wr_1,
|
||||
.bs_wr_2 = isa_bs_wr_2,
|
||||
.bs_wr_4 = isa_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
isa_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = isa_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
isa_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = isa_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
/* stream methods are identical to regular read/write here */
|
||||
/* read stream single */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = isa_bs_r_1,
|
||||
.bs_r_2_s = isa_bs_r_2,
|
||||
.bs_r_4_s = isa_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read stream multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = isa_bs_rm_1,
|
||||
.bs_rm_2_s = isa_bs_rm_2,
|
||||
.bs_rm_4_s = isa_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region stream */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = isa_bs_rr_1,
|
||||
.bs_rr_2_s = isa_bs_rr_2,
|
||||
.bs_rr_4_s = isa_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write stream single */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = isa_bs_w_1,
|
||||
.bs_w_2_s = isa_bs_w_2,
|
||||
.bs_w_4_s = isa_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write stream multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = isa_bs_wm_1,
|
||||
.bs_wm_2_s = isa_bs_wm_2,
|
||||
.bs_wm_4_s = isa_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region stream */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = isa_bs_wr_1,
|
||||
.bs_wr_2_s = isa_bs_wr_2,
|
||||
.bs_wr_4_s = isa_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
|
||||
};
|
||||
|
||||
|
|
@ -197,116 +197,116 @@ struct bus_space isa_io_bs_tag = {
|
|||
*/
|
||||
struct bus_space isa_mem_bs_tag = {
|
||||
/* cookie */
|
||||
NULL, /* initialized below */
|
||||
.bs_cookie = NULL, /* initialized below */
|
||||
|
||||
/* mapping/unmapping */
|
||||
isa_bs_map,
|
||||
isa_bs_unmap,
|
||||
isa_bs_subregion,
|
||||
.bs_map = isa_bs_map,
|
||||
.bs_unmap = isa_bs_unmap,
|
||||
.bs_subregion = isa_bs_subregion,
|
||||
|
||||
/* allocation/deallocation */
|
||||
isa_bs_alloc,
|
||||
isa_bs_free,
|
||||
.bs_alloc = isa_bs_alloc,
|
||||
.bs_free = isa_bs_free,
|
||||
|
||||
/* get kernel virtual address */
|
||||
isa_bs_vaddr,
|
||||
.bs_vaddr = isa_bs_vaddr,
|
||||
|
||||
/* mmap bus space for userland */
|
||||
isa_bs_mmap,
|
||||
.bs_mmap = isa_bs_mmap,
|
||||
|
||||
/* barrier */
|
||||
isa_bs_barrier,
|
||||
.bs_barrier = isa_bs_barrier,
|
||||
|
||||
/* read (single) */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1 = isa_bs_r_1,
|
||||
.bs_r_2 = isa_bs_r_2,
|
||||
.bs_r_4 = isa_bs_r_4,
|
||||
.bs_r_8 = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1 = isa_bs_rm_1,
|
||||
.bs_rm_2 = isa_bs_rm_2,
|
||||
.bs_rm_4 = isa_bs_rm_4,
|
||||
.bs_rm_8 = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1 = isa_bs_rr_1,
|
||||
.bs_rr_2 = isa_bs_rr_2,
|
||||
.bs_rr_4 = isa_bs_rr_4,
|
||||
.bs_rr_8 = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write (single) */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1 = isa_bs_w_1,
|
||||
.bs_w_2 = isa_bs_w_2,
|
||||
.bs_w_4 = isa_bs_w_4,
|
||||
.bs_w_8 = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1 = isa_bs_wm_1,
|
||||
.bs_wm_2 = isa_bs_wm_2,
|
||||
.bs_wm_4 = isa_bs_wm_4,
|
||||
.bs_wm_8 = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1 = isa_bs_wr_1,
|
||||
.bs_wr_2 = isa_bs_wr_2,
|
||||
.bs_wr_4 = isa_bs_wr_4,
|
||||
.bs_wr_8 = bs_notimpl_bs_wr_8,
|
||||
|
||||
/* set multiple */
|
||||
bs_notimpl_bs_sm_1,
|
||||
bs_notimpl_bs_sm_2,
|
||||
bs_notimpl_bs_sm_4,
|
||||
bs_notimpl_bs_sm_8,
|
||||
.bs_sm_1 = bs_notimpl_bs_sm_1,
|
||||
.bs_sm_2 = bs_notimpl_bs_sm_2,
|
||||
.bs_sm_4 = bs_notimpl_bs_sm_4,
|
||||
.bs_sm_8 = bs_notimpl_bs_sm_8,
|
||||
|
||||
/* set region */
|
||||
bs_notimpl_bs_sr_1,
|
||||
isa_bs_sr_2,
|
||||
bs_notimpl_bs_sr_4,
|
||||
bs_notimpl_bs_sr_8,
|
||||
.bs_sr_1 = bs_notimpl_bs_sr_1,
|
||||
.bs_sr_2 = isa_bs_sr_2,
|
||||
.bs_sr_4 = bs_notimpl_bs_sr_4,
|
||||
.bs_sr_8 = bs_notimpl_bs_sr_8,
|
||||
|
||||
/* copy */
|
||||
bs_notimpl_bs_c_1,
|
||||
isa_bs_c_2,
|
||||
bs_notimpl_bs_c_4,
|
||||
bs_notimpl_bs_c_8,
|
||||
.bs_c_1 = bs_notimpl_bs_c_1,
|
||||
.bs_c_2 = isa_bs_c_2,
|
||||
.bs_c_4 = bs_notimpl_bs_c_4,
|
||||
.bs_c_8 = bs_notimpl_bs_c_8,
|
||||
|
||||
/* stream methods are identical to regular read/write here */
|
||||
/* read stream single */
|
||||
isa_bs_r_1,
|
||||
isa_bs_r_2,
|
||||
isa_bs_r_4,
|
||||
bs_notimpl_bs_r_8,
|
||||
.bs_r_1_s = isa_bs_r_1,
|
||||
.bs_r_2_s = isa_bs_r_2,
|
||||
.bs_r_4_s = isa_bs_r_4,
|
||||
.bs_r_8_s = bs_notimpl_bs_r_8,
|
||||
|
||||
/* read stream multiple */
|
||||
isa_bs_rm_1,
|
||||
isa_bs_rm_2,
|
||||
isa_bs_rm_4,
|
||||
bs_notimpl_bs_rm_8,
|
||||
.bs_rm_1_s = isa_bs_rm_1,
|
||||
.bs_rm_2_s = isa_bs_rm_2,
|
||||
.bs_rm_4_s = isa_bs_rm_4,
|
||||
.bs_rm_8_s = bs_notimpl_bs_rm_8,
|
||||
|
||||
/* read region stream */
|
||||
isa_bs_rr_1,
|
||||
isa_bs_rr_2,
|
||||
isa_bs_rr_4,
|
||||
bs_notimpl_bs_rr_8,
|
||||
.bs_rr_1_s = isa_bs_rr_1,
|
||||
.bs_rr_2_s = isa_bs_rr_2,
|
||||
.bs_rr_4_s = isa_bs_rr_4,
|
||||
.bs_rr_8_s = bs_notimpl_bs_rr_8,
|
||||
|
||||
/* write stream single */
|
||||
isa_bs_w_1,
|
||||
isa_bs_w_2,
|
||||
isa_bs_w_4,
|
||||
bs_notimpl_bs_w_8,
|
||||
.bs_w_1_s = isa_bs_w_1,
|
||||
.bs_w_2_s = isa_bs_w_2,
|
||||
.bs_w_4_s = isa_bs_w_4,
|
||||
.bs_w_8_s = bs_notimpl_bs_w_8,
|
||||
|
||||
/* write stream multiple */
|
||||
isa_bs_wm_1,
|
||||
isa_bs_wm_2,
|
||||
isa_bs_wm_4,
|
||||
bs_notimpl_bs_wm_8,
|
||||
.bs_wm_1_s = isa_bs_wm_1,
|
||||
.bs_wm_2_s = isa_bs_wm_2,
|
||||
.bs_wm_4_s = isa_bs_wm_4,
|
||||
.bs_wm_8_s = bs_notimpl_bs_wm_8,
|
||||
|
||||
/* write region stream */
|
||||
isa_bs_wr_1,
|
||||
isa_bs_wr_2,
|
||||
isa_bs_wr_4,
|
||||
bs_notimpl_bs_wr_8,
|
||||
.bs_wr_1_s = isa_bs_wr_1,
|
||||
.bs_wr_2_s = isa_bs_wr_2,
|
||||
.bs_wr_4_s = isa_bs_wr_4,
|
||||
.bs_wr_8_s = bs_notimpl_bs_wr_8,
|
||||
};
|
||||
|
||||
/* bus space functions */
|
||||
|
|
|
|||
Loading…
Reference in New Issue