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Clean and flush the instruction and data caches prior to turning of the 

MMU in boot0().
This solves the problem of cache hits after the kernel has rebooted the
machine as even with the cache off hits will occur for data/instructions
already in the cache.
This commit is contained in:
mark 1997-02-23 04:05:19 +00:00
parent 045ff1df99
commit 4fbf5c86aa
1 changed files with 9 additions and 1 deletions
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10
sys/arch/arm32/arm32/locore.S
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@ -1,4 +1,4 @@
/* $NetBSD: locore.S,v 1.18 1997/02/10 03:50:55 mark Exp $ */
/* $NetBSD: locore.S,v 1.19 1997/02/23 04:05:19 mark Exp $ */
/*
* Copyright (C) 1994-1997 Mark Brinicombe
@ -210,6 +210,8 @@ Wfiq:
.word fiqmsg
.word _panic
Lcpufuncs:
.word _cpufuncs
.global _boot0
_boot0:
@ -219,6 +221,12 @@ _boot0:
orr r2, r2, #(I32_bit | F32_bit)
msr cpsr_all, r2
ldr r0, Lcpufuncs
add lr, pc, #Lboot_cache_purged - . - 8
ldr pc, [r0, #CF_CACHE_PURGE_ID]
Lboot_cache_purged:
/*
* MMU & IDC off, 32 bit program & data space
* Hurl ourselves into the ROM at 0x00000000