From 4f99746d579046028137f8d3ca436ee4bcf98635 Mon Sep 17 00:00:00 2001 From: sakamoto Date: Thu, 21 Jan 1999 12:00:25 +0000 Subject: [PATCH] Add NetBSD autoconfiguration support. KNF. --- sys/dev/pci/if_vr.c | 1081 +++++++++++++++++++++++++--------------- sys/dev/pci/if_vrreg.h | 727 ++++++++++++++------------- 2 files changed, 1066 insertions(+), 742 deletions(-) diff --git a/sys/dev/pci/if_vr.c b/sys/dev/pci/if_vr.c index 2dd59f1ad09e..05e5a3d4f8cd 100644 --- a/sys/dev/pci/if_vr.c +++ b/sys/dev/pci/if_vr.c @@ -1,3 +1,5 @@ +/* $Id: if_vr.c,v 1.2 1999/01/21 12:00:25 sakamoto Exp $ */ + /* * Copyright (c) 1997, 1998 * Bill Paul . All rights reserved. @@ -29,7 +31,7 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * - * $Id: if_vr.c,v 1.1.1.1 1999/01/21 11:55:22 sakamoto Exp $ + * $FreeBSD: if_vr.c,v 1.7 1999/01/10 18:51:49 wpaul Exp $ */ /* @@ -59,7 +61,9 @@ * transmission. */ -#include "bpfilter.h" +#if defined(__NetBSD__) +#include "opt_inet.h" +#endif #include #include @@ -71,33 +75,64 @@ #include #include -#include #include #include +#if defined(__FreeBSD__) +#include +#endif +#if defined(__NetBSD__) +#include +#if defined(INET) +#include +#include +#endif +#endif +#include "bpfilter.h" #if NBPFILTER > 0 #include #endif -#include /* for vtophys */ -#include /* for vtophys */ -#include /* for DELAY */ +#include /* for vtophys */ +#if defined(__FreeBSD__) +#include /* for vtophys */ +#endif + +#if defined(__FreeBSD__) +#include +#else +#include +#endif +#if defined(__FreeBSD__) #include #include +#endif #include +#if defined(__FreeBSD__) #include #include - -#define VR_USEIOSPACE - -/* #define VR_BACKGROUND_AUTONEG */ - #include +#endif -#ifndef lint +#if defined(__NetBSD__) +#include +#include +#include +#endif + +#define VR_USEIOSPACE + +/* #define VR_BACKGROUND_AUTONEG */ + +#if defined(__NetBSD__) +#define bootverbose 1 +#define ETHER_CRC_LEN 4 +#endif + +#if !defined(lint) && !defined(__NetBSD__) static const char rcsid[] = - "$Id: if_vr.c,v 1.1.1.1 1999/01/21 11:55:22 sakamoto Exp $"; + "$FreeBSD: if_vr.c,v 1.7 1999/01/10 18:51:49 wpaul Exp $"; #endif /* @@ -121,20 +156,16 @@ static struct vr_type vr_phys[] = { { TI_PHY_VENDORID, TI_PHY_10BT, "" }, { TI_PHY_VENDORID, TI_PHY_100VGPMI, "" }, { NS_PHY_VENDORID, NS_PHY_83840A, ""}, - { LEVEL1_PHY_VENDORID, LEVEL1_PHY_LXT970, "" }, + { LEVEL1_PHY_VENDORID, LEVEL1_PHY_LXT970, "" }, { INTEL_PHY_VENDORID, INTEL_PHY_82555, "" }, { SEEQ_PHY_VENDORID, SEEQ_PHY_80220, "" }, { 0, 0, "" } }; -static unsigned long vr_count = 0; -static const char *vr_probe __P((pcici_t, pcidi_t)); -static void vr_attach __P((pcici_t, int)); - static int vr_newbuf __P((struct vr_softc *, struct vr_chain_onefrag *)); static int vr_encap __P((struct vr_softc *, struct vr_chain *, - struct mbuf * )); + struct mbuf *)); static void vr_rxeof __P((struct vr_softc *)); static void vr_rxeoc __P((struct vr_softc *)); @@ -146,7 +177,6 @@ static int vr_ioctl __P((struct ifnet *, u_long, caddr_t)); static void vr_init __P((void *)); static void vr_stop __P((struct vr_softc *)); static void vr_watchdog __P((struct ifnet *)); -static void vr_shutdown __P((int, void *)); static int vr_ifmedia_upd __P((struct ifnet *)); static void vr_ifmedia_sts __P((struct ifnet *, struct ifmediareq *)); @@ -168,35 +198,35 @@ static void vr_reset __P((struct vr_softc *)); static int vr_list_rx_init __P((struct vr_softc *)); static int vr_list_tx_init __P((struct vr_softc *)); -#define VR_SETBIT(sc, reg, x) \ +#define VR_SETBIT(sc, reg, x) \ CSR_WRITE_1(sc, reg, \ CSR_READ_1(sc, reg) | x) -#define VR_CLRBIT(sc, reg, x) \ +#define VR_CLRBIT(sc, reg, x) \ CSR_WRITE_1(sc, reg, \ CSR_READ_1(sc, reg) & ~x) -#define VR_SETBIT16(sc, reg, x) \ +#define VR_SETBIT16(sc, reg, x) \ CSR_WRITE_2(sc, reg, \ CSR_READ_2(sc, reg) | x) -#define VR_CLRBIT16(sc, reg, x) \ +#define VR_CLRBIT16(sc, reg, x) \ CSR_WRITE_2(sc, reg, \ CSR_READ_2(sc, reg) & ~x) -#define VR_SETBIT32(sc, reg, x) \ +#define VR_SETBIT32(sc, reg, x) \ CSR_WRITE_4(sc, reg, \ CSR_READ_4(sc, reg) | x) -#define VR_CLRBIT32(sc, reg, x) \ +#define VR_CLRBIT32(sc, reg, x) \ CSR_WRITE_4(sc, reg, \ CSR_READ_4(sc, reg) & ~x) -#define SIO_SET(x) \ +#define SIO_SET(x) \ CSR_WRITE_1(sc, VR_MIICMD, \ CSR_READ_1(sc, VR_MIICMD) | x) -#define SIO_CLR(x) \ +#define SIO_CLR(x) \ CSR_WRITE_1(sc, VR_MIICMD, \ CSR_READ_1(sc, VR_MIICMD) & ~x) @@ -233,11 +263,11 @@ static void vr_mii_send(sc, bits, cnt) SIO_CLR(VR_MIICMD_CLK); for (i = (0x1 << (cnt - 1)); i; i >>= 1) { - if (bits & i) { + if (bits & i) { SIO_SET(VR_MIICMD_DATAIN); - } else { + } else { SIO_CLR(VR_MIICMD_DATAIN); - } + } DELAY(1); SIO_CLR(VR_MIICMD_CLK); DELAY(1); @@ -251,7 +281,7 @@ static void vr_mii_send(sc, bits, cnt) static int vr_mii_readreg(sc, frame) struct vr_softc *sc; struct vr_mii_frame *frame; - + { int i, ack, s; @@ -264,12 +294,12 @@ static int vr_mii_readreg(sc, frame) frame->mii_opcode = VR_MII_READOP; frame->mii_turnaround = 0; frame->mii_data = 0; - + CSR_WRITE_1(sc, VR_MIICMD, 0); VR_SETBIT(sc, VR_MIICMD, VR_MIICMD_DIRECTPGM); /* - * Turn on data xmit. + * Turn on data xmit. */ SIO_SET(VR_MIICMD_DIR); @@ -304,7 +334,7 @@ static int vr_mii_readreg(sc, frame) * need to clock through 16 cycles to keep the PHY(s) in sync. */ if (ack) { - for(i = 0; i < 16; i++) { + for (i = 0; i < 16; i++) { SIO_CLR(VR_MIICMD_CLK); DELAY(1); SIO_SET(VR_MIICMD_CLK); @@ -335,8 +365,8 @@ fail: splx(s); if (ack) - return(1); - return(0); + return (1); + return (0); } /* @@ -345,7 +375,6 @@ fail: static int vr_mii_writereg(sc, frame) struct vr_softc *sc; struct vr_mii_frame *frame; - { int s; @@ -361,9 +390,9 @@ static int vr_mii_writereg(sc, frame) frame->mii_stdelim = VR_MII_STARTDELIM; frame->mii_opcode = VR_MII_WRITEOP; frame->mii_turnaround = VR_MII_TURNAROUND; - + /* - * Turn on data output. + * Turn on data output. */ SIO_SET(VR_MIICMD_DIR); @@ -389,7 +418,7 @@ static int vr_mii_writereg(sc, frame) splx(s); - return(0); + return (0); } static u_int16_t vr_phy_readreg(sc, reg) @@ -398,13 +427,13 @@ static u_int16_t vr_phy_readreg(sc, reg) { struct vr_mii_frame frame; - bzero((char *)&frame, sizeof(frame)); + bzero((char *)&frame, sizeof (frame)); frame.mii_phyaddr = sc->vr_phy_addr; frame.mii_regaddr = reg; vr_mii_readreg(sc, &frame); - return(frame.mii_data); + return (frame.mii_data); } static void vr_phy_writereg(sc, reg, data) @@ -414,7 +443,7 @@ static void vr_phy_writereg(sc, reg, data) { struct vr_mii_frame frame; - bzero((char *)&frame, sizeof(frame)); + bzero((char *)&frame, sizeof (frame)); frame.mii_phyaddr = sc->vr_phy_addr; frame.mii_regaddr = reg; @@ -450,7 +479,7 @@ static u_int8_t vr_calchash(addr) } /* return the filter bit position */ - return((crc >> 26) & 0x0000003F); + return ((crc >> 26) & 0x0000003F); } /* @@ -462,11 +491,16 @@ static void vr_setmulti(sc) struct ifnet *ifp; int h = 0; u_int32_t hashes[2] = { 0, 0 }; +#if defined(__NetBSD__) + struct ether_multistep step; + struct ether_multi *enm; +#else struct ifmultiaddr *ifma; - u_int8_t rxfilt; +#endif int mcnt = 0; + u_int8_t rxfilt; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; rxfilt = CSR_READ_1(sc, VR_RXCFG); @@ -483,15 +517,29 @@ static void vr_setmulti(sc) CSR_WRITE_4(sc, VR_MAR1, 0); /* now program new ones */ +#if defined(__NetBSD__) + ETHER_FIRST_MULTI(step, &sc->vr_ec, enm); + while (enm != NULL) { + if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6) != 0) + continue; + + h = vr_calchash(enm->enm_addrlo); +#else for (ifma = ifp->if_multiaddrs.lh_first; ifma != NULL; ifma = ifma->ifma_link.le_next) { if (ifma->ifma_addr->sa_family != AF_LINK) continue; + h = vr_calchash(LLADDR((struct sockaddr_dl *)ifma->ifma_addr)); +#endif + if (h < 32) hashes[0] |= (1 << h); else hashes[1] |= (1 << (h - 32)); +#if defined(__NetBSD__) + ETHER_NEXT_MULTI(step, enm); +#endif mcnt++; } @@ -517,7 +565,7 @@ static void vr_autoneg_xmit(sc) vr_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET); DELAY(500); - while(vr_phy_readreg(sc, PHY_BMCR) + while (vr_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_RESET); phy_sts = vr_phy_readreg(sc, PHY_BMCR); @@ -540,7 +588,7 @@ static void vr_autoneg_mii(sc, flag, verbose) struct ifmedia *ifm; ifm = &sc->ifmedia; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; ifm->ifm_media = IFM_ETHER | IFM_AUTO; @@ -560,9 +608,10 @@ static void vr_autoneg_mii(sc, flag, verbose) phy_sts = vr_phy_readreg(sc, PHY_BMSR); if (!(phy_sts & PHY_BMSR_CANAUTONEG)) { if (verbose) - printf("vr%d: autonegotiation not supported\n", - sc->vr_unit); - ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; + printf(VR_PRINTF_FMT + ": autonegotiation not supported\n", + VR_PRINTF_ARGS); + ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; return; } #endif @@ -570,11 +619,11 @@ static void vr_autoneg_mii(sc, flag, verbose) switch (flag) { case VR_FLAG_FORCEDELAY: /* - * XXX Never use this option anywhere but in the probe - * routine: making the kernel stop dead in its tracks - * for three whole seconds after we've gone multi-user + * XXX Never use this option anywhere but in the probe + * routine: making the kernel stop dead in its tracks + * for three whole seconds after we've gone multi-user * is really bad manners. - */ + */ vr_autoneg_xmit(sc); DELAY(5000000); break; @@ -582,9 +631,9 @@ static void vr_autoneg_mii(sc, flag, verbose) /* * Wait for the transmitter to go idle before starting * an autoneg session, otherwise vr_start() may clobber - * our timeout, and we don't want to allow transmission + * our timeout, and we don't want to allow transmission * during an autoneg session since that can screw it up. - */ + */ if (sc->vr_cdata.vr_tx_head != NULL) { sc->vr_want_auto = 1; return; @@ -600,17 +649,20 @@ static void vr_autoneg_mii(sc, flag, verbose) sc->vr_autoneg = 0; break; default: - printf("vr%d: invalid autoneg flag: %d\n", sc->vr_unit, flag); + printf(VR_PRINTF_FMT ": invalid autoneg flag: %d\n", + VR_PRINTF_ARGS, flag); return; } if (vr_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_AUTONEGCOMP) { if (verbose) - printf("vr%d: autoneg complete, ", sc->vr_unit); + printf(VR_PRINTF_FMT ": autoneg complete, ", + VR_PRINTF_ARGS); phy_sts = vr_phy_readreg(sc, PHY_BMSR); } else { if (verbose) - printf("vr%d: autoneg not complete, ", sc->vr_unit); + printf(VR_PRINTF_FMT ": autoneg not complete, ", + VR_PRINTF_ARGS); } media = vr_phy_readreg(sc, PHY_BMCR); @@ -679,19 +731,21 @@ static void vr_getmode_mii(sc) u_int16_t bmsr; struct ifnet *ifp; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; bmsr = vr_phy_readreg(sc, PHY_BMSR); if (bootverbose) - printf("vr%d: PHY status word: %x\n", sc->vr_unit, bmsr); + printf(VR_PRINTF_FMT ": PHY status word: %x\n", + VR_PRINTF_ARGS, bmsr); /* fallback */ sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX; if (bmsr & PHY_BMSR_10BTHALF) { if (bootverbose) - printf("vr%d: 10Mbps half-duplex mode supported\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": 10Mbps half-duplex mode supported\n", + VR_PRINTF_ARGS); ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL); ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL); @@ -699,8 +753,9 @@ static void vr_getmode_mii(sc) if (bmsr & PHY_BMSR_10BTFULL) { if (bootverbose) - printf("vr%d: 10Mbps full-duplex mode supported\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": 10Mbps full-duplex mode supported\n", + VR_PRINTF_ARGS); ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL); sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX; @@ -708,8 +763,9 @@ static void vr_getmode_mii(sc) if (bmsr & PHY_BMSR_100BTXHALF) { if (bootverbose) - printf("vr%d: 100Mbps half-duplex mode supported\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": 100Mbps half-duplex mode supported\n", + VR_PRINTF_ARGS); ifp->if_baudrate = 100000000; ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL); ifmedia_add(&sc->ifmedia, @@ -719,8 +775,9 @@ static void vr_getmode_mii(sc) if (bmsr & PHY_BMSR_100BTXFULL) { if (bootverbose) - printf("vr%d: 100Mbps full-duplex mode supported\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": 100Mbps full-duplex mode supported\n", + VR_PRINTF_ARGS); ifp->if_baudrate = 100000000; ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL); @@ -730,14 +787,16 @@ static void vr_getmode_mii(sc) /* Some also support 100BaseT4. */ if (bmsr & PHY_BMSR_100BT4) { if (bootverbose) - printf("vr%d: 100baseT4 mode supported\n", sc->vr_unit); + printf(VR_PRINTF_FMT ": 100baseT4 mode supported\n", + VR_PRINTF_ARGS); ifp->if_baudrate = 100000000; ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_T4, 0, NULL); sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_T4; #ifdef FORCE_AUTONEG_TFOUR if (bootverbose) - printf("vr%d: forcing on autoneg support for BT4\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": forcing on autoneg support for BT4\n", + VR_PRINTF_ARGS); ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0 NULL): sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO; #endif @@ -745,7 +804,8 @@ static void vr_getmode_mii(sc) if (bmsr & PHY_BMSR_CANAUTONEG) { if (bootverbose) - printf("vr%d: autoneg supported\n", sc->vr_unit); + printf(VR_PRINTF_FMT ": autoneg supported\n", + VR_PRINTF_ARGS); ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL); sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO; } @@ -763,20 +823,21 @@ static void vr_setmode_mii(sc, media) u_int16_t bmcr; struct ifnet *ifp; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; /* * If an autoneg session is in progress, stop it. */ if (sc->vr_autoneg) { - printf("vr%d: canceling autoneg session\n", sc->vr_unit); + printf(VR_PRINTF_FMT ": canceling autoneg session\n", + VR_PRINTF_ARGS); ifp->if_timer = sc->vr_autoneg = sc->vr_want_auto = 0; bmcr = vr_phy_readreg(sc, PHY_BMCR); bmcr &= ~PHY_BMCR_AUTONEGENBL; vr_phy_writereg(sc, PHY_BMCR, bmcr); } - printf("vr%d: selecting MII, ", sc->vr_unit); + printf(VR_PRINTF_FMT ": selecting MII, ", VR_PRINTF_ARGS); bmcr = vr_phy_readreg(sc, PHY_BMCR); @@ -853,266 +914,12 @@ static void vr_reset(sc) break; } if (i == VR_TIMEOUT) - printf("vr%d: reset never completed!\n", sc->vr_unit); + printf(VR_PRINTF_FMT ": reset never completed!\n", + VR_PRINTF_ARGS); /* Wait a little while for the chip to get its brains in order. */ DELAY(1000); - return; -} - -/* - * Probe for a VIA Rhine chip. Check the PCI vendor and device - * IDs against our list and return a device name if we find a match. - */ -static const char * -vr_probe(config_id, device_id) - pcici_t config_id; - pcidi_t device_id; -{ - struct vr_type *t; - - t = vr_devs; - - while(t->vr_name != NULL) { - if ((device_id & 0xFFFF) == t->vr_vid && - ((device_id >> 16) & 0xFFFF) == t->vr_did) { - return(t->vr_name); - } - t++; - } - - return(NULL); -} - -/* - * Attach the interface. Allocate softc structures, do ifmedia - * setup and ethernet/BPF attach. - */ -static void -vr_attach(config_id, unit) - pcici_t config_id; - int unit; -{ - int s, i; -#ifndef VR_USEIOSPACE - vm_offset_t pbase, vbase; -#endif - u_char eaddr[ETHER_ADDR_LEN]; - u_int32_t command; - struct vr_softc *sc; - struct ifnet *ifp; - int media = IFM_ETHER|IFM_100_TX|IFM_FDX; - unsigned int round; - caddr_t roundptr; - struct vr_type *p; - u_int16_t phy_vid, phy_did, phy_sts; - - s = splimp(); - - sc = malloc(sizeof(struct vr_softc), M_DEVBUF, M_NOWAIT); - if (sc == NULL) { - printf("vr%d: no memory for softc struct!\n", unit); - return; - } - bzero(sc, sizeof(struct vr_softc)); - - /* - * Handle power management nonsense. - */ - - command = pci_conf_read(config_id, VR_PCI_CAPID) & 0x000000FF; - if (command == 0x01) { - - command = pci_conf_read(config_id, VR_PCI_PWRMGMTCTRL); - if (command & VR_PSTATE_MASK) { - u_int32_t iobase, membase, irq; - - /* Save important PCI config data. */ - iobase = pci_conf_read(config_id, VR_PCI_LOIO); - membase = pci_conf_read(config_id, VR_PCI_LOMEM); - irq = pci_conf_read(config_id, VR_PCI_INTLINE); - - /* Reset the power state. */ - printf("vr%d: chip is in D%d power mode " - "-- setting to D0\n", unit, command & VR_PSTATE_MASK); - command &= 0xFFFFFFFC; - pci_conf_write(config_id, VR_PCI_PWRMGMTCTRL, command); - - /* Restore PCI config data. */ - pci_conf_write(config_id, VR_PCI_LOIO, iobase); - pci_conf_write(config_id, VR_PCI_LOMEM, membase); - pci_conf_write(config_id, VR_PCI_INTLINE, irq); - } - } - - /* - * Map control/status registers. - */ - command = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG); - command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); - pci_conf_write(config_id, PCI_COMMAND_STATUS_REG, command); - command = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG); - -#ifdef VR_USEIOSPACE - if (!(command & PCIM_CMD_PORTEN)) { - printf("vr%d: failed to enable I/O ports!\n", unit); - free(sc, M_DEVBUF); - goto fail; - } - - if (!pci_map_port(config_id, VR_PCI_LOIO, - (u_int16_t *)(&sc->vr_bhandle))) { - printf ("vr%d: couldn't map ports\n", unit); - goto fail; - } - sc->vr_btag = I386_BUS_SPACE_IO; -#else - if (!(command & PCIM_CMD_MEMEN)) { - printf("vr%d: failed to enable memory mapping!\n", unit); - goto fail; - } - - if (!pci_map_mem(config_id, VR_PCI_LOMEM, &vbase, &pbase)) { - printf ("vr%d: couldn't map memory\n", unit); - goto fail; - } - - sc->vr_bhandle = vbase; - sc->vr_btag = I386_BUS_SPACE_MEM; -#endif - - /* Allocate interrupt */ - if (!pci_map_int(config_id, vr_intr, sc, &net_imask)) { - printf("vr%d: couldn't map interrupt\n", unit); - goto fail; - } - - /* Reset the adapter. */ - vr_reset(sc); - - /* - * Get station address. The way the Rhine chips work, - * you're not allowed to directly access the EEPROM once - * they've been programmed a special way. Consequently, - * we need to read the node address from the PAR0 and PAR1 - * registers. - */ - VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD); - DELAY(200); - for (i = 0; i < ETHER_ADDR_LEN; i++) - eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i); - - /* - * A Rhine chip was detected. Inform the world. - */ - printf("vr%d: Ethernet address: %6D\n", unit, eaddr, ":"); - - sc->vr_unit = unit; - bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN); - - sc->vr_ldata_ptr = malloc(sizeof(struct vr_list_data) + 8, - M_DEVBUF, M_NOWAIT); - if (sc->vr_ldata_ptr == NULL) { - free(sc, M_DEVBUF); - printf("vr%d: no memory for list buffers!\n", unit); - return; - } - - sc->vr_ldata = (struct vr_list_data *)sc->vr_ldata_ptr; - round = (unsigned int)sc->vr_ldata_ptr & 0xF; - roundptr = sc->vr_ldata_ptr; - for (i = 0; i < 8; i++) { - if (round % 8) { - round++; - roundptr++; - } else - break; - } - sc->vr_ldata = (struct vr_list_data *)roundptr; - bzero(sc->vr_ldata, sizeof(struct vr_list_data)); - - ifp = &sc->arpcom.ac_if; - ifp->if_softc = sc; - ifp->if_unit = unit; - ifp->if_name = "vr"; - ifp->if_mtu = ETHERMTU; - ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; - ifp->if_ioctl = vr_ioctl; - ifp->if_output = ether_output; - ifp->if_start = vr_start; - ifp->if_watchdog = vr_watchdog; - ifp->if_init = vr_init; - ifp->if_baudrate = 10000000; - - if (bootverbose) - printf("vr%d: probing for a PHY\n", sc->vr_unit); - for (i = VR_PHYADDR_MIN; i < VR_PHYADDR_MAX + 1; i++) { - if (bootverbose) - printf("vr%d: checking address: %d\n", - sc->vr_unit, i); - sc->vr_phy_addr = i; - vr_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET); - DELAY(500); - while(vr_phy_readreg(sc, PHY_BMCR) - & PHY_BMCR_RESET); - if ((phy_sts = vr_phy_readreg(sc, PHY_BMSR))) - break; - } - if (phy_sts) { - phy_vid = vr_phy_readreg(sc, PHY_VENID); - phy_did = vr_phy_readreg(sc, PHY_DEVID); - if (bootverbose) - printf("vr%d: found PHY at address %d, ", - sc->vr_unit, sc->vr_phy_addr); - if (bootverbose) - printf("vendor id: %x device id: %x\n", - phy_vid, phy_did); - p = vr_phys; - while(p->vr_vid) { - if (phy_vid == p->vr_vid && - (phy_did | 0x000F) == p->vr_did) { - sc->vr_pinfo = p; - break; - } - p++; - } - if (sc->vr_pinfo == NULL) - sc->vr_pinfo = &vr_phys[PHY_UNKNOWN]; - if (bootverbose) - printf("vr%d: PHY type: %s\n", - sc->vr_unit, sc->vr_pinfo->vr_name); - } else { - printf("vr%d: MII without any phy!\n", sc->vr_unit); - goto fail; - } - - /* - * Do ifmedia setup. - */ - ifmedia_init(&sc->ifmedia, 0, vr_ifmedia_upd, vr_ifmedia_sts); - - vr_getmode_mii(sc); - vr_autoneg_mii(sc, VR_FLAG_FORCEDELAY, 1); - media = sc->ifmedia.ifm_media; - vr_stop(sc); - - ifmedia_set(&sc->ifmedia, media); - - /* - * Call MI attach routines. - */ - if_attach(ifp); - ether_ifattach(ifp); - -#if NBPFILTER > 0 - bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header)); -#endif - - at_shutdown(vr_shutdown, sc, SHUTDOWN_POST_SYNC); - -fail: - splx(s); return; } @@ -1131,7 +938,7 @@ static int vr_list_tx_init(sc) for (i = 0; i < VR_TX_LIST_CNT; i++) { cd->vr_tx_chain[i].vr_ptr = &ld->vr_tx_list[i]; if (i == (VR_TX_LIST_CNT - 1)) - cd->vr_tx_chain[i].vr_nextdesc = + cd->vr_tx_chain[i].vr_nextdesc = &cd->vr_tx_chain[0]; else cd->vr_tx_chain[i].vr_nextdesc = @@ -1141,7 +948,7 @@ static int vr_list_tx_init(sc) cd->vr_tx_free = &cd->vr_tx_chain[0]; cd->vr_tx_tail = cd->vr_tx_head = NULL; - return(0); + return (0); } @@ -1164,7 +971,7 @@ static int vr_list_rx_init(sc) cd->vr_rx_chain[i].vr_ptr = (struct vr_desc *)&ld->vr_rx_list[i]; if (vr_newbuf(sc, &cd->vr_rx_chain[i]) == ENOBUFS) - return(ENOBUFS); + return (ENOBUFS); if (i == (VR_RX_LIST_CNT - 1)) { cd->vr_rx_chain[i].vr_nextdesc = &cd->vr_rx_chain[0]; @@ -1180,7 +987,7 @@ static int vr_list_rx_init(sc) cd->vr_rx_head = &cd->vr_rx_chain[0]; - return(0); + return (0); } /* @@ -1198,17 +1005,19 @@ static int vr_newbuf(sc, c) MGETHDR(m_new, M_DONTWAIT, MT_DATA); if (m_new == NULL) { - printf("vr%d: no memory for rx list -- packet dropped!\n", - sc->vr_unit); - return(ENOBUFS); + printf(VR_PRINTF_FMT + ": no memory for rx list -- packet dropped!\n", + VR_PRINTF_ARGS); + return (ENOBUFS); } MCLGET(m_new, M_DONTWAIT); if (!(m_new->m_flags & M_EXT)) { - printf("vr%d: no memory for rx list -- packet dropped!\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": no memory for rx list -- packet dropped!\n", + VR_PRINTF_ARGS); m_freem(m_new); - return(ENOBUFS); + return (ENOBUFS); } c->vr_mbuf = m_new; @@ -1216,7 +1025,7 @@ static int vr_newbuf(sc, c) c->vr_ptr->vr_data = vtophys(mtod(m_new, caddr_t)); c->vr_ptr->vr_ctl = VR_RXCTL | VR_RXLEN; - return(0); + return (0); } /* @@ -1226,16 +1035,16 @@ static int vr_newbuf(sc, c) static void vr_rxeof(sc) struct vr_softc *sc; { - struct ether_header *eh; - struct mbuf *m; - struct ifnet *ifp; + struct ether_header *eh; + struct mbuf *m; + struct ifnet *ifp; struct vr_chain_onefrag *cur_rx; int total_len = 0; u_int32_t rxstat; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; - while(!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) & + while (!((rxstat = sc->vr_cdata.vr_rx_head->vr_ptr->vr_status) & VR_RXSTAT_OWN)) { cur_rx = sc->vr_cdata.vr_rx_head; sc->vr_cdata.vr_rx_head = cur_rx->vr_nextdesc; @@ -1244,12 +1053,12 @@ static void vr_rxeof(sc) * If an error occurs, update stats, clear the * status word and leave the mbuf cluster in place: * it should simply get re-used next time this descriptor - * comes up in the ring. + * comes up in the ring. */ if (rxstat & VR_RXSTAT_RXERR) { ifp->if_ierrors++; - printf("vr%d: rx error: ", sc->vr_unit); - switch(rxstat & 0x000000FF) { + printf(VR_PRINTF_FMT ": rx error: ", VR_PRINTF_ARGS); + switch (rxstat & 0x000000FF) { case VR_RXSTAT_CRCERR: printf("crc error\n"); break; @@ -1280,7 +1089,7 @@ static void vr_rxeof(sc) continue; } - /* No errors; receive the packet. */ + /* No errors; receive the packet. */ m = cur_rx->vr_mbuf; total_len = VR_RXBYTES(cur_rx->vr_ptr->vr_status); @@ -1288,7 +1097,7 @@ static void vr_rxeof(sc) * XXX The VIA Rhine chip includes the CRC with every * received frame, and there's no way to turn this * behavior off (at least, I can't find anything in - * the manual that explains how to do it) so we have + * the manual that explains how to do it) so we have * to trim off the CRC manually. */ total_len -= ETHER_CRC_LEN; @@ -1319,9 +1128,13 @@ static void vr_rxeof(sc) * address or the interface is in promiscuous mode. */ if (ifp->if_bpf) { +#if defined(__NetBSD__) + bpf_mtap(ifp->if_bpf, m); +#else bpf_mtap(ifp, m); +#endif if (ifp->if_flags & IFF_PROMISC && - (bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr, + (memcmp(eh->ether_dhost, sc->vr_enaddr, ETHER_ADDR_LEN) && (eh->ether_dhost[0] & 1) == 0)) { m_freem(m); @@ -1330,7 +1143,7 @@ static void vr_rxeof(sc) } #endif /* Remove header from mbuf and pass it on. */ - m_adj(m, sizeof(struct ether_header)); + m_adj(m, sizeof (struct ether_header)); ether_input(ifp, eh, m); } @@ -1362,7 +1175,7 @@ static void vr_txeof(sc) struct ifnet *ifp; register struct mbuf *n; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; /* Clear the timeout timer. */ ifp->if_timer = 0; @@ -1375,7 +1188,7 @@ static void vr_txeof(sc) * Go through our tx list and free mbufs for those * frames that have been transmitted. */ - while(sc->vr_cdata.vr_tx_head->vr_mbuf != NULL) { + while (sc->vr_cdata.vr_tx_head->vr_mbuf != NULL) { u_int32_t txstat; cur_tx = sc->vr_cdata.vr_tx_head; @@ -1395,7 +1208,7 @@ static void vr_txeof(sc) ifp->if_collisions +=(txstat & VR_TXSTAT_COLLCNT) >> 3; ifp->if_opackets++; - MFREE(cur_tx->vr_mbuf, n); + MFREE(cur_tx->vr_mbuf, n); cur_tx->vr_mbuf = NULL; if (sc->vr_cdata.vr_tx_head == sc->vr_cdata.vr_tx_tail) { @@ -1418,7 +1231,7 @@ static void vr_txeoc(sc) { struct ifnet *ifp; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; ifp->if_timer = 0; @@ -1440,7 +1253,7 @@ static void vr_intr(arg) u_int16_t status; sc = arg; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; /* Supress unwanted interrupts. */ if (!(ifp->if_flags & IFF_UP)) { @@ -1475,7 +1288,7 @@ static void vr_intr(arg) vr_txeoc(sc); } - if ((status & VR_ISR_TX_UNDERRUN)||(status & VR_ISR_TX_ABRT)){ + if ((status & VR_ISR_TX_UNDERRUN)||(status & VR_ISR_TX_ABRT)) { ifp->if_oerrors++; vr_txeof(sc); if (sc->vr_cdata.vr_tx_head != NULL) { @@ -1528,19 +1341,20 @@ static int vr_encap(sc, c, m_head) MGETHDR(m_new, M_DONTWAIT, MT_DATA); if (m_new == NULL) { - printf("vr%d: no memory for tx list", sc->vr_unit); - return(1); + printf(VR_PRINTF_FMT ": no memory for tx list", + VR_PRINTF_ARGS); + return (1); } if (m_head->m_pkthdr.len > MHLEN) { MCLGET(m_new, M_DONTWAIT); if (!(m_new->m_flags & M_EXT)) { m_freem(m_new); - printf("vr%d: no memory for tx list", - sc->vr_unit); - return(1); + printf(VR_PRINTF_FMT ": no memory for tx list", + VR_PRINTF_ARGS); + return (1); } } - m_copydata(m_head, 0, m_head->m_pkthdr.len, + m_copydata(m_head, 0, m_head->m_pkthdr.len, mtod(m_new, caddr_t)); m_new->m_pkthdr.len = m_new->m_len = m_head->m_pkthdr.len; m_freem(m_head); @@ -1566,7 +1380,7 @@ static int vr_encap(sc, c, m_head) c->vr_ptr->vr_ctl |= VR_TXCTL_LASTFRAG|VR_TXCTL_FINT; c->vr_ptr->vr_next = vtophys(c->vr_nextdesc->vr_ptr); - return(0); + return (0); } /* @@ -1601,7 +1415,7 @@ static void vr_start(ifp) start_tx = sc->vr_cdata.vr_tx_free; - while(sc->vr_cdata.vr_tx_free->vr_mbuf == NULL) { + while (sc->vr_cdata.vr_tx_free->vr_mbuf == NULL) { IF_DEQUEUE(&ifp->if_snd, m_head); if (m_head == NULL) break; @@ -1622,7 +1436,11 @@ static void vr_start(ifp) * to him. */ if (ifp->if_bpf) +#if defined(__NetBSD__) + bpf_mtap(ifp->if_bpf, cur_tx->vr_mbuf); +#else bpf_mtap(ifp, cur_tx->vr_mbuf); +#endif #endif VR_TXOWN(cur_tx) = VR_TXSTAT_OWN; VR_SETBIT16(sc, VR_COMMAND, VR_CMD_TX_ON|VR_CMD_TX_GO); @@ -1651,7 +1469,7 @@ static void vr_init(xsc) void *xsc; { struct vr_softc *sc = xsc; - struct ifnet *ifp = &sc->arpcom.ac_if; + struct ifnet *ifp = &sc->vr_if; u_int16_t phy_bmcr = 0; int s; @@ -1677,8 +1495,8 @@ static void vr_init(xsc) /* Init circular RX list. */ if (vr_list_rx_init(sc) == ENOBUFS) { - printf("vr%d: initialization failed: no " - "memory for rx buffers\n", sc->vr_unit); + printf(VR_PRINTF_FMT ": initialization failed: no " + "memory for rx buffers\n", VR_PRINTF_ARGS); vr_stop(sc); (void)splx(s); return; @@ -1751,14 +1569,14 @@ static int vr_ifmedia_upd(ifp) ifm = &sc->ifmedia; if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) - return(EINVAL); + return (EINVAL); if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO) vr_autoneg_mii(sc, VR_FLAG_SCHEDDELAY, 1); else vr_setmode_mii(sc, ifm->ifm_media); - return(0); + return (0); } /* @@ -1815,17 +1633,53 @@ static int vr_ioctl(ifp, command, data) caddr_t data; { struct vr_softc *sc = ifp->if_softc; +#if defined(__NetBSD__) + struct ifaddr *ifa = (struct ifaddr *)data; +#endif struct ifreq *ifr = (struct ifreq *) data; int s, error = 0; s = splimp(); - switch(command) { + switch (command) { +#if defined(__NetBSD__) + case SIOCSIFADDR: + ifp->if_flags |= IFF_UP; + + switch (ifa->ifa_addr->sa_family) { +#ifdef INET + case AF_INET: + vr_init(sc); + arp_ifinit(ifp, ifa); + break; +#endif /* INET */ + default: + vr_init(sc); + break; + } + break; + + case SIOCGIFADDR: + bcopy((caddr_t) sc->vr_enaddr, + (caddr_t) ((struct sockaddr *)&ifr->ifr_data)->sa_data, + ETHER_ADDR_LEN); + break; + + case SIOCSIFMTU: + if (ifr->ifr_mtu > ETHERMTU) + error = EINVAL; + else + ifp->if_mtu = ifr->ifr_mtu; + break; + +#else /* __NetBSD__ */ case SIOCSIFADDR: case SIOCGIFADDR: case SIOCSIFMTU: error = ether_ioctl(ifp, command, data); break; + +#endif /* __NetBSD__ */ case SIOCSIFFLAGS: if (ifp->if_flags & IFF_UP) { vr_init(sc); @@ -1837,8 +1691,15 @@ static int vr_ioctl(ifp, command, data) break; case SIOCADDMULTI: case SIOCDELMULTI: - vr_setmulti(sc); - error = 0; + if (command == SIOCADDMULTI) + error = ether_addmulti(ifr, &sc->vr_ec); + else + error = ether_delmulti(ifr, &sc->vr_ec); + + if (error == ENETRESET) { + vr_setmulti(sc); + error = 0; + } break; case SIOCGIFMEDIA: case SIOCSIFMEDIA: @@ -1851,7 +1712,7 @@ static int vr_ioctl(ifp, command, data) (void)splx(s); - return(error); + return (error); } static void vr_watchdog(ifp) @@ -1867,11 +1728,12 @@ static void vr_watchdog(ifp) } ifp->if_oerrors++; - printf("vr%d: watchdog timeout\n", sc->vr_unit); + printf(VR_PRINTF_FMT ": watchdog timeout\n", VR_PRINTF_ARGS); if (!(vr_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT)) - printf("vr%d: no carrier - transceiver cable problem?\n", - sc->vr_unit); + printf(VR_PRINTF_FMT + ": no carrier - transceiver cable problem?\n", + VR_PRINTF_ARGS); vr_stop(sc); vr_reset(sc); @@ -1893,7 +1755,7 @@ static void vr_stop(sc) register int i; struct ifnet *ifp; - ifp = &sc->arpcom.ac_if; + ifp = &sc->vr_if; ifp->if_timer = 0; VR_SETBIT16(sc, VR_COMMAND, VR_CMD_STOP); @@ -1912,7 +1774,7 @@ static void vr_stop(sc) } } bzero((char *)&sc->vr_ldata->vr_rx_list, - sizeof(sc->vr_ldata->vr_rx_list)); + sizeof (sc->vr_ldata->vr_rx_list)); /* * Free the TX list buffers. @@ -1925,26 +1787,42 @@ static void vr_stop(sc) } bzero((char *)&sc->vr_ldata->vr_tx_list, - sizeof(sc->vr_ldata->vr_tx_list)); + sizeof (sc->vr_ldata->vr_tx_list)); ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); return; } +#if defined(__FreeBSD__) +static const char *vr_probe __P((pcici_t, pcidi_t)); +static void vr_attach __P((pcici_t, int)); +static void vr_shutdown __P((int, void *)); + +static unsigned long vr_count = 0; + /* - * Stop all chip I/O so that the kernel's probe routines don't - * get confused by errant DMAs when rebooting. + * Probe for a VIA Rhine chip. Check the PCI vendor and device + * IDs against our list and return a device name if we find a match. */ -static void vr_shutdown(howto, arg) - int howto; - void *arg; +static const char * +vr_probe(config_id, device_id) + pcici_t config_id; + pcidi_t device_id; { - struct vr_softc *sc = (struct vr_softc *)arg; + struct vr_type *t; - vr_stop(sc); + t = vr_devs; - return; + while (t->vr_name != NULL) { + if ((device_id & 0xFFFF) == t->vr_vid && + ((device_id >> 16) & 0xFFFF) == t->vr_did) { + return (t->vr_name); + } + t++; + } + + return (NULL); } static struct pci_device vr_device = { @@ -1955,3 +1833,418 @@ static struct pci_device vr_device = { NULL }; DATA_SET(pcidevice_set, vr_device); +#endif /* __FreeBSD__ */ + +#if defined(__NetBSD__) +static int vr_probe __P((struct device *, struct cfdata *, void *)); +static void vr_attach __P((struct device *, struct device *, void *)); +static void vr_shutdown __P((void *)); + +struct cfattach vr_ca = { + sizeof (struct vr_softc), vr_probe, vr_attach +}; + +static int +vr_probe(parent, match, aux) + struct device *parent; + struct cfdata *match; + void *aux; +{ + struct pci_attach_args *pa = (struct pci_attach_args *)aux; + struct vr_type *t; + + t = vr_devs; + + while (t->vr_name != NULL) { + if (PCI_VENDOR(pa->pa_id) == t->vr_vid && + PCI_PRODUCT(pa->pa_id) == t->vr_did) { + return (1); + } + t++; + } + + return (0); +} +#endif /* __NetBSD__ */ + +/* + * Stop all chip I/O so that the kernel's probe routines don't + * get confused by errant DMAs when rebooting. + */ +#if defined(__FreeBSD__) +static void vr_shutdown(howto, arg) + int howto; + void *arg; +#endif +#if defined(__NetBSD__) +static void vr_shutdown(arg) + void *arg; +#endif +{ + struct vr_softc *sc = (struct vr_softc *)arg; + + vr_stop(sc); + + return; +} + +/* + * Attach the interface. Allocate softc structures, do ifmedia + * setup and ethernet/BPF attach. + */ +#if defined(__FreeBSD__) +static void +vr_attach(config_id, unit) + pcici_t config_id; + int unit; +#endif +#if defined(__NetBSD__) +static void +vr_attach(parent, self, aux) + struct device * const parent; + struct device * const self; + void * const aux; +#endif +{ +#if defined(__FreeBSD__) +#define PCI_CONF_WRITE(r, v) pci_conf_write(config_id, (r), (v)) +#define PCI_CONF_READ(r) pci_conf_read(config_id, (r)) + int s; + struct vr_softc *sc; +#ifndef VR_USEIOSPACE + vm_offset_t pbase, vbase; +#endif +#endif + +#if defined(__NetBSD__) +#define PCI_CONF_WRITE(r, v) pci_conf_write(pa->pa_pc, pa->pa_tag, (r), (v)) +#define PCI_CONF_READ(r) pci_conf_read(pa->pa_pc, pa->pa_tag, (r)) + struct vr_softc * const sc = (struct vr_softc *) self; + struct pci_attach_args * const pa = (struct pci_attach_args *) aux; +#endif + int i; + u_int32_t command; + struct ifnet *ifp; + int media = IFM_ETHER|IFM_100_TX|IFM_FDX; + unsigned int round; + caddr_t roundptr; + u_char eaddr[ETHER_ADDR_LEN]; + struct vr_type *p; + u_int16_t phy_vid, phy_did, phy_sts; + +#if defined(__FreeBSD__) + s = splimp(); + + sc = malloc(sizeof (struct vr_softc), M_DEVBUF, M_NOWAIT); + if (sc == NULL) { + printf("vr%d: no memory for softc struct!\n", unit); + return; + } + bzero(sc, sizeof (struct vr_softc)); + + sc->vr_unit = unit; +#endif + + + /* + * Handle power management nonsense. + */ + + command = PCI_CONF_READ(VR_PCI_CAPID) & 0x000000FF; + if (command == 0x01) { + + command = PCI_CONF_READ(VR_PCI_PWRMGMTCTRL); + if (command & VR_PSTATE_MASK) { + u_int32_t iobase, membase, irq; + + /* Save important PCI config data. */ + iobase = PCI_CONF_READ(VR_PCI_LOIO); + membase = PCI_CONF_READ(VR_PCI_LOMEM); + irq = PCI_CONF_READ(VR_PCI_INTLINE); + + /* Reset the power state. */ + printf(VR_PRINTF_FMT ": chip is in D%d power mode " + "-- setting to D0\n", + VR_PRINTF_ARGS, command & VR_PSTATE_MASK); + command &= 0xFFFFFFFC; + PCI_CONF_WRITE(VR_PCI_PWRMGMTCTRL, command); + + /* Restore PCI config data. */ + PCI_CONF_WRITE(VR_PCI_LOIO, iobase); + PCI_CONF_WRITE(VR_PCI_LOMEM, membase); + PCI_CONF_WRITE(VR_PCI_INTLINE, irq); + } + } + + /* + * Map control/status registers. + */ + command = PCI_CONF_READ(PCI_COMMAND_STATUS_REG); +#if defined(__FreeBSD__) + command |= (PCIM_CMD_PORTEN|PCIM_CMD_MEMEN|PCIM_CMD_BUSMASTEREN); +#endif +#if defined(__NetBSD__) + command |= (PCI_COMMAND_IO_ENABLE | + PCI_COMMAND_MEM_ENABLE | + PCI_COMMAND_MASTER_ENABLE); +#endif + PCI_CONF_WRITE(PCI_COMMAND_STATUS_REG, command); + command = PCI_CONF_READ(PCI_COMMAND_STATUS_REG); + +#if defined(__FreeBSD__) +#ifdef VR_USEIOSPACE + if (!(command & PCIM_CMD_PORTEN)) { + printf(VR_PRINTF_FMT ": failed to enable I/O ports!\n", + VR_PRINTF_ARGS); + free(sc, M_DEVBUF); + goto fail; + } + + if (!pci_map_port(config_id, VR_PCI_LOIO, + (u_int16_t *)(&sc->vr_bhandle))) { + printf (VR_PRINTF_FMT ": couldn't map ports\n", + VR_PRINTF_ARGS); + goto fail; + } + sc->vr_btag = I386_BUS_SPACE_IO; +#else + if (!(command & PCIM_CMD_MEMEN)) { + printf(VR_PRINTF_FMT ": failed to enable memory mapping!\n", + VR_PRINTF_ARGS); + goto fail; + } + + if (!pci_map_mem(config_id, VR_PCI_LOMEM, &vbase, &pbase)) { + printf (VR_PRINTF_FMT ": couldn't map memory\n", + VR_PRINTF_ARGS); + goto fail; + } + + sc->vr_bhandle = vbase; + sc->vr_btag = I386_BUS_SPACE_MEM; +#endif + + /* Allocate interrupt */ + if (!pci_map_int(config_id, vr_intr, sc, &net_imask)) { + printf(VR_PRINTF_FMT ": couldn't map interrupt\n", + VR_PRINTF_ARGS); + goto fail; + } +#endif /* __FreeBSD__ */ + +#if defined(__NetBSD__) + { + bus_space_tag_t iot, memt; + bus_space_handle_t ioh, memh; + int ioh_valid, memh_valid; + pci_intr_handle_t intrhandle; + const char *intrstr; + + ioh_valid = (pci_mapreg_map(pa, VR_PCI_LOIO, + PCI_MAPREG_TYPE_IO, 0, + &iot, &ioh, NULL, NULL) == 0); + memh_valid = (pci_mapreg_map(pa, VR_PCI_LOMEM, + PCI_MAPREG_TYPE_MEM | + PCI_MAPREG_MEM_TYPE_32BIT, + 0, &memt, &memh, NULL, NULL) == 0); +#if defined(VR_USEIOSPACE) + if (ioh_valid) { + sc->vr_btag = iot; + sc->vr_bhandle = ioh; + } else if (memh_valid) { + sc->vr_btag = memt; + sc->vr_bhandle = memh; + } +#else + if (memh_valid) { + sc->vr_btag = memt; + sc->vr_bhandle = memh; + } else if (ioh_valid) { + sc->vr_btag = iot; + sc->vr_bhandle = ioh; + } +#endif + else { + printf(": unable to map device registers\n"); + return; + } + + /* Allocate interrupt */ + if (pci_intr_map(pa->pa_pc, pa->pa_intrtag, pa->pa_intrpin, + pa->pa_intrline, &intrhandle)) { + printf("%s: couldn't map interrupt\n", + sc->vr_dev.dv_xname); + goto fail; + } + intrstr = pci_intr_string(pa->pa_pc, intrhandle); + sc->vr_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_NET, + (void *)vr_intr, sc); + if (sc->vr_ih == NULL) { + printf("%s: couldn't establish interrupt", + sc->vr_dev.dv_xname); + if (intrstr != NULL) + printf(" at %s", intrstr); + printf("\n"); + } + printf("%s: interrupting at %s\n", + sc->vr_dev.dv_xname, intrstr); + } + sc->vr_ats = shutdownhook_establish(vr_shutdown, sc); + if (sc->vr_ats == NULL) + printf("%s: warning: couldn't establish shutdown hook\n", + sc->vr_if.if_xname); +#endif /* __NetBSD__ */ + + /* Reset the adapter. */ + vr_reset(sc); + + /* + * Get station address. The way the Rhine chips work, + * you're not allowed to directly access the EEPROM once + * they've been programmed a special way. Consequently, + * we need to read the node address from the PAR0 and PAR1 + * registers. + */ + VR_SETBIT(sc, VR_EECSR, VR_EECSR_LOAD); + DELAY(200); + for (i = 0; i < ETHER_ADDR_LEN; i++) + eaddr[i] = CSR_READ_1(sc, VR_PAR0 + i); + + /* + * A Rhine chip was detected. Inform the world. + */ + printf(VR_PRINTF_FMT ": Ethernet address: %s\n", + VR_PRINTF_ARGS, ether_sprintf(eaddr)); + + bcopy(eaddr, sc->vr_enaddr, ETHER_ADDR_LEN); + + sc->vr_ldata_ptr = malloc(sizeof (struct vr_list_data) + 8, + M_DEVBUF, M_NOWAIT); + if (sc->vr_ldata_ptr == NULL) { + free(sc, M_DEVBUF); + printf(VR_PRINTF_FMT ": no memory for list buffers!\n", + VR_PRINTF_ARGS); + return; + } + + sc->vr_ldata = (struct vr_list_data *)sc->vr_ldata_ptr; + round = (unsigned int)sc->vr_ldata_ptr & 0xF; + roundptr = sc->vr_ldata_ptr; + for (i = 0; i < 8; i++) { + if (round % 8) { + round++; + roundptr++; + } else + break; + } + sc->vr_ldata = (struct vr_list_data *)roundptr; + bzero(sc->vr_ldata, sizeof (struct vr_list_data)); + + ifp = &sc->vr_if; + ifp->if_softc = sc; + ifp->if_mtu = ETHERMTU; + ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; + ifp->if_ioctl = vr_ioctl; + ifp->if_output = ether_output; + ifp->if_start = vr_start; + ifp->if_watchdog = vr_watchdog; + ifp->if_baudrate = 10000000; +#if defined(__NetBSD__) + bcopy(sc->vr_dev.dv_xname, ifp->if_xname, IFNAMSIZ); +#else + ifp->if_unit = unit; + ifp->if_name = "vr"; + ifp->if_init = vr_init; +#endif + + if (bootverbose) + printf(VR_PRINTF_FMT ": probing for a PHY\n", + VR_PRINTF_ARGS); + for (i = VR_PHYADDR_MIN; i < VR_PHYADDR_MAX + 1; i++) { + if (bootverbose) + printf(VR_PRINTF_FMT ": checking address: %d\n", + VR_PRINTF_ARGS, i); + + sc->vr_phy_addr = i; + vr_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET); + DELAY(500); + while (vr_phy_readreg(sc, PHY_BMCR) + & PHY_BMCR_RESET); + if ((phy_sts = vr_phy_readreg(sc, PHY_BMSR))) + break; + } + if (phy_sts) { + phy_vid = vr_phy_readreg(sc, PHY_VENID); + phy_did = vr_phy_readreg(sc, PHY_DEVID); + if (bootverbose) + printf(VR_PRINTF_FMT ": found PHY at address %d, ", + VR_PRINTF_ARGS, sc->vr_phy_addr); + if (bootverbose) + printf("vendor id: %x device id: %x\n", + phy_vid, phy_did); + p = vr_phys; + while (p->vr_vid) { + if (phy_vid == p->vr_vid && + (phy_did | 0x000F) == p->vr_did) { + sc->vr_pinfo = p; + break; + } + p++; + } + if (sc->vr_pinfo == NULL) + sc->vr_pinfo = &vr_phys[PHY_UNKNOWN]; + if (bootverbose) + printf(VR_PRINTF_FMT ": PHY type: %s\n", + VR_PRINTF_ARGS, sc->vr_pinfo->vr_name); + } else { + printf(VR_PRINTF_FMT ": MII without any phy!\n", + VR_PRINTF_ARGS); + goto fail; + } + + /* + * Do ifmedia setup. + */ + ifmedia_init(&sc->ifmedia, 0, vr_ifmedia_upd, vr_ifmedia_sts); + + vr_getmode_mii(sc); + vr_autoneg_mii(sc, VR_FLAG_FORCEDELAY, 1); + media = sc->ifmedia.ifm_media; + vr_stop(sc); + + ifmedia_set(&sc->ifmedia, media); + + /* + * Call MI attach routines. + */ + if_attach(ifp); +#if defined(__NetBSD__) + ether_ifattach(ifp, sc->vr_enaddr); +#else + ether_ifattach(ifp); +#endif + +#if NBPFILTER > 0 +#if defined(__NetBSD__) + bpfattach(&sc->vr_if.if_bpf, + ifp, DLT_EN10MB, sizeof (struct ether_header)); +#else + bpfattach(ifp, DLT_EN10MB, sizeof (struct ether_header)); +#endif +#endif + +#if defined(__NetBSD__) + sc->vr_ats = shutdownhook_establish(vr_shutdown, sc); + if (sc->vr_ats == NULL) + printf("%s: warning: couldn't establish shutdown hook\n", + sc->vr_dev.dv_xname); +#else + at_shutdown(vr_shutdown, sc, SHUTDOWN_POST_SYNC); +#endif + +fail: +#if !defined(__NetBSD__) + splx(s); +#endif + return; +} diff --git a/sys/dev/pci/if_vrreg.h b/sys/dev/pci/if_vrreg.h index 204a31d94017..51dfa423935c 100644 --- a/sys/dev/pci/if_vrreg.h +++ b/sys/dev/pci/if_vrreg.h @@ -1,3 +1,5 @@ +/* $Id: if_vrreg.h,v 1.2 1999/01/21 12:00:25 sakamoto Exp $ */ + /* * Copyright (c) 1997, 1998 * Bill Paul . All rights reserved. @@ -29,153 +31,153 @@ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF * THE POSSIBILITY OF SUCH DAMAGE. * - * $Id: if_vrreg.h,v 1.1.1.1 1999/01/21 11:55:22 sakamoto Exp $ + * $FreeBSD: if_vrreg.h,v 1.2 1999/01/10 18:51:49 wpaul Exp $ */ /* * Rhine register definitions. */ -#define VR_PAR0 0x00 /* node address 0 to 4 */ -#define VR_PAR1 0x04 /* node address 2 to 6 */ -#define VR_RXCFG 0x06 /* receiver config register */ -#define VR_TXCFG 0x07 /* transmit config register */ -#define VR_COMMAND 0x08 /* command register */ -#define VR_ISR 0x0C /* interrupt/status register */ -#define VR_IMR 0x0E /* interrupt mask register */ -#define VR_MAR0 0x10 /* multicast hash 0 */ -#define VR_MAR1 0x14 /* multicast hash 1 */ -#define VR_RXADDR 0x18 /* rx descriptor list start addr */ -#define VR_TXADDR 0x1C /* tx descriptor list start addr */ -#define VR_CURRXDESC0 0x20 -#define VR_CURRXDESC1 0x24 -#define VR_CURRXDESC2 0x28 -#define VR_CURRXDESC3 0x2C -#define VR_NEXTRXDESC0 0x30 -#define VR_NEXTRXDESC1 0x34 -#define VR_NEXTRXDESC2 0x38 -#define VR_NEXTRXDESC3 0x3C -#define VR_CURTXDESC0 0x40 -#define VR_CURTXDESC1 0x44 -#define VR_CURTXDESC2 0x48 -#define VR_CURTXDESC3 0x4C -#define VR_NEXTTXDESC0 0x50 -#define VR_NEXTTXDESC1 0x54 -#define VR_NEXTTXDESC2 0x58 -#define VR_NEXTTXDESC3 0x5C -#define VR_CURRXDMA 0x60 /* current RX DMA address */ -#define VR_CURTXDMA 0x64 /* current TX DMA address */ -#define VR_TALLYCNT 0x68 /* tally counter test register */ -#define VR_PHYADDR 0x6C -#define VR_MIISTAT 0x6D -#define VR_BCR0 0x6E -#define VR_BCR1 0x6F -#define VR_MIICMD 0x70 -#define VR_MIIADDR 0x71 -#define VR_MIIDATA 0x72 -#define VR_EECSR 0x74 -#define VR_TEST 0x75 -#define VR_GPIO 0x76 -#define VR_CONFIG 0x78 -#define VR_MPA_CNT 0x7C -#define VR_CRC_CNT 0x7E +#define VR_PAR0 0x00 /* node address 0 to 4 */ +#define VR_PAR1 0x04 /* node address 2 to 6 */ +#define VR_RXCFG 0x06 /* receiver config register */ +#define VR_TXCFG 0x07 /* transmit config register */ +#define VR_COMMAND 0x08 /* command register */ +#define VR_ISR 0x0C /* interrupt/status register */ +#define VR_IMR 0x0E /* interrupt mask register */ +#define VR_MAR0 0x10 /* multicast hash 0 */ +#define VR_MAR1 0x14 /* multicast hash 1 */ +#define VR_RXADDR 0x18 /* rx descriptor list start addr */ +#define VR_TXADDR 0x1C /* tx descriptor list start addr */ +#define VR_CURRXDESC0 0x20 +#define VR_CURRXDESC1 0x24 +#define VR_CURRXDESC2 0x28 +#define VR_CURRXDESC3 0x2C +#define VR_NEXTRXDESC0 0x30 +#define VR_NEXTRXDESC1 0x34 +#define VR_NEXTRXDESC2 0x38 +#define VR_NEXTRXDESC3 0x3C +#define VR_CURTXDESC0 0x40 +#define VR_CURTXDESC1 0x44 +#define VR_CURTXDESC2 0x48 +#define VR_CURTXDESC3 0x4C +#define VR_NEXTTXDESC0 0x50 +#define VR_NEXTTXDESC1 0x54 +#define VR_NEXTTXDESC2 0x58 +#define VR_NEXTTXDESC3 0x5C +#define VR_CURRXDMA 0x60 /* current RX DMA address */ +#define VR_CURTXDMA 0x64 /* current TX DMA address */ +#define VR_TALLYCNT 0x68 /* tally counter test register */ +#define VR_PHYADDR 0x6C +#define VR_MIISTAT 0x6D +#define VR_BCR0 0x6E +#define VR_BCR1 0x6F +#define VR_MIICMD 0x70 +#define VR_MIIADDR 0x71 +#define VR_MIIDATA 0x72 +#define VR_EECSR 0x74 +#define VR_TEST 0x75 +#define VR_GPIO 0x76 +#define VR_CONFIG 0x78 +#define VR_MPA_CNT 0x7C +#define VR_CRC_CNT 0x7E /* * RX config bits. */ -#define VR_RXCFG_RX_ERRPKTS 0x01 -#define VR_RXCFG_RX_RUNT 0x02 -#define VR_RXCFG_RX_MULTI 0x04 -#define VR_RXCFG_RX_BROAD 0x08 -#define VR_RXCFG_RX_PROMISC 0x10 -#define VR_RXCFG_RX_THRESH 0xE0 +#define VR_RXCFG_RX_ERRPKTS 0x01 +#define VR_RXCFG_RX_RUNT 0x02 +#define VR_RXCFG_RX_MULTI 0x04 +#define VR_RXCFG_RX_BROAD 0x08 +#define VR_RXCFG_RX_PROMISC 0x10 +#define VR_RXCFG_RX_THRESH 0xE0 -#define VR_RXTHRESH_32BYTES 0x00 -#define VR_RXTHRESH_64BYTES 0x20 -#define VR_RXTHRESH_128BYTES 0x40 -#define VR_RXTHRESH_256BYTES 0x60 -#define VR_RXTHRESH_512BYTES 0x80 -#define VR_RXTHRESH_768BYTES 0xA0 -#define VR_RXTHRESH_1024BYTES 0xC0 -#define VR_RXTHRESH_STORENFWD 0xE0 +#define VR_RXTHRESH_32BYTES 0x00 +#define VR_RXTHRESH_64BYTES 0x20 +#define VR_RXTHRESH_128BYTES 0x40 +#define VR_RXTHRESH_256BYTES 0x60 +#define VR_RXTHRESH_512BYTES 0x80 +#define VR_RXTHRESH_768BYTES 0xA0 +#define VR_RXTHRESH_1024BYTES 0xC0 +#define VR_RXTHRESH_STORENFWD 0xE0 /* * TX config bits. */ -#define VR_TXCFG_RSVD0 0x01 -#define VR_TXCFG_LOOPBKMODE 0x06 -#define VR_TXCFG_BACKOFF 0x08 -#define VR_TXCFG_RSVD1 0x10 -#define VR_TXCFG_TX_THRESH 0xE0 +#define VR_TXCFG_RSVD0 0x01 +#define VR_TXCFG_LOOPBKMODE 0x06 +#define VR_TXCFG_BACKOFF 0x08 +#define VR_TXCFG_RSVD1 0x10 +#define VR_TXCFG_TX_THRESH 0xE0 -#define VR_TXTHRESH_32BYTES 0x00 -#define VR_TXTHRESH_64BYTES 0x20 -#define VR_TXTHRESH_128BYTES 0x40 -#define VR_TXTHRESH_256BYTES 0x60 -#define VR_TXTHRESH_512BYTES 0x80 -#define VR_TXTHRESH_768BYTES 0xA0 -#define VR_TXTHRESH_1024BYTES 0xC0 -#define VR_TXTHRESH_STORENFWD 0xE0 +#define VR_TXTHRESH_32BYTES 0x00 +#define VR_TXTHRESH_64BYTES 0x20 +#define VR_TXTHRESH_128BYTES 0x40 +#define VR_TXTHRESH_256BYTES 0x60 +#define VR_TXTHRESH_512BYTES 0x80 +#define VR_TXTHRESH_768BYTES 0xA0 +#define VR_TXTHRESH_1024BYTES 0xC0 +#define VR_TXTHRESH_STORENFWD 0xE0 /* * Command register bits. */ -#define VR_CMD_INIT 0x0001 -#define VR_CMD_START 0x0002 -#define VR_CMD_STOP 0x0004 -#define VR_CMD_RX_ON 0x0008 -#define VR_CMD_TX_ON 0x0010 +#define VR_CMD_INIT 0x0001 +#define VR_CMD_START 0x0002 +#define VR_CMD_STOP 0x0004 +#define VR_CMD_RX_ON 0x0008 +#define VR_CMD_TX_ON 0x0010 #define VR_CMD_TX_GO 0x0020 -#define VR_CMD_RX_GO 0x0040 -#define VR_CMD_RSVD 0x0080 -#define VR_CMD_RX_EARLY 0x0100 -#define VR_CMD_TX_EARLY 0x0200 -#define VR_CMD_FULLDUPLEX 0x0400 -#define VR_CMD_TX_NOPOLL 0x0800 +#define VR_CMD_RX_GO 0x0040 +#define VR_CMD_RSVD 0x0080 +#define VR_CMD_RX_EARLY 0x0100 +#define VR_CMD_TX_EARLY 0x0200 +#define VR_CMD_FULLDUPLEX 0x0400 +#define VR_CMD_TX_NOPOLL 0x0800 -#define VR_CMD_RESET 0x8000 +#define VR_CMD_RESET 0x8000 /* * Interrupt status bits. */ -#define VR_ISR_RX_OK 0x0001 /* packet rx ok */ -#define VR_ISR_TX_OK 0x0002 /* packet tx ok */ -#define VR_ISR_RX_ERR 0x0004 /* packet rx with err */ -#define VR_ISR_TX_ABRT 0x0008 /* tx aborted due to excess colls */ -#define VR_ISR_TX_UNDERRUN 0x0010 /* tx buffer underflow */ -#define VR_ISR_RX_NOBUF 0x0020 /* no rx buffer available */ -#define VR_ISR_BUSERR 0x0040 /* PCI bus error */ -#define VR_ISR_STATSOFLOW 0x0080 /* stats counter oflow */ -#define VR_ISR_RX_EARLY 0x0100 /* rx early */ -#define VR_ISR_LINKSTAT 0x0200 /* MII status change */ -#define VR_ISR_RX_OFLOW 0x0400 /* rx FIFO overflow */ -#define VR_ISR_RX_DROPPED 0x0800 -#define VR_ISR_RX_NOBUF2 0x1000 -#define VR_ISR_TX_ABRT2 0x2000 -#define VR_ISR_LINKSTAT2 0x4000 -#define VR_ISR_MAGICPACKET 0x8000 +#define VR_ISR_RX_OK 0x0001 /* packet rx ok */ +#define VR_ISR_TX_OK 0x0002 /* packet tx ok */ +#define VR_ISR_RX_ERR 0x0004 /* packet rx with err */ +#define VR_ISR_TX_ABRT 0x0008 /* tx aborted due to excess colls */ +#define VR_ISR_TX_UNDERRUN 0x0010 /* tx buffer underflow */ +#define VR_ISR_RX_NOBUF 0x0020 /* no rx buffer available */ +#define VR_ISR_BUSERR 0x0040 /* PCI bus error */ +#define VR_ISR_STATSOFLOW 0x0080 /* stats counter oflow */ +#define VR_ISR_RX_EARLY 0x0100 /* rx early */ +#define VR_ISR_LINKSTAT 0x0200 /* MII status change */ +#define VR_ISR_RX_OFLOW 0x0400 /* rx FIFO overflow */ +#define VR_ISR_RX_DROPPED 0x0800 +#define VR_ISR_RX_NOBUF2 0x1000 +#define VR_ISR_TX_ABRT2 0x2000 +#define VR_ISR_LINKSTAT2 0x4000 +#define VR_ISR_MAGICPACKET 0x8000 /* * Interrupt mask bits. */ -#define VR_IMR_RX_OK 0x0001 /* packet rx ok */ -#define VR_IMR_TX_OK 0x0002 /* packet tx ok */ -#define VR_IMR_RX_ERR 0x0004 /* packet rx with err */ -#define VR_IMR_TX_ABRT 0x0008 /* tx aborted due to excess colls */ -#define VR_IMR_TX_UNDERRUN 0x0010 /* tx buffer underflow */ -#define VR_IMR_RX_NOBUF 0x0020 /* no rx buffer available */ -#define VR_IMR_BUSERR 0x0040 /* PCI bus error */ -#define VR_IMR_STATSOFLOW 0x0080 /* stats counter oflow */ -#define VR_IMR_RX_EARLY 0x0100 /* rx early */ -#define VR_IMR_LINKSTAT 0x0200 /* MII status change */ -#define VR_IMR_RX_OFLOW 0x0400 /* rx FIFO overflow */ -#define VR_IMR_RX_DROPPED 0x0800 -#define VR_IMR_RX_NOBUF2 0x1000 -#define VR_IMR_TX_ABRT2 0x2000 -#define VR_IMR_LINKSTAT2 0x4000 -#define VR_IMR_MAGICPACKET 0x8000 +#define VR_IMR_RX_OK 0x0001 /* packet rx ok */ +#define VR_IMR_TX_OK 0x0002 /* packet tx ok */ +#define VR_IMR_RX_ERR 0x0004 /* packet rx with err */ +#define VR_IMR_TX_ABRT 0x0008 /* tx aborted due to excess colls */ +#define VR_IMR_TX_UNDERRUN 0x0010 /* tx buffer underflow */ +#define VR_IMR_RX_NOBUF 0x0020 /* no rx buffer available */ +#define VR_IMR_BUSERR 0x0040 /* PCI bus error */ +#define VR_IMR_STATSOFLOW 0x0080 /* stats counter oflow */ +#define VR_IMR_RX_EARLY 0x0100 /* rx early */ +#define VR_IMR_LINKSTAT 0x0200 /* MII status change */ +#define VR_IMR_RX_OFLOW 0x0400 /* rx FIFO overflow */ +#define VR_IMR_RX_DROPPED 0x0800 +#define VR_IMR_RX_NOBUF2 0x1000 +#define VR_IMR_TX_ABRT2 0x2000 +#define VR_IMR_LINKSTAT2 0x4000 +#define VR_IMR_MAGICPACKET 0x8000 -#define VR_INTRS \ +#define VR_INTRS \ (VR_IMR_RX_OK|VR_IMR_TX_OK|VR_IMR_RX_NOBUF| \ VR_IMR_TX_ABRT|VR_IMR_TX_UNDERRUN|VR_IMR_BUSERR| \ VR_IMR_RX_ERR|VR_ISR_RX_DROPPED) @@ -184,90 +186,90 @@ * MII status register. */ -#define VR_MIISTAT_SPEED 0x01 -#define VR_MIISTAT_LINKFAULT 0x02 -#define VR_MIISTAT_MGTREADERR 0x04 -#define VR_MIISTAT_MIIERR 0x08 -#define VR_MIISTAT_PHYOPT 0x10 -#define VR_MIISTAT_MDC_SPEED 0x20 -#define VR_MIISTAT_RSVD 0x40 -#define VR_MIISTAT_GPIO1POLL 0x80 +#define VR_MIISTAT_SPEED 0x01 +#define VR_MIISTAT_LINKFAULT 0x02 +#define VR_MIISTAT_MGTREADERR 0x04 +#define VR_MIISTAT_MIIERR 0x08 +#define VR_MIISTAT_PHYOPT 0x10 +#define VR_MIISTAT_MDC_SPEED 0x20 +#define VR_MIISTAT_RSVD 0x40 +#define VR_MIISTAT_GPIO1POLL 0x80 /* * MII command register bits. */ -#define VR_MIICMD_CLK 0x01 -#define VR_MIICMD_DATAOUT 0x02 -#define VR_MIICMD_DATAIN 0x04 -#define VR_MIICMD_DIR 0x08 -#define VR_MIICMD_DIRECTPGM 0x10 -#define VR_MIICMD_WRITE_ENB 0x20 -#define VR_MIICMD_READ_ENB 0x40 -#define VR_MIICMD_AUTOPOLL 0x80 +#define VR_MIICMD_CLK 0x01 +#define VR_MIICMD_DATAOUT 0x02 +#define VR_MIICMD_DATAIN 0x04 +#define VR_MIICMD_DIR 0x08 +#define VR_MIICMD_DIRECTPGM 0x10 +#define VR_MIICMD_WRITE_ENB 0x20 +#define VR_MIICMD_READ_ENB 0x40 +#define VR_MIICMD_AUTOPOLL 0x80 /* * EEPROM control bits. */ -#define VR_EECSR_DATAIN 0x01 /* data out */ -#define VR_EECSR_DATAOUT 0x02 /* data in */ -#define VR_EECSR_CLK 0x04 /* clock */ -#define VR_EECSR_CS 0x08 /* chip select */ -#define VR_EECSR_DPM 0x10 -#define VR_EECSR_LOAD 0x20 -#define VR_EECSR_EMBP 0x40 -#define VR_EECSR_EEPR 0x80 +#define VR_EECSR_DATAIN 0x01 /* data out */ +#define VR_EECSR_DATAOUT 0x02 /* data in */ +#define VR_EECSR_CLK 0x04 /* clock */ +#define VR_EECSR_CS 0x08 /* chip select */ +#define VR_EECSR_DPM 0x10 +#define VR_EECSR_LOAD 0x20 +#define VR_EECSR_EMBP 0x40 +#define VR_EECSR_EEPR 0x80 -#define VR_EECMD_WRITE 0x140 -#define VR_EECMD_READ 0x180 -#define VR_EECMD_ERASE 0x1c0 +#define VR_EECMD_WRITE 0x140 +#define VR_EECMD_READ 0x180 +#define VR_EECMD_ERASE 0x1c0 /* * Test register bits. */ -#define VR_TEST_TEST0 0x01 -#define VR_TEST_TEST1 0x02 -#define VR_TEST_TEST2 0x04 -#define VR_TEST_TSTUD 0x08 -#define VR_TEST_TSTOV 0x10 -#define VR_TEST_BKOFF 0x20 -#define VR_TEST_FCOL 0x40 -#define VR_TEST_HBDES 0x80 +#define VR_TEST_TEST0 0x01 +#define VR_TEST_TEST1 0x02 +#define VR_TEST_TEST2 0x04 +#define VR_TEST_TSTUD 0x08 +#define VR_TEST_TSTOV 0x10 +#define VR_TEST_BKOFF 0x20 +#define VR_TEST_FCOL 0x40 +#define VR_TEST_HBDES 0x80 /* * Config register bits. */ -#define VR_CFG_GPIO2OUTENB 0x00000001 -#define VR_CFG_GPIO2OUT 0x00000002 /* gen. purp. pin */ -#define VR_CFG_GPIO2IN 0x00000004 /* gen. purp. pin */ -#define VR_CFG_AUTOOPT 0x00000008 /* enable rx/tx autopoll */ -#define VR_CFG_MIIOPT 0x00000010 -#define VR_CFG_MMIENB 0x00000020 /* memory mapped mode enb */ -#define VR_CFG_JUMPER 0x00000040 /* PHY and oper. mode select */ -#define VR_CFG_EELOAD 0x00000080 /* enable EEPROM programming */ -#define VR_CFG_LATMENB 0x00000100 /* larency timer effect enb. */ -#define VR_CFG_MRREADWAIT 0x00000200 -#define VR_CFG_MRWRITEWAIT 0x00000400 -#define VR_CFG_RX_ARB 0x00000800 -#define VR_CFG_TX_ARB 0x00001000 -#define VR_CFG_READMULTI 0x00002000 -#define VR_CFG_TX_PACE 0x00004000 -#define VR_CFG_TX_QDIS 0x00008000 -#define VR_CFG_ROMSEL0 0x00010000 -#define VR_CFG_ROMSEL1 0x00020000 -#define VR_CFG_ROMSEL2 0x00040000 -#define VR_CFG_ROMTIMESEL 0x00080000 -#define VR_CFG_RSVD0 0x00100000 -#define VR_CFG_ROMDLY 0x00200000 -#define VR_CFG_ROMOPT 0x00400000 -#define VR_CFG_RSVD1 0x00800000 -#define VR_CFG_BACKOFFOPT 0x01000000 -#define VR_CFG_BACKOFFMOD 0x02000000 -#define VR_CFG_CAPEFFECT 0x04000000 -#define VR_CFG_BACKOFFRAND 0x08000000 -#define VR_CFG_MAGICKPACKET 0x10000000 -#define VR_CFG_PCIREADLINE 0x20000000 -#define VR_CFG_DIAG 0x40000000 -#define VR_CFG_GPIOEN 0x80000000 +#define VR_CFG_GPIO2OUTENB 0x00000001 +#define VR_CFG_GPIO2OUT 0x00000002 /* gen. purp. pin */ +#define VR_CFG_GPIO2IN 0x00000004 /* gen. purp. pin */ +#define VR_CFG_AUTOOPT 0x00000008 /* enable rx/tx autopoll */ +#define VR_CFG_MIIOPT 0x00000010 +#define VR_CFG_MMIENB 0x00000020 /* memory mapped mode enb */ +#define VR_CFG_JUMPER 0x00000040 /* PHY and oper. mode select */ +#define VR_CFG_EELOAD 0x00000080 /* enable EEPROM programming */ +#define VR_CFG_LATMENB 0x00000100 /* larency timer effect enb. */ +#define VR_CFG_MRREADWAIT 0x00000200 +#define VR_CFG_MRWRITEWAIT 0x00000400 +#define VR_CFG_RX_ARB 0x00000800 +#define VR_CFG_TX_ARB 0x00001000 +#define VR_CFG_READMULTI 0x00002000 +#define VR_CFG_TX_PACE 0x00004000 +#define VR_CFG_TX_QDIS 0x00008000 +#define VR_CFG_ROMSEL0 0x00010000 +#define VR_CFG_ROMSEL1 0x00020000 +#define VR_CFG_ROMSEL2 0x00040000 +#define VR_CFG_ROMTIMESEL 0x00080000 +#define VR_CFG_RSVD0 0x00100000 +#define VR_CFG_ROMDLY 0x00200000 +#define VR_CFG_ROMOPT 0x00400000 +#define VR_CFG_RSVD1 0x00800000 +#define VR_CFG_BACKOFFOPT 0x01000000 +#define VR_CFG_BACKOFFMOD 0x02000000 +#define VR_CFG_CAPEFFECT 0x04000000 +#define VR_CFG_BACKOFFRAND 0x08000000 +#define VR_CFG_MAGICKPACKET 0x10000000 +#define VR_CFG_PCIREADLINE 0x20000000 +#define VR_CFG_DIAG 0x40000000 +#define VR_CFG_GPIOEN 0x80000000 /* * Rhine TX/RX list structure. @@ -280,67 +282,67 @@ struct vr_desc { u_int32_t vr_ptr2; }; -#define vr_data vr_ptr1 -#define vr_next vr_ptr2 +#define vr_data vr_ptr1 +#define vr_next vr_ptr2 -#define VR_RXSTAT_RXERR 0x00000001 -#define VR_RXSTAT_CRCERR 0x00000002 -#define VR_RXSTAT_FRAMEALIGNERR 0x00000004 -#define VR_RXSTAT_FIFOOFLOW 0x00000008 -#define VR_RXSTAT_GIANT 0x00000010 -#define VR_RXSTAT_RUNT 0x00000020 -#define VR_RXSTAT_BUSERR 0x00000040 -#define VR_RXSTAT_BUFFERR 0x00000080 -#define VR_RXSTAT_LASTFRAG 0x00000100 -#define VR_RXSTAT_FIRSTFRAG 0x00000200 -#define VR_RXSTAT_RLINK 0x00000400 -#define VR_RXSTAT_RX_PHYS 0x00000800 -#define VR_RXSTAT_RX_BROAD 0x00001000 -#define VR_RXSTAT_RX_MULTI 0x00002000 -#define VR_RXSTAT_RX_OK 0x00004000 -#define VR_RXSTAT_RXLEN 0x07FF0000 -#define VR_RXSTAT_RXLEN_EXT 0x78000000 -#define VR_RXSTAT_OWN 0x80000000 +#define VR_RXSTAT_RXERR 0x00000001 +#define VR_RXSTAT_CRCERR 0x00000002 +#define VR_RXSTAT_FRAMEALIGNERR 0x00000004 +#define VR_RXSTAT_FIFOOFLOW 0x00000008 +#define VR_RXSTAT_GIANT 0x00000010 +#define VR_RXSTAT_RUNT 0x00000020 +#define VR_RXSTAT_BUSERR 0x00000040 +#define VR_RXSTAT_BUFFERR 0x00000080 +#define VR_RXSTAT_LASTFRAG 0x00000100 +#define VR_RXSTAT_FIRSTFRAG 0x00000200 +#define VR_RXSTAT_RLINK 0x00000400 +#define VR_RXSTAT_RX_PHYS 0x00000800 +#define VR_RXSTAT_RX_BROAD 0x00001000 +#define VR_RXSTAT_RX_MULTI 0x00002000 +#define VR_RXSTAT_RX_OK 0x00004000 +#define VR_RXSTAT_RXLEN 0x07FF0000 +#define VR_RXSTAT_RXLEN_EXT 0x78000000 +#define VR_RXSTAT_OWN 0x80000000 -#define VR_RXBYTES(x) ((x & VR_RXSTAT_RXLEN) >> 16) -#define VR_RXSTAT (VR_RXSTAT_FIRSTFRAG|VR_RXSTAT_LASTFRAG|VR_RXSTAT_OWN) +#define VR_RXBYTES(x) ((x & VR_RXSTAT_RXLEN) >> 16) +#define VR_RXSTAT (VR_RXSTAT_FIRSTFRAG|VR_RXSTAT_LASTFRAG|VR_RXSTAT_OWN) -#define VR_RXCTL_BUFLEN 0x000007FF -#define VR_RXCTL_BUFLEN_EXT 0x00007800 -#define VR_RXCTL_CHAIN 0x00008000 -#define VR_RXCTL_RX_INTR 0x00800000 +#define VR_RXCTL_BUFLEN 0x000007FF +#define VR_RXCTL_BUFLEN_EXT 0x00007800 +#define VR_RXCTL_CHAIN 0x00008000 +#define VR_RXCTL_RX_INTR 0x00800000 -#define VR_RXCTL (VR_RXCTL_CHAIN|VR_RXCTL_RX_INTR) +#define VR_RXCTL (VR_RXCTL_CHAIN|VR_RXCTL_RX_INTR) -#define VR_TXSTAT_DEFER 0x00000001 -#define VR_TXSTAT_UNDERRUN 0x00000002 -#define VR_TXSTAT_COLLCNT 0x00000078 -#define VR_TXSTAT_SQE 0x00000080 -#define VR_TXSTAT_ABRT 0x00000100 -#define VR_TXSTAT_LATECOLL 0x00000200 -#define VR_TXSTAT_CARRLOST 0x00000400 -#define VR_TXSTAT_BUSERR 0x00002000 -#define VR_TXSTAT_JABTIMEO 0x00004000 -#define VR_TXSTAT_ERRSUM 0x00008000 -#define VR_TXSTAT_OWN 0x80000000 +#define VR_TXSTAT_DEFER 0x00000001 +#define VR_TXSTAT_UNDERRUN 0x00000002 +#define VR_TXSTAT_COLLCNT 0x00000078 +#define VR_TXSTAT_SQE 0x00000080 +#define VR_TXSTAT_ABRT 0x00000100 +#define VR_TXSTAT_LATECOLL 0x00000200 +#define VR_TXSTAT_CARRLOST 0x00000400 +#define VR_TXSTAT_BUSERR 0x00002000 +#define VR_TXSTAT_JABTIMEO 0x00004000 +#define VR_TXSTAT_ERRSUM 0x00008000 +#define VR_TXSTAT_OWN 0x80000000 -#define VR_TXCTL_BUFLEN 0x000007FF -#define VR_TXCTL_BUFLEN_EXT 0x00007800 -#define VR_TXCTL_TLINK 0x00008000 -#define VR_TXCTL_FIRSTFRAG 0x00200000 -#define VR_TXCTL_LASTFRAG 0x00400000 -#define VR_TXCTL_FINT 0x00800000 +#define VR_TXCTL_BUFLEN 0x000007FF +#define VR_TXCTL_BUFLEN_EXT 0x00007800 +#define VR_TXCTL_TLINK 0x00008000 +#define VR_TXCTL_FIRSTFRAG 0x00200000 +#define VR_TXCTL_LASTFRAG 0x00400000 +#define VR_TXCTL_FINT 0x00800000 -#define VR_MAXFRAGS 16 -#define VR_RX_LIST_CNT 64 -#define VR_TX_LIST_CNT 64 -#define VR_MIN_FRAMELEN 60 -#define VR_FRAMELEN 1536 -#define VR_RXLEN 1520 +#define VR_MAXFRAGS 16 +#define VR_RX_LIST_CNT 64 +#define VR_TX_LIST_CNT 64 +#define VR_MIN_FRAMELEN 60 +#define VR_FRAMELEN 1536 +#define VR_RXLEN 1520 -#define VR_TXOWN(x) x->vr_ptr->vr_status +#define VR_TXOWN(x) x->vr_ptr->vr_status struct vr_list_data { struct vr_desc vr_rx_list[VR_RX_LIST_CNT]; @@ -371,8 +373,13 @@ struct vr_chain_data { }; struct vr_type { +#if defined(__NetBSD__) + pci_vendor_id_t vr_vid; + pci_product_id_t vr_did; +#else u_int16_t vr_vid; u_int16_t vr_did; +#endif char *vr_name; }; @@ -388,17 +395,28 @@ struct vr_mii_frame { /* * MII constants */ -#define VR_MII_STARTDELIM 0x01 -#define VR_MII_READOP 0x02 -#define VR_MII_WRITEOP 0x01 -#define VR_MII_TURNAROUND 0x02 +#define VR_MII_STARTDELIM 0x01 +#define VR_MII_READOP 0x02 +#define VR_MII_WRITEOP 0x01 +#define VR_MII_TURNAROUND 0x02 -#define VR_FLAG_FORCEDELAY 1 -#define VR_FLAG_SCHEDDELAY 2 -#define VR_FLAG_DELAYTIMEO 3 +#define VR_FLAG_FORCEDELAY 1 +#define VR_FLAG_SCHEDDELAY 2 +#define VR_FLAG_DELAYTIMEO 3 struct vr_softc { +#if defined(__NetBSD__) + struct device vr_dev; + void *vr_ih; + void *vr_ats; + bus_space_tag_t vr_bustag; + bus_space_handle_t vr_bushandle; + pci_chipset_tag_t vr_pc; + struct ethercom vr_ec; + u_int8_t vr_enaddr[ETHER_ADDR_LEN]; +#else struct arpcom arpcom; /* interface info */ +#endif struct ifmedia ifmedia; /* media info */ bus_space_handle_t vr_bhandle; /* bus space handle */ bus_space_tag_t vr_btag; /* bus space tag */ @@ -415,24 +433,37 @@ struct vr_softc { struct vr_chain_data vr_cdata; }; +#if defined(__NetBSD__) +#define vr_if vr_ec.ec_if +#define vr_enaddr vr_enaddr +#define vr_xname vr_if.if_xname +#define VR_PRINTF_FMT "%s" +#define VR_PRINTF_ARGS sc->vr_xname +#else +#define vr_if arpcom.ac_if +#define vr_enaddr arpcom.ac_enaddr +#define VR_PRINTF_FMT "vr%d" +#define VR_PRINTF_ARGS sc->vr_unit +#endif + /* * register space access macros */ -#define CSR_WRITE_4(sc, reg, val) \ +#define CSR_WRITE_4(sc, reg, val) \ bus_space_write_4(sc->vr_btag, sc->vr_bhandle, reg, val) -#define CSR_WRITE_2(sc, reg, val) \ +#define CSR_WRITE_2(sc, reg, val) \ bus_space_write_2(sc->vr_btag, sc->vr_bhandle, reg, val) -#define CSR_WRITE_1(sc, reg, val) \ +#define CSR_WRITE_1(sc, reg, val) \ bus_space_write_1(sc->vr_btag, sc->vr_bhandle, reg, val) -#define CSR_READ_4(sc, reg) \ +#define CSR_READ_4(sc, reg) \ bus_space_read_4(sc->vr_btag, sc->vr_bhandle, reg) -#define CSR_READ_2(sc, reg) \ +#define CSR_READ_2(sc, reg) \ bus_space_read_2(sc->vr_btag, sc->vr_bhandle, reg) -#define CSR_READ_1(sc, reg) \ +#define CSR_READ_1(sc, reg) \ bus_space_read_1(sc->vr_btag, sc->vr_bhandle, reg) -#define VR_TIMEOUT 1000 +#define VR_TIMEOUT 1000 /* * General constants that are fun to know. @@ -445,39 +476,39 @@ struct vr_softc { * VIA Rhine device IDs. */ #define VIA_DEVICEID_RHINE 0x3043 -#define VIA_DEVICEID_RHINE_II 0x6100 +#define VIA_DEVICEID_RHINE_II 0x6100 /* * Texas Instruments PHY identifiers */ -#define TI_PHY_VENDORID 0x4000 -#define TI_PHY_10BT 0x501F -#define TI_PHY_100VGPMI 0x502F +#define TI_PHY_VENDORID 0x4000 +#define TI_PHY_10BT 0x501F +#define TI_PHY_100VGPMI 0x502F /* * These ID values are for the NS DP83840A 10/100 PHY */ -#define NS_PHY_VENDORID 0x2000 -#define NS_PHY_83840A 0x5C0F +#define NS_PHY_VENDORID 0x2000 +#define NS_PHY_83840A 0x5C0F /* * Level 1 10/100 PHY */ -#define LEVEL1_PHY_VENDORID 0x7810 -#define LEVEL1_PHY_LXT970 0x000F +#define LEVEL1_PHY_VENDORID 0x7810 +#define LEVEL1_PHY_LXT970 0x000F /* * Intel 82555 10/100 PHY */ -#define INTEL_PHY_VENDORID 0x0A28 -#define INTEL_PHY_82555 0x015F +#define INTEL_PHY_VENDORID 0x0A28 +#define INTEL_PHY_82555 0x015F /* * SEEQ 80220 10/100 PHY */ -#define SEEQ_PHY_VENDORID 0x0016 -#define SEEQ_PHY_80220 0xF83F +#define SEEQ_PHY_VENDORID 0x0016 +#define SEEQ_PHY_80220 0xF83F /* @@ -485,66 +516,66 @@ struct vr_softc { * other PCI registers. */ -#define VR_PCI_VENDOR_ID 0x00 -#define VR_PCI_DEVICE_ID 0x02 -#define VR_PCI_COMMAND 0x04 -#define VR_PCI_STATUS 0x06 -#define VR_PCI_CLASSCODE 0x09 -#define VR_PCI_LATENCY_TIMER 0x0D -#define VR_PCI_HEADER_TYPE 0x0E -#define VR_PCI_LOIO 0x10 -#define VR_PCI_LOMEM 0x14 -#define VR_PCI_BIOSROM 0x30 -#define VR_PCI_INTLINE 0x3C -#define VR_PCI_INTPIN 0x3D -#define VR_PCI_MINGNT 0x3E -#define VR_PCI_MINLAT 0x0F -#define VR_PCI_RESETOPT 0x48 -#define VR_PCI_EEPROM_DATA 0x4C +#define VR_PCI_VENDOR_ID 0x00 +#define VR_PCI_DEVICE_ID 0x02 +#define VR_PCI_COMMAND 0x04 +#define VR_PCI_STATUS 0x06 +#define VR_PCI_CLASSCODE 0x09 +#define VR_PCI_LATENCY_TIMER 0x0D +#define VR_PCI_HEADER_TYPE 0x0E +#define VR_PCI_LOIO 0x10 +#define VR_PCI_LOMEM 0x14 +#define VR_PCI_BIOSROM 0x30 +#define VR_PCI_INTLINE 0x3C +#define VR_PCI_INTPIN 0x3D +#define VR_PCI_MINGNT 0x3E +#define VR_PCI_MINLAT 0x0F +#define VR_PCI_RESETOPT 0x48 +#define VR_PCI_EEPROM_DATA 0x4C /* power management registers */ -#define VR_PCI_CAPID 0xDC /* 8 bits */ -#define VR_PCI_NEXTPTR 0xDD /* 8 bits */ -#define VR_PCI_PWRMGMTCAP 0xDE /* 16 bits */ -#define VR_PCI_PWRMGMTCTRL 0xE0 /* 16 bits */ +#define VR_PCI_CAPID 0xDC /* 8 bits */ +#define VR_PCI_NEXTPTR 0xDD /* 8 bits */ +#define VR_PCI_PWRMGMTCAP 0xDE /* 16 bits */ +#define VR_PCI_PWRMGMTCTRL 0xE0 /* 16 bits */ -#define VR_PSTATE_MASK 0x0003 -#define VR_PSTATE_D0 0x0000 -#define VR_PSTATE_D1 0x0002 -#define VR_PSTATE_D2 0x0002 -#define VR_PSTATE_D3 0x0003 -#define VR_PME_EN 0x0010 -#define VR_PME_STATUS 0x8000 +#define VR_PSTATE_MASK 0x0003 +#define VR_PSTATE_D0 0x0000 +#define VR_PSTATE_D1 0x0002 +#define VR_PSTATE_D2 0x0002 +#define VR_PSTATE_D3 0x0003 +#define VR_PME_EN 0x0010 +#define VR_PME_STATUS 0x8000 -#define PHY_UNKNOWN 6 +#define PHY_UNKNOWN 6 -#define VR_PHYADDR_MIN 0x00 -#define VR_PHYADDR_MAX 0x1F +#define VR_PHYADDR_MIN 0x00 +#define VR_PHYADDR_MAX 0x1F -#define PHY_BMCR 0x00 -#define PHY_BMSR 0x01 -#define PHY_VENID 0x02 -#define PHY_DEVID 0x03 -#define PHY_ANAR 0x04 -#define PHY_LPAR 0x05 -#define PHY_ANEXP 0x06 +#define PHY_BMCR 0x00 +#define PHY_BMSR 0x01 +#define PHY_VENID 0x02 +#define PHY_DEVID 0x03 +#define PHY_ANAR 0x04 +#define PHY_LPAR 0x05 +#define PHY_ANEXP 0x06 -#define PHY_ANAR_NEXTPAGE 0x8000 -#define PHY_ANAR_RSVD0 0x4000 -#define PHY_ANAR_TLRFLT 0x2000 -#define PHY_ANAR_RSVD1 0x1000 -#define PHY_ANAR_RSVD2 0x0800 -#define PHY_ANAR_RSVD3 0x0400 -#define PHY_ANAR_100BT4 0x0200 -#define PHY_ANAR_100BTXFULL 0x0100 -#define PHY_ANAR_100BTXHALF 0x0080 -#define PHY_ANAR_10BTFULL 0x0040 -#define PHY_ANAR_10BTHALF 0x0020 -#define PHY_ANAR_PROTO4 0x0010 -#define PHY_ANAR_PROTO3 0x0008 -#define PHY_ANAR_PROTO2 0x0004 -#define PHY_ANAR_PROTO1 0x0002 -#define PHY_ANAR_PROTO0 0x0001 +#define PHY_ANAR_NEXTPAGE 0x8000 +#define PHY_ANAR_RSVD0 0x4000 +#define PHY_ANAR_TLRFLT 0x2000 +#define PHY_ANAR_RSVD1 0x1000 +#define PHY_ANAR_RSVD2 0x0800 +#define PHY_ANAR_RSVD3 0x0400 +#define PHY_ANAR_100BT4 0x0200 +#define PHY_ANAR_100BTXFULL 0x0100 +#define PHY_ANAR_100BTXHALF 0x0080 +#define PHY_ANAR_10BTFULL 0x0040 +#define PHY_ANAR_10BTHALF 0x0020 +#define PHY_ANAR_PROTO4 0x0010 +#define PHY_ANAR_PROTO3 0x0008 +#define PHY_ANAR_PROTO2 0x0004 +#define PHY_ANAR_PROTO1 0x0002 +#define PHY_ANAR_PROTO0 0x0001 /* * These are the register definitions for the PHY (physical layer @@ -553,22 +584,22 @@ struct vr_softc { /* * PHY BMCR Basic Mode Control Register */ -#define PHY_BMCR_RESET 0x8000 -#define PHY_BMCR_LOOPBK 0x4000 -#define PHY_BMCR_SPEEDSEL 0x2000 -#define PHY_BMCR_AUTONEGENBL 0x1000 -#define PHY_BMCR_RSVD0 0x0800 /* write as zero */ -#define PHY_BMCR_ISOLATE 0x0400 -#define PHY_BMCR_AUTONEGRSTR 0x0200 -#define PHY_BMCR_DUPLEX 0x0100 -#define PHY_BMCR_COLLTEST 0x0080 -#define PHY_BMCR_RSVD1 0x0040 /* write as zero, don't care */ -#define PHY_BMCR_RSVD2 0x0020 /* write as zero, don't care */ -#define PHY_BMCR_RSVD3 0x0010 /* write as zero, don't care */ -#define PHY_BMCR_RSVD4 0x0008 /* write as zero, don't care */ -#define PHY_BMCR_RSVD5 0x0004 /* write as zero, don't care */ -#define PHY_BMCR_RSVD6 0x0002 /* write as zero, don't care */ -#define PHY_BMCR_RSVD7 0x0001 /* write as zero, don't care */ +#define PHY_BMCR_RESET 0x8000 +#define PHY_BMCR_LOOPBK 0x4000 +#define PHY_BMCR_SPEEDSEL 0x2000 +#define PHY_BMCR_AUTONEGENBL 0x1000 +#define PHY_BMCR_RSVD0 0x0800 /* write as zero */ +#define PHY_BMCR_ISOLATE 0x0400 +#define PHY_BMCR_AUTONEGRSTR 0x0200 +#define PHY_BMCR_DUPLEX 0x0100 +#define PHY_BMCR_COLLTEST 0x0080 +#define PHY_BMCR_RSVD1 0x0040 /* write as zero, don't care */ +#define PHY_BMCR_RSVD2 0x0020 /* write as zero, don't care */ +#define PHY_BMCR_RSVD3 0x0010 /* write as zero, don't care */ +#define PHY_BMCR_RSVD4 0x0008 /* write as zero, don't care */ +#define PHY_BMCR_RSVD5 0x0004 /* write as zero, don't care */ +#define PHY_BMCR_RSVD6 0x0002 /* write as zero, don't care */ +#define PHY_BMCR_RSVD7 0x0001 /* write as zero, don't care */ /* * RESET: 1 == software reset, 0 == normal operation * Resets status and control registers to default values. @@ -595,22 +626,22 @@ struct vr_softc { * COLLTEST: 1 == collision test enabled, 0 == normal operation */ -/* - * PHY, BMSR Basic Mode Status Register - */ -#define PHY_BMSR_100BT4 0x8000 -#define PHY_BMSR_100BTXFULL 0x4000 -#define PHY_BMSR_100BTXHALF 0x2000 -#define PHY_BMSR_10BTFULL 0x1000 -#define PHY_BMSR_10BTHALF 0x0800 -#define PHY_BMSR_RSVD1 0x0400 /* write as zero, don't care */ -#define PHY_BMSR_RSVD2 0x0200 /* write as zero, don't care */ -#define PHY_BMSR_RSVD3 0x0100 /* write as zero, don't care */ -#define PHY_BMSR_RSVD4 0x0080 /* write as zero, don't care */ -#define PHY_BMSR_MFPRESUP 0x0040 -#define PHY_BMSR_AUTONEGCOMP 0x0020 -#define PHY_BMSR_REMFAULT 0x0010 -#define PHY_BMSR_CANAUTONEG 0x0008 -#define PHY_BMSR_LINKSTAT 0x0004 -#define PHY_BMSR_JABBER 0x0002 -#define PHY_BMSR_EXTENDED 0x0001 +/* + * PHY, BMSR Basic Mode Status Register + */ +#define PHY_BMSR_100BT4 0x8000 +#define PHY_BMSR_100BTXFULL 0x4000 +#define PHY_BMSR_100BTXHALF 0x2000 +#define PHY_BMSR_10BTFULL 0x1000 +#define PHY_BMSR_10BTHALF 0x0800 +#define PHY_BMSR_RSVD1 0x0400 /* write as zero, don't care */ +#define PHY_BMSR_RSVD2 0x0200 /* write as zero, don't care */ +#define PHY_BMSR_RSVD3 0x0100 /* write as zero, don't care */ +#define PHY_BMSR_RSVD4 0x0080 /* write as zero, don't care */ +#define PHY_BMSR_MFPRESUP 0x0040 +#define PHY_BMSR_AUTONEGCOMP 0x0020 +#define PHY_BMSR_REMFAULT 0x0010 +#define PHY_BMSR_CANAUTONEG 0x0008 +#define PHY_BMSR_LINKSTAT 0x0004 +#define PHY_BMSR_JABBER 0x0002 +#define PHY_BMSR_EXTENDED 0x0001