Add Amlogic RTC driver, from Anon Ymous
This commit is contained in:
jmcneill
parent
089a8f9d1d
commit
4f1b45db2e
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: amlogic_intr.h,v 1.5 2015/03/07 21:33:12 jmcneill Exp $ */
|
||||
/* $NetBSD: amlogic_intr.h,v 1.6 2015/03/22 17:28:22 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
@ -40,6 +40,7 @@
|
||||
#define AMLOGIC_INTR_USB0 62
|
||||
#define AMLOGIC_INTR_USB1 63
|
||||
#define AMLOGIC_INTR_UART2AO 70
|
||||
#define AMLOGIC_INTR_RTC 104
|
||||
#define AMLOGIC_INTR_SDHC 110
|
||||
#define AMLOGIC_INTR_UART0AO 122
|
||||
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: amlogic_io.c,v 1.7 2015/03/21 01:17:00 jmcneill Exp $ */
|
||||
/* $NetBSD: amlogic_io.c,v 1.8 2015/03/22 17:28:22 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
@ -29,7 +29,7 @@
|
||||
#include "opt_amlogic.h"
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: amlogic_io.c,v 1.7 2015/03/21 01:17:00 jmcneill Exp $");
|
||||
__KERNEL_RCSID(0, "$NetBSD: amlogic_io.c,v 1.8 2015/03/22 17:28:22 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/systm.h>
|
||||
@ -77,6 +77,8 @@ static const struct amlogic_locators amlogic_locators[] = {
|
||||
AMLOGIC_SDHC_OFFSET, AMLOGIC_SDHC_SIZE, 1, AMLOGIC_INTR_SDHC },
|
||||
{ "amlogicsdhc",
|
||||
AMLOGIC_SDHC_OFFSET, AMLOGIC_SDHC_SIZE, 2, AMLOGIC_INTR_SDHC },
|
||||
{ "amlogicrtc",
|
||||
AMLOGIC_RTC_OFFSET, AMLOGIC_RTC_SIZE, NOPORT, AMLOGIC_INTR_RTC },
|
||||
};
|
||||
|
||||
int
|
||||
|
||||
@ -1,4 +1,4 @@
|
||||
/* $NetBSD: amlogic_reg.h,v 1.9 2015/03/21 01:17:00 jmcneill Exp $ */
|
||||
/* $NetBSD: amlogic_reg.h,v 1.10 2015/03/22 17:28:22 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 Jared D. McNeill <jmcneill@invisible.ca>
|
||||
@ -63,6 +63,9 @@
|
||||
#define AMLOGIC_UART_SIZE 0x20
|
||||
#define AMLOGIC_UART_FREQ AMLOGIC_REF_FREQ
|
||||
|
||||
#define AMLOGIC_RTC_OFFSET 0x08100740
|
||||
#define AMLOGIC_RTC_SIZE 0x14
|
||||
|
||||
#define AMLOGIC_USB0_OFFSET 0x09040000
|
||||
#define AMLOGIC_USB1_OFFSET 0x090c0000
|
||||
#define AMLOGIC_USB_SIZE 0x40000
|
||||
|
||||
370
sys/arch/arm/amlogic/amlogic_rtc.c
Normal file
370
sys/arch/arm/amlogic/amlogic_rtc.c
Normal file
@ -0,0 +1,370 @@
|
||||
/* $NetBSD: amlogic_rtc.c,v 1.1 2015/03/22 17:28:22 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||||
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||||
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||||
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||
* POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
__KERNEL_RCSID(0, "$NetBSD: amlogic_rtc.c,v 1.1 2015/03/22 17:28:22 jmcneill Exp $");
|
||||
|
||||
#include <sys/param.h>
|
||||
#include <sys/atomic.h>
|
||||
#include <sys/device.h>
|
||||
#include <sys/kernel.h>
|
||||
#include <sys/systm.h>
|
||||
|
||||
#include <dev/clock_subr.h>
|
||||
|
||||
#include <arm/amlogic/amlogic_reg.h>
|
||||
#include <arm/amlogic/amlogic_rtcreg.h>
|
||||
#include <arm/amlogic/amlogic_var.h>
|
||||
|
||||
#define RESET_RETRY_TIMES 3
|
||||
#define RTC_COMM_DELAY 5
|
||||
#define RTC_RESET_DELAY 100
|
||||
#define RTC_STATIC_VALUE_INIT 0x180a /* XXX: MAGIC? */
|
||||
|
||||
struct amlogic_rtc_softc {
|
||||
device_t sc_dev;
|
||||
bus_space_tag_t sc_bst;
|
||||
bus_space_handle_t sc_bsh;
|
||||
struct todr_chip_handle sc_todr;
|
||||
int sc_osc_failed;
|
||||
unsigned int sc_busy;
|
||||
};
|
||||
|
||||
static int amlogic_rtc_match(device_t, cfdata_t, void *);
|
||||
static void amlogic_rtc_attach(device_t, device_t, void *);
|
||||
static int amlogic_rtc_todr_gettime(todr_chip_handle_t, struct timeval *);
|
||||
static int amlogic_rtc_todr_settime(todr_chip_handle_t, struct timeval *);
|
||||
|
||||
CFATTACH_DECL_NEW(amlogic_rtc, sizeof(struct amlogic_rtc_softc),
|
||||
amlogic_rtc_match, amlogic_rtc_attach, NULL, NULL);
|
||||
|
||||
#define RTC_WRITE(sc, reg, val) \
|
||||
bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
|
||||
#define RTC_READ(sc, reg) \
|
||||
bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
|
||||
|
||||
static inline void
|
||||
setbits(struct amlogic_rtc_softc *sc, uint32_t reg, uint32_t bits)
|
||||
{
|
||||
|
||||
RTC_WRITE(sc, reg, RTC_READ(sc, reg) | bits);
|
||||
}
|
||||
|
||||
static inline void
|
||||
clrbits(struct amlogic_rtc_softc *sc, uint32_t reg, uint32_t bits)
|
||||
{
|
||||
|
||||
RTC_WRITE(sc, reg, RTC_READ(sc, reg) & ~bits);
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_check_osc_clk(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
uint32_t cnt1, cnt2;
|
||||
|
||||
setbits(sc, AO_RTC_REG3, AO_RTC_REG3_COUNT_ALWAYS);
|
||||
|
||||
/*
|
||||
* Wait for 50uS. 32.768khz is 30.5uS. This should be long
|
||||
* enough for one full cycle of 32.768 khz.
|
||||
*/
|
||||
cnt1 = RTC_READ(sc, AO_RTC_REG2);
|
||||
delay(50);
|
||||
cnt2 = RTC_READ(sc, AO_RTC_REG2);
|
||||
|
||||
clrbits(sc, AO_RTC_REG3, AO_RTC_REG3_COUNT_ALWAYS);
|
||||
|
||||
return cnt1 == cnt2;
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_match(device_t parent, cfdata_t cf, void *aux)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
static void
|
||||
amlogic_rtc_attach(device_t parent, device_t self, void *aux)
|
||||
{
|
||||
struct amlogic_rtc_softc * const sc = device_private(self);
|
||||
struct amlogicio_attach_args * const aio = aux;
|
||||
const struct amlogic_locators * const loc = &aio->aio_loc;
|
||||
|
||||
sc->sc_dev = self;
|
||||
sc->sc_bst = aio->aio_core_bst;
|
||||
bus_space_subregion(aio->aio_core_bst, aio->aio_bsh,
|
||||
loc->loc_offset, loc->loc_size, &sc->sc_bsh);
|
||||
|
||||
sc->sc_osc_failed = amlogic_rtc_check_osc_clk(sc);
|
||||
|
||||
memset(&sc->sc_todr, 0, sizeof(sc->sc_todr));
|
||||
sc->sc_todr.cookie = sc;
|
||||
sc->sc_todr.todr_gettime = amlogic_rtc_todr_gettime;
|
||||
sc->sc_todr.todr_settime = amlogic_rtc_todr_settime;
|
||||
|
||||
aprint_naive("\n");
|
||||
aprint_normal(": RTC");
|
||||
if (sc->sc_osc_failed) {
|
||||
aprint_error(" battery not present or discharged\n");
|
||||
} else {
|
||||
aprint_normal("\n");
|
||||
todr_attach(&sc->sc_todr);
|
||||
}
|
||||
}
|
||||
|
||||
static void
|
||||
amlogic_rtc_sclk_pulse(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
|
||||
delay(RTC_COMM_DELAY);
|
||||
setbits(sc, AO_RTC_REG0, AO_RTC_REG0_SCLK);
|
||||
|
||||
delay(RTC_COMM_DELAY);
|
||||
clrbits(sc, AO_RTC_REG0, AO_RTC_REG0_SCLK);
|
||||
}
|
||||
|
||||
static void
|
||||
amlogic_rtc_send_bit(struct amlogic_rtc_softc *sc, uint32_t bitset)
|
||||
{
|
||||
|
||||
if (bitset)
|
||||
setbits(sc, AO_RTC_REG0, AO_RTC_REG0_SDI);
|
||||
else
|
||||
clrbits(sc, AO_RTC_REG0, AO_RTC_REG0_SDI);
|
||||
|
||||
amlogic_rtc_sclk_pulse(sc);
|
||||
}
|
||||
|
||||
#define SERIAL_ADDR_BITS 3
|
||||
#define SERIAL_DATA_BITS 32
|
||||
#define SERIAL_TYPE_ADDR (1 << (SERIAL_ADDR_BITS - 1))
|
||||
#define SERIAL_TYPE_DATA (1 << (SERIAL_DATA_BITS - 1))
|
||||
|
||||
static void
|
||||
amlogic_rtc_send_data(struct amlogic_rtc_softc *sc,
|
||||
uint32_t nextbit, uint32_t data)
|
||||
{
|
||||
|
||||
KASSERT(nextbit == SERIAL_TYPE_ADDR || nextbit == SERIAL_TYPE_DATA);
|
||||
|
||||
while (nextbit) {
|
||||
amlogic_rtc_send_bit(sc, data & nextbit);
|
||||
nextbit >>= 1;
|
||||
}
|
||||
}
|
||||
|
||||
static uint32_t
|
||||
amlogic_rtc_get_data(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
uint32_t data;
|
||||
size_t i;
|
||||
|
||||
data = 0;
|
||||
for (i = 0; i < SERIAL_DATA_BITS; i++) {
|
||||
amlogic_rtc_sclk_pulse(sc);
|
||||
data <<= 1;
|
||||
data |= __SHIFTOUT(RTC_READ(sc, AO_RTC_REG1), AO_RTC_REG1_SDO);
|
||||
}
|
||||
return data;
|
||||
}
|
||||
|
||||
enum serial_mode {
|
||||
SERIAL_MODE_READ,
|
||||
SERIAL_MODE_WRITE,
|
||||
};
|
||||
|
||||
static void
|
||||
amlogic_rtc_set_mode(struct amlogic_rtc_softc *sc, enum serial_mode mode)
|
||||
{
|
||||
|
||||
clrbits(sc, AO_RTC_REG0, AO_RTC_REG0_SEN);
|
||||
|
||||
switch(mode) {
|
||||
case SERIAL_MODE_READ:
|
||||
clrbits(sc, AO_RTC_REG0, AO_RTC_REG0_SDI);
|
||||
break;
|
||||
case SERIAL_MODE_WRITE:
|
||||
setbits(sc, AO_RTC_REG0, AO_RTC_REG0_SDI);
|
||||
break;
|
||||
default:
|
||||
KASSERT(1);
|
||||
return;
|
||||
}
|
||||
amlogic_rtc_sclk_pulse(sc);
|
||||
|
||||
clrbits(sc, AO_RTC_REG0, AO_RTC_REG0_SDI);
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_wait_s_ready(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
size_t s_nrdy_cnt, retry_cnt;
|
||||
|
||||
s_nrdy_cnt = 40000;
|
||||
retry_cnt = 0;
|
||||
while (!(RTC_READ(sc, AO_RTC_REG1) & AO_RTC_REG1_S_READY)) {
|
||||
if (s_nrdy_cnt-- == 0) {
|
||||
s_nrdy_cnt = 40000;
|
||||
if (retry_cnt++ == RESET_RETRY_TIMES)
|
||||
return 0;
|
||||
/* XXX: reset_s_ready? Linux does not. */
|
||||
setbits(sc, AO_RTC_REG1, AO_RTC_REG1_S_READY);
|
||||
delay(RTC_RESET_DELAY);
|
||||
}
|
||||
}
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_comm_init(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
|
||||
clrbits(sc, AO_RTC_REG0,
|
||||
AO_RTC_REG0_SEN | AO_RTC_REG0_SCLK | AO_RTC_REG0_SDI);
|
||||
|
||||
if (amlogic_rtc_wait_s_ready(sc)) {
|
||||
setbits(sc, AO_RTC_REG0, AO_RTC_REG0_SEN);
|
||||
return 0;
|
||||
}
|
||||
return -1;
|
||||
}
|
||||
|
||||
static void
|
||||
amlogic_rtc_static_register_write(struct amlogic_rtc_softc *sc, uint32_t data)
|
||||
{
|
||||
uint32_t u;
|
||||
|
||||
/* Program MSB 15-8 */
|
||||
u = RTC_READ(sc, AO_RTC_REG4);
|
||||
u &= AO_RTC_REG4_STATIC_REG_MSB;
|
||||
u |= __SHIFTIN(data, AO_RTC_REG4_STATIC_REG_MSB);
|
||||
RTC_WRITE(sc, AO_RTC_REG4, u);
|
||||
|
||||
/* Program LSB 7-0, and start serializing */
|
||||
u = RTC_READ(sc, AO_RTC_REG0);
|
||||
u &= ~AO_RTC_REG0_STATIC_REG_LSB;
|
||||
u |= __SHIFTIN(data, AO_RTC_REG0_STATIC_REG_LSB);
|
||||
u |= AO_RTC_REG0_SERIAL_START;
|
||||
RTC_WRITE(sc, AO_RTC_REG0, u);
|
||||
|
||||
/* Poll auto_serializer_busy bit until it's low (IDLE) */
|
||||
while ((RTC_READ(sc, AO_RTC_REG0) & AO_RTC_REG0_SERIAL_BUSY) != 0)
|
||||
continue;
|
||||
}
|
||||
|
||||
static void
|
||||
amlogic_rtc_reset(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
|
||||
amlogic_rtc_static_register_write(sc, RTC_STATIC_VALUE_INIT);
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_serial_init(struct amlogic_rtc_softc *sc)
|
||||
{
|
||||
size_t init_cnt, retry_cnt;
|
||||
|
||||
init_cnt = 0;
|
||||
retry_cnt = 0;
|
||||
while (amlogic_rtc_comm_init(sc) == -1) {
|
||||
if (init_cnt++ == RESET_RETRY_TIMES) {
|
||||
init_cnt = 0;
|
||||
if (retry_cnt++ == RESET_RETRY_TIMES) {
|
||||
aprint_error_dev(sc->sc_dev,
|
||||
"cannot init rtc\n");
|
||||
return -1;
|
||||
}
|
||||
amlogic_rtc_reset(sc);
|
||||
}
|
||||
delay(RTC_RESET_DELAY);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_serial_read(struct amlogic_rtc_softc *sc, uint32_t addr,
|
||||
uint32_t *sec)
|
||||
{
|
||||
|
||||
if (amlogic_rtc_serial_init(sc) == -1)
|
||||
return EIO;
|
||||
|
||||
amlogic_rtc_send_data(sc, SERIAL_TYPE_ADDR, addr);
|
||||
amlogic_rtc_set_mode(sc, SERIAL_MODE_READ);
|
||||
*sec = amlogic_rtc_get_data(sc);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_serial_write(struct amlogic_rtc_softc *sc, uint32_t addr,
|
||||
uint32_t data)
|
||||
{
|
||||
|
||||
if (amlogic_rtc_serial_init(sc) == -1)
|
||||
return EIO;
|
||||
|
||||
amlogic_rtc_send_data(sc, SERIAL_TYPE_DATA, data);
|
||||
amlogic_rtc_send_data(sc, SERIAL_TYPE_ADDR, addr);
|
||||
amlogic_rtc_set_mode(sc, SERIAL_MODE_WRITE);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_todr_gettime(todr_chip_handle_t ch, struct timeval *tv)
|
||||
{
|
||||
struct amlogic_rtc_softc * const sc = ch->cookie;
|
||||
uint32_t sec;
|
||||
int rv;
|
||||
|
||||
if (atomic_swap_uint(&sc->sc_busy, 1))
|
||||
return EBUSY; /* XXX: EAGAIN? */
|
||||
|
||||
rv = amlogic_rtc_serial_read(sc, RTC_COUNTER_ADDR, &sec);
|
||||
sc->sc_busy = 0;
|
||||
|
||||
if (rv == 0) {
|
||||
tv->tv_sec = sec;
|
||||
tv->tv_usec = 0;
|
||||
}
|
||||
return rv;
|
||||
}
|
||||
|
||||
static int
|
||||
amlogic_rtc_todr_settime(todr_chip_handle_t ch, struct timeval *tv)
|
||||
{
|
||||
struct amlogic_rtc_softc * const sc = ch->cookie;
|
||||
int rv;
|
||||
|
||||
if (atomic_swap_uint(&sc->sc_busy, 1))
|
||||
return EBUSY; /* XXX: EAGAIN? */
|
||||
|
||||
rv = amlogic_rtc_serial_write(sc, RTC_COUNTER_ADDR, tv->tv_sec);
|
||||
sc->sc_busy = 0;
|
||||
|
||||
return rv;
|
||||
}
|
||||
101
sys/arch/arm/amlogic/amlogic_rtcreg.h
Normal file
101
sys/arch/arm/amlogic/amlogic_rtcreg.h
Normal file
@ -0,0 +1,101 @@
|
||||
/* $NetBSD: amlogic_rtcreg.h,v 1.1 2015/03/22 17:28:22 jmcneill Exp $ */
|
||||
|
||||
/*-
|
||||
* Copyright (c) 2015 The NetBSD Foundation, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
|
||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
|
||||
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
|
||||
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef _ARM_AMLOGIC_RTCREG_H_
|
||||
#define _ARM_AMLOGIC_RTCREG_H_
|
||||
|
||||
#define AO_RTC_REG0 0x00
|
||||
#define AO_RTC_REG1 0x04
|
||||
#define AO_RTC_REG2 0x08
|
||||
#define AO_RTC_REG3 0x0c
|
||||
#define AO_RTC_REG4 0x10
|
||||
|
||||
#define AO_RTC_REG0_STATIC_REG_LSB __BITS(31,24)
|
||||
#define AO_RTC_REG0_UNUSED_23 __BIT(23)
|
||||
#define AO_RTC_REG0_SERIAL_BUSY __BIT(22)
|
||||
#define AO_RTC_REG0_UNUSED_21 __BIT(21)
|
||||
#define AO_RTC_REG0_SCLK_STATIC __BIT(20)
|
||||
#define AO_RTC_REG0_UNUSED_19_18 __BITS(19,18)
|
||||
#define AO_RTC_REG0_SERIAL_START __BIT(17)
|
||||
#define AO_RTC_REG0_ONE_SHOT_POLARITY __BIT(16)
|
||||
#define AO_RTC_REG0_RESERVED_15_11 __BIT(15,11)
|
||||
#define AO_RTC_REG0_UNUSED_10_8 __BITS(10,8)
|
||||
#define AO_RTC_REG0_RESERVED_7_6 __BIT(7,6)
|
||||
#define AO_RTC_REG0_TEST_MODE __BIT(5)
|
||||
#define AO_RTC_REG0_TEST_CLK __BIT(4)
|
||||
#define AO_RTC_REG0_TEST_BYPASS __BIT(3)
|
||||
#define AO_RTC_REG0_SDI __BIT(2)
|
||||
#define AO_RTC_REG0_SEN __BIT(1)
|
||||
#define AO_RTC_REG0_SCLK __BIT(0)
|
||||
|
||||
#define AO_RTC_REG1_UNUSED_31_16 __BITS(31,16)
|
||||
#define AO_RTC_REG1_RESERVED __BITS(15,12)
|
||||
#define AO_RTC_REG1_UNUSED_11_4 __BITS(11,4)
|
||||
#define AO_RTC_REG1_GPO_TO_DIG __BIT(3)
|
||||
#define AO_RTC_REG1_GPI_TO_DIG __BIT(2)
|
||||
#define AO_RTC_REG1_S_READY __BIT(1)
|
||||
#define AO_RTC_REG1_SDO __BIT(0)
|
||||
|
||||
#define AO_RTC_REG2_OSC_CLK_COUNT __BITS(31,0)
|
||||
|
||||
#define AO_RTC_REG3_UNUSED_31_30 __BITS(31,30)
|
||||
#define AO_RTC_REG3_USE_CLK_TB __BIT(29)
|
||||
#define AO_RTC_REG3_USE_NIKE_D_RTC __BIT(28)
|
||||
#define AO_RTC_REG3_AUTO_TB_SEL __BITS(27,26)
|
||||
#define AO_RTC_REG3_FILTER_SEL __BITS(25,23)
|
||||
#define AO_RTC_REG3_FILTER_TB __BITS(22,21)
|
||||
#define AO_RTC_REG3_MSR_BUSY __BIT(20)
|
||||
#define AO_RTC_REG3_UNUSED_19 __BIT(19)
|
||||
#define AO_RTC_REG3_FAST_CLK_MODE __BIT(18)
|
||||
#define AO_RTC_REG3_COUNT_ALWAYS __BIT(17)
|
||||
#define AO_RTC_REG3_MSR_EN __BIT(16)
|
||||
#define AO_RTC_REG3_MSR_GATE_TIME __BIT(15,0)
|
||||
|
||||
#define AO_RTC_REG4_UNUSED __BITS(31,8)
|
||||
#define AO_RTC_REG4_STATIC_REG_MSB __BITS(7,0)
|
||||
|
||||
/* Define RTC register address mapping */
|
||||
#define RTC_COUNTER_ADDR 0
|
||||
#define RTC_GPO_COUNTER_ADDR 1
|
||||
#define RTC_SEC_ADJUST_ADDR 2
|
||||
#define RTC_UNUSED_ADDR 3
|
||||
#define RTC_REGMEM_ADDR0 4
|
||||
#define RTC_REGMEM_ADDR1 5
|
||||
#define RTC_REGMEM_ADDR2 6
|
||||
#define RTC_REGMEM_ADDR3 7
|
||||
|
||||
#define RTC_COUNTER_VALUE __BITS(31,0)
|
||||
#define RTC_SEC_ADJUST_PENDING __BIT(25)
|
||||
#define RTC_SEC_ADJUST_INC __BIT(24)
|
||||
#define RTC_SEC_ADJUST_VALID __BIT(23)
|
||||
#define RTC_SEC_ADJUST_MONITOR __BIT(22)
|
||||
#define RTC_SEC_ADJUST_RESERVED __BIT(21)
|
||||
#define RTC_SEC_ADJUST_CTRL __BITS(20,19)
|
||||
#define RTC_SEC_ADJUST_COUNTER __BITS(18,0)
|
||||
|
||||
#endif /* _ARM_AMLOGIC_RTCREG_H_ */
|
||||
@ -1,4 +1,4 @@
|
||||
# $NetBSD: files.amlogic,v 1.8 2015/03/21 01:17:00 jmcneill Exp $
|
||||
# $NetBSD: files.amlogic,v 1.9 2015/03/22 17:28:22 jmcneill Exp $
|
||||
#
|
||||
# Configuration info for Amlogic ARM Peripherals
|
||||
#
|
||||
@ -48,6 +48,11 @@ device amlogicrng
|
||||
attach amlogicrng at amlogicio with amlogic_rng
|
||||
file arch/arm/amlogic/amlogic_rng.c amlogic_rng
|
||||
|
||||
# RTC
|
||||
device amlogicrtc
|
||||
attach amlogicrtc at amlogicio with amlogic_rtc
|
||||
file arch/arm/amlogic/amlogic_rtc.c amlogic_rtc
|
||||
|
||||
# Console parameters
|
||||
defparam opt_amlogic.h CONADDR
|
||||
defparam opt_amlogic.h CONSPEED
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
#
|
||||
# $NetBSD: ODROID-C1,v 1.12 2015/03/21 01:17:00 jmcneill Exp $
|
||||
# $NetBSD: ODROID-C1,v 1.13 2015/03/22 17:28:22 jmcneill Exp $
|
||||
#
|
||||
# Odroid-C1 (Amlogic S805) based SBC (Single Board Computer)
|
||||
#
|
||||
@ -196,6 +196,9 @@ pseudo-device wsfont
|
||||
# Hardware random number generator
|
||||
amlogicrng0 at amlogicio0
|
||||
|
||||
# Real-time clock
|
||||
amlogicrtc0 at amlogicio0
|
||||
|
||||
# SDHC controller
|
||||
amlogicsdhc0 at amlogicio0
|
||||
sdmmc* at amlogicsdhc?
|
||||
|
||||
Loading…
Reference in New Issue
Block a user