- Use PMAD-BA name for device match logic. It's not a real TURBOchannel
device and the id string is not found in option ROM string, but ULTRIX/OSF1 call it so anyway. - Squash IOASIC DMA buffer allocation into device attach() sequence.
This commit is contained in:
nisimura
parent
77e30d85bf
commit
4f051180a0
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@ -1,4 +1,4 @@
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/* $NetBSD: ioasic.c,v 1.32 2000/06/05 21:47:30 thorpej Exp $ */
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/* $NetBSD: ioasic.c,v 1.33 2000/07/11 04:10:25 nisimura Exp $ */
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/*-
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* Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
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@ -68,7 +68,7 @@
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.32 2000/06/05 21:47:30 thorpej Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.33 2000/07/11 04:10:25 nisimura Exp $");
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#include <sys/param.h>
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#include <sys/kernel.h>
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@ -108,8 +108,7 @@ int ioasic_intrnull __P((void *));
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#define IOASIC_NCOOKIES 4
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struct ioasic_dev ioasic_devs[] = {
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/* XXX lance name */
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{ "lance", IOASIC_SLOT_3_START, C(IOASIC_DEV_LANCE),
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{ "PMAD-BA ", IOASIC_SLOT_3_START, C(IOASIC_DEV_LANCE),
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IOASIC_INTR_LANCE, },
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{ "z8530 ", IOASIC_SLOT_4_START, C(IOASIC_DEV_SCC0),
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IOASIC_INTR_SCC_0, },
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@ -1,4 +1,4 @@
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/* $NetBSD: ioasic.c,v 1.13 2000/06/04 19:14:55 cgd Exp $ */
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/* $NetBSD: ioasic.c,v 1.14 2000/07/11 04:10:25 nisimura Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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@ -28,7 +28,7 @@
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*/
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#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
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__KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.13 2000/06/04 19:14:55 cgd Exp $");
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__KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.14 2000/07/11 04:10:25 nisimura Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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@ -53,11 +53,11 @@ __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.13 2000/06/04 19:14:55 cgd Exp $");
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#if defined(DEC_3MIN)
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static struct ioasic_dev kmin_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(SYS_DEV_LANCE), IOASIC_INTR_LANCE, },
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{ "scc", 0x100000, C(SYS_DEV_SCC0), IOASIC_INTR_SCC_0, },
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{ "scc", 0x180000, C(SYS_DEV_SCC1), IOASIC_INTR_SCC_1, },
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{ "mc146818", 0x200000, C(SYS_DEV_BOGUS), 0 },
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{ "asc", 0x300000, C(SYS_DEV_SCSI), IOASIC_INTR_SCSI, },
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{ "PMAD-BA ", 0x0C0000, C(SYS_DEV_LANCE), },
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{ "scc", 0x100000, C(SYS_DEV_SCC0), },
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{ "scc", 0x180000, C(SYS_DEV_SCC1), },
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{ "mc146818", 0x200000, C(SYS_DEV_BOGUS), },
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{ "asc", 0x300000, C(SYS_DEV_SCSI), },
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};
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static int kmin_builtin_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
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static int kmin_ioasic_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
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@ -65,16 +65,16 @@ static int kmin_ioasic_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
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#if defined(DEC_MAXINE)
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static struct ioasic_dev xine_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(SYS_DEV_LANCE), IOASIC_INTR_LANCE },
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{ "scc", 0x100000, C(SYS_DEV_SCC0), IOASIC_INTR_SCC_0 },
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{ "mc146818", 0x200000, C(SYS_DEV_BOGUS), 0 },
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{ "isdn", 0x240000, C(SYS_DEV_ISDN), XINE_INTR_ISDN, },
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{ "dtop", 0x280000, C(SYS_DEV_DTOP), XINE_INTR_DTOP, },
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{ "fdc", 0x2C0000, C(SYS_DEV_FDC), 0 },
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{ "asc", 0x300000, C(SYS_DEV_SCSI), IOASIC_INTR_SCSI, },
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{ "(TC0)", 0x0, C(SYS_DEV_OPT0), XINE_INTR_TC_0, },
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{ "(TC1)", 0x0, C(SYS_DEV_OPT1), XINE_INTR_TC_1, },
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{ "(TC2)", 0x0, C(SYS_DEV_OPT2), XINE_INTR_VINT, },
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{ "PMAD-BA ", 0x0C0000, C(SYS_DEV_LANCE), },
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{ "scc", 0x100000, C(SYS_DEV_SCC0), },
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{ "mc146818", 0x200000, C(SYS_DEV_BOGUS), },
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{ "isdn", 0x240000, C(SYS_DEV_ISDN), },
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{ "dtop", 0x280000, C(SYS_DEV_DTOP), },
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{ "fdc", 0x2C0000, C(SYS_DEV_FDC), },
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{ "asc", 0x300000, C(SYS_DEV_SCSI), },
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{ "(TC0)", 0x0, C(SYS_DEV_OPT0), },
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{ "(TC1)", 0x0, C(SYS_DEV_OPT1), },
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{ "(TC2)", 0x0, C(SYS_DEV_OPT2), },
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};
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static int xine_builtin_ndevs = ARRAY_SIZEOF(xine_ioasic_devs) - 3;
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static int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs);
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@ -82,14 +82,14 @@ static int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs);
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#if defined(DEC_3MAXPLUS)
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static struct ioasic_dev kn03_ioasic_devs[] = {
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{ "lance", 0x0C0000, C(SYS_DEV_LANCE), IOASIC_INTR_LANCE, },
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{ "z8530 ", 0x100000, C(SYS_DEV_SCC0), IOASIC_INTR_SCC_0, },
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{ "z8530 ", 0x180000, C(SYS_DEV_SCC1), IOASIC_INTR_SCC_1, },
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{ "mc146818", 0x200000, C(SYS_DEV_BOGUS), 0, },
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{ "asc", 0x300000, C(SYS_DEV_SCSI), IOASIC_INTR_SCSI, },
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{ "(TC0)", 0x0, C(SYS_DEV_OPT0), KN03_INTR_TC_0, },
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{ "(TC1)", 0x0, C(SYS_DEV_OPT1), KN03_INTR_TC_1, },
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{ "(TC2)", 0x0, C(SYS_DEV_OPT2), KN03_INTR_TC_2, },
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{ "PMAD-BA ", 0x0C0000, C(SYS_DEV_LANCE), },
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{ "z8530 ", 0x100000, C(SYS_DEV_SCC0), },
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{ "z8530 ", 0x180000, C(SYS_DEV_SCC1), },
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{ "mc146818", 0x200000, C(SYS_DEV_BOGUS), },
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{ "asc", 0x300000, C(SYS_DEV_SCSI), },
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{ "(TC0)", 0x0, C(SYS_DEV_OPT0), },
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{ "(TC1)", 0x0, C(SYS_DEV_OPT1), },
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{ "(TC2)", 0x0, C(SYS_DEV_OPT2), },
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};
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static int kn03_builtin_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs) - 3;
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static int kn03_ioasic_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs);
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@ -134,7 +134,6 @@ ioasicattach(parent, self, aux)
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struct tc_attach_args *ta = aux;
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struct ioasic_dev *ioasic_devs;
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int ioasic_ndevs, builtin_ndevs;
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int i, imsk;
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ioasicfound = 1;
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@ -176,14 +175,16 @@ ioasicattach(parent, self, aux)
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panic("ioasicmatch: how did we get here?");
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}
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#if 0 /* IMSK has been sanitized */
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/*
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* Turn off all device interrupt bits.
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* (This _does_ include TC option slot bits.
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* (This _does_ include TC option slot bits.)
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*/
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imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
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for (i = 0; i < ioasic_ndevs; i++)
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imsk &= ~ioasic_devs[i].iad_intrbits;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
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#endif
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/*
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* Try to configure each device.
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@ -201,7 +202,6 @@ ioasic_intr_evcnt(dev, cookie)
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return NULL;
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}
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#if 1 /* XXX for now XXX */
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void
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ioasic_intr_establish(dev, cookie, level, handler, val)
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struct device *dev;
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{
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(*platform.intr_establish)(dev, cookie, level, handler, val);
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}
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#else /* XXX eventually XXX */
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void
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ioasic_intr_establish(ioa, cookie, level, func, arg)
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struct device *ioa;
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void *cookie, *arg;
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int level;
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int (*func) __P((void *));
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{
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struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0];
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int i, intrbits;
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for (i = 0; i < ioasic_ndevs; i++) {
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if (ioasic_devs[i].iad_cookie == cookie)
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goto found;
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}
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panic("ioasic_intr_establish: invalid cookie %d", (int)cookie);
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found:
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intrtab[(int)cookie].ih_func = func;
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intrtab[(int)cookie].ih_arg = arg;
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intrbits = ioasic_devs[i].iad_intrbits;
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i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
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i |= intrbits;
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bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i);
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}
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: if_le_ioasic.c,v 1.15 2000/03/30 12:45:43 augustss Exp $ */
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/* $NetBSD: if_le_ioasic.c,v 1.16 2000/07/11 04:10:25 nisimura Exp $ */
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/*
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* Copyright (c) 1996 Carnegie-Mellon University.
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@ -32,7 +32,7 @@
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*/
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#include <sys/cdefs.h> /* RCS ID & macro defns */
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__KERNEL_RCSID(0, "$NetBSD: if_le_ioasic.c,v 1.15 2000/03/30 12:45:43 augustss Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_le_ioasic.c,v 1.16 2000/07/11 04:10:25 nisimura Exp $");
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#include "opt_inet.h"
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@ -62,11 +62,14 @@ __KERNEL_RCSID(0, "$NetBSD: if_le_ioasic.c,v 1.15 2000/03/30 12:45:43 augustss E
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#include <dev/tc/ioasicreg.h>
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#include <dev/tc/ioasicvar.h>
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#if defined(_KERNEL) && !defined(_LKM)
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#include "opt_ddb.h"
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#endif
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struct le_ioasic_softc {
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struct am7990_softc sc_am7990; /* glue to MI code */
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struct lereg1 *sc_r1; /* LANCE registers */
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/* XXX must match with le_softc of if_levar.h XXX */
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caddr_t le_iomem;
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bus_dma_tag_t sc_dmat; /* bus dma tag */
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bus_dmamap_t sc_dmamap; /* bus dmamap */
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};
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static int le_ioasic_match __P((struct device *, struct cfdata *, void *));
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static void le_ioasic_attach __P((struct device *, struct device *, void *));
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@ -75,29 +78,17 @@ struct cfattach le_ioasic_ca = {
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sizeof(struct le_softc), le_ioasic_match, le_ioasic_attach
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};
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static void ioasic_lance_dma_setup __P((struct device *));
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static char *ioasic_lance_ether_address __P((void));
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#ifdef DDB
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#define integrate
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#define hide
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#else
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#define integrate static __inline
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#define hide static
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#endif
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hide void le_ioasic_copytobuf_gap2 __P((struct lance_softc *, void *,
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static void le_ioasic_copytobuf_gap2 __P((struct lance_softc *, void *,
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int, int));
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hide void le_ioasic_copyfrombuf_gap2 __P((struct lance_softc *, void *,
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static void le_ioasic_copyfrombuf_gap2 __P((struct lance_softc *, void *,
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int, int));
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static void le_ioasic_copytobuf_gap16 __P((struct lance_softc *, void *,
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int, int));
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static void le_ioasic_copyfrombuf_gap16 __P((struct lance_softc *, void *,
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int, int));
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static void le_ioasic_zerobuf_gap16 __P((struct lance_softc *, int, int));
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hide void le_ioasic_copytobuf_gap16 __P((struct lance_softc *, void *,
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int, int));
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hide void le_ioasic_copyfrombuf_gap16 __P((struct lance_softc *, void *,
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int, int));
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hide void le_ioasic_zerobuf_gap16 __P((struct lance_softc *, int, int));
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int
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static int
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le_ioasic_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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@ -105,44 +96,93 @@ le_ioasic_match(parent, match, aux)
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{
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struct ioasicdev_attach_args *d = aux;
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if (!ioasic_submatch(match, aux))
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return (0);
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if (strncmp("lance", d->iada_modname, TC_ROM_LLEN))
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return (0);
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if (strncmp("PMAD-BA ", d->iada_modname, TC_ROM_LLEN) != 0)
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return 0;
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return (1);
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return 1;
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}
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void
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/* IOASIC LANCE DMA needs 128KB boundary aligned 128KB chunk */
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#define LE_IOASIC_MEMSIZE (128*1024)
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#define LE_IOASIC_MEMALIGN (128*1024)
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static void
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le_ioasic_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct le_ioasic_softc *sc = (void *)self;
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struct ioasicdev_attach_args *d = aux;
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struct le_softc *lesc = (void *)self;
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struct lance_softc *sc = &lesc->sc_am7990.lsc;
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struct lance_softc *le = &sc->sc_am7990.lsc;
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bus_space_tag_t ioasic_bst;
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bus_space_handle_t ioasic_bsh;
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bus_dma_tag_t dmat;
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bus_dma_segment_t seg;
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tc_addr_t tca;
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u_int32_t ssr;
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int rseg;
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caddr_t le_iomem;
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ioasic_lance_dma_setup(parent);
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if (le_iomem == 0) {
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printf("%s: DMA area not set up\n", sc->sc_dev.dv_xname);
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ioasic_bst = ((struct ioasic_softc *)parent)->sc_bst;
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ioasic_bsh = ((struct ioasic_softc *)parent)->sc_bsh;
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dmat = sc->sc_dmat = ((struct ioasic_softc *)parent)->sc_dmat;
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/*
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* Allocate a DMA area for the chip.
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*/
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if (bus_dmamem_alloc(dmat, LE_IOASIC_MEMSIZE, LE_IOASIC_MEMALIGN,
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0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) {
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printf("can't allocate DMA area for LANCE\n");
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return;
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}
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if (bus_dmamem_map(dmat, &seg, rseg, LE_IOASIC_MEMSIZE,
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&le_iomem, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
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printf("can't map DMA area for LANCE\n");
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bus_dmamem_free(dmat, &seg, rseg);
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return;
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}
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/*
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* Create and load the DMA map for the DMA area.
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*/
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if (bus_dmamap_create(dmat, LE_IOASIC_MEMSIZE, 1,
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LE_IOASIC_MEMSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_dmamap)) {
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printf("can't create DMA map\n");
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goto bad;
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}
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if (bus_dmamap_load(dmat, sc->sc_dmamap,
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le_iomem, LE_IOASIC_MEMSIZE, NULL, BUS_DMA_NOWAIT)) {
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printf("can't load DMA map\n");
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goto bad;
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}
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/*
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* Bind 128KB buffer with IOASIC DMA.
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*/
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tca = (tc_addr_t)sc->sc_dmamap->dm_segs[0].ds_addr;
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tca = ((tca << 3) & ~0x1f) | ((tca >> 29) & 0x1f);
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bus_space_write_4(ioasic_bst, ioasic_bsh, IOASIC_LANCE_DMAPTR, tca);
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ssr = bus_space_read_4(ioasic_bst, ioasic_bsh, IOASIC_CSR);
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ssr |= IOASIC_CSR_DMAEN_LANCE;
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bus_space_write_4(ioasic_bst, ioasic_bsh, IOASIC_CSR, ssr);
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lesc->sc_r1 = (struct lereg1 *)
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sc->sc_r1 = (struct lereg1 *)
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TC_DENSE_TO_SPARSE(TC_PHYS_TO_UNCACHED(d->iada_addr));
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sc->sc_mem = (void *)TC_PHYS_TO_UNCACHED(le_iomem);
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le->sc_mem = (void *)TC_PHYS_TO_UNCACHED(le_iomem);
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le->sc_copytodesc = le_ioasic_copytobuf_gap2;
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le->sc_copyfromdesc = le_ioasic_copyfrombuf_gap2;
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le->sc_copytobuf = le_ioasic_copytobuf_gap16;
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le->sc_copyfrombuf = le_ioasic_copyfrombuf_gap16;
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le->sc_zerobuf = le_ioasic_zerobuf_gap16;
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sc->sc_copytodesc = le_ioasic_copytobuf_gap2;
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sc->sc_copyfromdesc = le_ioasic_copyfrombuf_gap2;
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sc->sc_copytobuf = le_ioasic_copytobuf_gap16;
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sc->sc_copyfrombuf = le_ioasic_copyfrombuf_gap16;
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sc->sc_zerobuf = le_ioasic_zerobuf_gap16;
|
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dec_le_common_attach(&lesc->sc_am7990, ioasic_lance_ether_address());
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dec_le_common_attach(&sc->sc_am7990,
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(u_char *)((struct ioasic_softc *)parent)->sc_base
|
||||
+ IOASIC_SLOT_2_START);
|
||||
|
||||
ioasic_intr_establish(parent, d->iada_cookie, TC_IPL_NET,
|
||||
am7990_intr, sc);
|
||||
return;
|
||||
|
||||
bad:
|
||||
bus_dmamem_unmap(dmat, le_iomem, LE_IOASIC_MEMSIZE);
|
||||
bus_dmamem_free(dmat, &seg, rseg);
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -403,70 +443,3 @@ le_ioasic_zerobuf_gap16(sc, boff, len)
|
|||
xfer = min(len, 16);
|
||||
}
|
||||
}
|
||||
|
||||
#define LE_IOASIC_MEMSIZE (128*1024)
|
||||
#define LE_IOASIC_MEMALIGN (128*1024)
|
||||
|
||||
void
|
||||
ioasic_lance_dma_setup(parent)
|
||||
struct device *parent;
|
||||
{
|
||||
struct ioasic_softc *sc = (void *)parent;
|
||||
bus_dma_tag_t dmat = sc->sc_dmat;
|
||||
bus_dma_segment_t seg;
|
||||
tc_addr_t tca;
|
||||
u_int32_t ssr;
|
||||
int rseg;
|
||||
|
||||
/*
|
||||
* Allocate a DMA area for the chip.
|
||||
*/
|
||||
if (bus_dmamem_alloc(dmat, LE_IOASIC_MEMSIZE, LE_IOASIC_MEMALIGN,
|
||||
0, &seg, 1, &rseg, BUS_DMA_NOWAIT)) {
|
||||
printf("%s: can't allocate DMA area for LANCE\n",
|
||||
sc->sc_dv.dv_xname);
|
||||
return;
|
||||
}
|
||||
if (bus_dmamem_map(dmat, &seg, rseg, LE_IOASIC_MEMSIZE,
|
||||
&le_iomem, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) {
|
||||
printf("%s: can't map DMA area for LANCE\n",
|
||||
sc->sc_dv.dv_xname);
|
||||
bus_dmamem_free(dmat, &seg, rseg);
|
||||
return;
|
||||
}
|
||||
|
||||
/*
|
||||
* Create and load the DMA map for the DMA area.
|
||||
*/
|
||||
if (bus_dmamap_create(dmat, LE_IOASIC_MEMSIZE, 1,
|
||||
LE_IOASIC_MEMSIZE, 0, BUS_DMA_NOWAIT, &sc->sc_lance_dmam)) {
|
||||
printf("%s: can't create DMA map\n", sc->sc_dv.dv_xname);
|
||||
goto bad;
|
||||
}
|
||||
if (bus_dmamap_load(dmat, sc->sc_lance_dmam,
|
||||
le_iomem, LE_IOASIC_MEMSIZE, NULL, BUS_DMA_NOWAIT)) {
|
||||
printf("%s: can't load DMA map\n", sc->sc_dv.dv_xname);
|
||||
goto bad;
|
||||
}
|
||||
|
||||
tca = (tc_addr_t)sc->sc_lance_dmam->dm_segs[0].ds_addr;
|
||||
tca = ((tca << 3) & ~0x1f) | ((tca >> 29) & 0x1f);
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_LANCE_DMAPTR, tca);
|
||||
ssr = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR);
|
||||
ssr |= IOASIC_CSR_DMAEN_LANCE;
|
||||
bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_CSR, ssr);
|
||||
return;
|
||||
|
||||
bad:
|
||||
bus_dmamem_unmap(dmat, le_iomem, LE_IOASIC_MEMSIZE);
|
||||
bus_dmamem_free(dmat, &seg, rseg);
|
||||
le_iomem = 0;
|
||||
}
|
||||
|
||||
/* XXX */
|
||||
char *
|
||||
ioasic_lance_ether_address()
|
||||
{
|
||||
|
||||
return (char *)(ioasic_base + IOASIC_SLOT_2_START);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue