Use the bus_space_*_stream_* methods to access the chip's registers.

As we turn the chip to big-endian mode on big-endian systems, we should
never byte-swap the data read/written from/to registers. Tested on sparc64.
Finally fix kern/13341 by Jason R. Thorpe (really, the hard work of putting
bus_dmamap_sync() calls at the right places has been done my Jason mid-2001 :)
This commit is contained in:
bouyer 2004-03-18 23:20:32 +00:00
parent 55c19744c4
commit 4f04c7872f
2 changed files with 21 additions and 3 deletions

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_ti.c,v 1.59 2004/03/18 22:45:35 bouyer Exp $ */
/* $NetBSD: if_ti.c,v 1.60 2004/03/18 23:20:32 bouyer Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
@ -81,7 +81,7 @@
*/
#include <sys/cdefs.h>
__KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.59 2004/03/18 22:45:35 bouyer Exp $");
__KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.60 2004/03/18 23:20:32 bouyer Exp $");
#include "bpfilter.h"
#include "opt_inet.h"
@ -386,9 +386,16 @@ static void ti_mem(sc, addr, len, buf)
TI_WINDOW + (segptr & (TI_WINLEN - 1)), 0,
segsize / 4);
} else {
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
bus_space_write_region_stream_4(sc->ti_btag,
sc->ti_bhandle,
TI_WINDOW + (segptr & (TI_WINLEN - 1)),
(u_int32_t *)ptr, segsize / 4);
#else
bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
TI_WINDOW + (segptr & (TI_WINLEN - 1)),
(u_int32_t *)ptr, segsize / 4);
#endif
ptr += segsize;
}
segptr += segsize;

View File

@ -1,4 +1,4 @@
/* $NetBSD: if_tireg.h,v 1.12 2003/05/14 13:03:36 wiz Exp $ */
/* $NetBSD: if_tireg.h,v 1.13 2004/03/18 23:20:32 bouyer Exp $ */
/*
* Copyright (c) 1997, 1998, 1999
@ -966,13 +966,24 @@ struct ti_event_desc {
/*
* Register access macros. The Tigon always uses memory mapped register
* accesses and all registers must be accessed with 32 bit operations.
* The Tigon can operate in big-endian mode, so we always write to the
* registers in native byte order. We assume that all big-endian hosts
* with a PCI bus have __BUS_SPACE_HAS_STREAM_METHODS defined.
*/
#ifdef __BUS_SPACE_HAS_STREAM_METHODS
#define CSR_WRITE_4(sc, reg, val) \
bus_space_write_stream_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))
#define CSR_READ_4(sc, reg) \
bus_space_read_stream_4(sc->ti_btag, sc->ti_bhandle, (reg))
#else
#define CSR_WRITE_4(sc, reg, val) \
bus_space_write_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))
#define CSR_READ_4(sc, reg) \
bus_space_read_4(sc->ti_btag, sc->ti_bhandle, (reg))
#endif
#define TI_SETBIT(sc, reg, x) \
CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) | (x)))