Use the bus_space_*_stream_* methods to access the chip's registers.
As we turn the chip to big-endian mode on big-endian systems, we should never byte-swap the data read/written from/to registers. Tested on sparc64. Finally fix kern/13341 by Jason R. Thorpe (really, the hard work of putting bus_dmamap_sync() calls at the right places has been done my Jason mid-2001 :)
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@ -1,4 +1,4 @@
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/* $NetBSD: if_ti.c,v 1.59 2004/03/18 22:45:35 bouyer Exp $ */
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/* $NetBSD: if_ti.c,v 1.60 2004/03/18 23:20:32 bouyer Exp $ */
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/*
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* Copyright (c) 1997, 1998, 1999
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@ -81,7 +81,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.59 2004/03/18 22:45:35 bouyer Exp $");
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__KERNEL_RCSID(0, "$NetBSD: if_ti.c,v 1.60 2004/03/18 23:20:32 bouyer Exp $");
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#include "bpfilter.h"
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#include "opt_inet.h"
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@ -386,9 +386,16 @@ static void ti_mem(sc, addr, len, buf)
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TI_WINDOW + (segptr & (TI_WINLEN - 1)), 0,
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segsize / 4);
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} else {
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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bus_space_write_region_stream_4(sc->ti_btag,
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sc->ti_bhandle,
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TI_WINDOW + (segptr & (TI_WINLEN - 1)),
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(u_int32_t *)ptr, segsize / 4);
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#else
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bus_space_write_region_4(sc->ti_btag, sc->ti_bhandle,
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TI_WINDOW + (segptr & (TI_WINLEN - 1)),
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(u_int32_t *)ptr, segsize / 4);
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#endif
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ptr += segsize;
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}
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segptr += segsize;
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@ -1,4 +1,4 @@
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/* $NetBSD: if_tireg.h,v 1.12 2003/05/14 13:03:36 wiz Exp $ */
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/* $NetBSD: if_tireg.h,v 1.13 2004/03/18 23:20:32 bouyer Exp $ */
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/*
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* Copyright (c) 1997, 1998, 1999
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@ -966,13 +966,24 @@ struct ti_event_desc {
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/*
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* Register access macros. The Tigon always uses memory mapped register
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* accesses and all registers must be accessed with 32 bit operations.
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* The Tigon can operate in big-endian mode, so we always write to the
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* registers in native byte order. We assume that all big-endian hosts
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* with a PCI bus have __BUS_SPACE_HAS_STREAM_METHODS defined.
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*/
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#ifdef __BUS_SPACE_HAS_STREAM_METHODS
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_stream_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))
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#define CSR_READ_4(sc, reg) \
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bus_space_read_stream_4(sc->ti_btag, sc->ti_bhandle, (reg))
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#else
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#define CSR_WRITE_4(sc, reg, val) \
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bus_space_write_4(sc->ti_btag, sc->ti_bhandle, (reg), (val))
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#define CSR_READ_4(sc, reg) \
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bus_space_read_4(sc->ti_btag, sc->ti_bhandle, (reg))
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#endif
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#define TI_SETBIT(sc, reg, x) \
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CSR_WRITE_4(sc, (reg), (CSR_READ_4(sc, (reg)) | (x)))
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