Split si & sw attach routines, and make the si part use the new VME interface.
This commit is contained in:
pk
parent
f8ba1e0bd9
commit
4efb52487a
@ -1,4 +1,4 @@
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/* $NetBSD: si.c,v 1.41 1998/01/12 20:23:56 thorpej Exp $ */
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/* $NetBSD: si.c,v 1.42 1998/01/25 16:37:08 pk Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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@ -104,6 +104,7 @@
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <machine/autoconf.h>
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#include <machine/cpu.h>
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#include <machine/pmap.h>
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@ -111,6 +112,8 @@
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#include <sparc/sparc/vaddrs.h>
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#include <sparc/sparc/cpuvar.h>
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#include <dev/vme/vmevar.h>
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#include <dev/scsipi/scsi_all.h>
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#include <dev/scsipi/scsipi_all.h>
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#include <dev/scsipi/scsipi_debug.h>
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@ -204,9 +207,14 @@ int sw_options = SI_ENABLE_DMA;
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int si_dma_intr_timo = 500; /* ticks (sec. X 100) */
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static int si_match __P((struct device *, struct cfdata *, void *));
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static int sw_match __P((struct device *, struct cfdata *, void *));
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static void si_attach __P((struct device *, struct device *, void *));
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static void sw_attach __P((struct device *, struct device *, void *));
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static void si_attach_common __P((struct device *, struct si_softc *));
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static int si_intr __P((void *));
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static void si_reset_adapter __P((struct ncr5380_softc *));
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static void sw_reset_adapter __P((struct ncr5380_softc *));
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static void (*reset_adapter) __P((struct ncr5380_softc *));
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static void si_minphys __P((struct buf *));
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void si_dma_alloc __P((struct ncr5380_softc *));
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@ -253,9 +261,34 @@ struct cfattach si_ca = {
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/* The Sun "SCSI Weird" 4/100 obio controller. */
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struct cfattach sw_ca = {
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sizeof(struct si_softc), si_match, si_attach
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sizeof(struct si_softc), sw_match, sw_attach
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};
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static int
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sw_match(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct confargs *ca = aux;
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struct romaux *ra = &ca->ca_ra;
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/* Nothing but a Sun 4/100 is going to have these devices. */
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if (cpuinfo.cpu_type != CPUTYP_4_100)
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return (0);
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/*
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* Default interrupt priority always is 3. At least, that's
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* what my board seems to be at. --thorpej
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*/
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if (ra->ra_intr[0].int_pri == -1)
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ra->ra_intr[0].int_pri = 3;
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/* Make sure there is something there... */
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return (probeget(ra->ra_vaddr + 1, 1) != -1);
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}
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static int
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si_match(parent, cf, aux)
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struct device *parent;
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@ -265,12 +298,8 @@ si_match(parent, cf, aux)
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struct confargs *ca = aux;
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struct romaux *ra = &ca->ca_ra;
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/* Are we looking for the right thing? */
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if (strcmp(cf->cf_driver->cd_name, ra->ra_name))
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return (0);
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/* Nothing but a Sun 4 is going to have these devices. */
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if (!CPU_ISSUN4)
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if (!CPU_ISSUN4 || cpuinfo.cpu_type == CPUTYP_4_100)
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return (0);
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/*
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@ -280,27 +309,6 @@ si_match(parent, cf, aux)
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if (ra->ra_intr[0].int_pri == -1)
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ra->ra_intr[0].int_pri = 3;
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/* Figure out the bus type and look for the appropriate adapter. */
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switch (ca->ca_bustype) {
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case BUS_VME16:
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/* AFAIK, the `si' can only exist on the vmes. */
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if (strcmp(ra->ra_name, "si") ||
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cpuinfo.cpu_type == CPUTYP_4_100)
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return (0);
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break;
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case BUS_OBIO:
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/* AFAIK, an `sw' can only exist on the obio. */
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if (strcmp(ra->ra_name, "sw") ||
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cpuinfo.cpu_type != CPUTYP_4_100)
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return (0);
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break;
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default:
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/* Don't know what we ended up with ... */
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return (0);
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}
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/* Make sure there is something there... */
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if (probeget(ra->ra_vaddr + 1, 1) == -1)
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return (0);
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@ -311,24 +319,113 @@ si_match(parent, cf, aux)
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* be determined using the fact that the "sc" board occupies
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* 4K bytes in VME space but the "si" board occupies 2K bytes.
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*/
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if (strcmp(cf->cf_driver->cd_name, "si") == 0)
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if (probeget(ra->ra_vaddr + 0x801, 1) != -1)
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return(0);
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return (1);
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return (probeget(ra->ra_vaddr + 0x801, 1) == -1);
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}
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static void
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si_attach(parent, self, args)
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si_attach(parent, self, aux)
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struct device *parent, *self;
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void *args;
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void *aux;
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{
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struct si_softc *sc = (struct si_softc *) self;
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struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc;
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struct vme_attach_args *va = aux;
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vme_chipset_tag_t ct = va->vma_chipset_tag;
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bus_space_tag_t bt = va->vma_bustag;
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bus_space_handle_t bh;
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vme_intr_handle_t ih;
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vme_mod_t mod;
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mod = VMEMOD_A24 | VMEMOD_D | VMEMOD_S;
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if (vme_bus_map(ct, va->vma_reg[0], sizeof(struct si_regs),
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mod, bt, &bh) != 0)
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panic("%s: vme_bus_map", ncr_sc->sc_dev.dv_xname);
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sc->sc_regs = (struct si_regs *)bh;
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sc->sc_options = si_options;
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reset_adapter = si_reset_adapter;
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ncr_sc->sc_dma_setup = si_vme_dma_setup;
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ncr_sc->sc_dma_start = si_vme_dma_start;
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ncr_sc->sc_dma_eop = si_vme_dma_stop;
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ncr_sc->sc_dma_stop = si_vme_dma_stop;
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vme_intr_map(ct, va->vma_vec, va->vma_pri, &ih);
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vme_intr_establish(ct, ih, si_intr, sc);
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printf(" pri %d\n", va->vma_pri);
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sc->sc_adapter_iv_am = (mod << 8) | (va->vma_vec & 0xFF);
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si_attach_common(parent, sc);
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if (sc->sc_options & SI_DO_RESELECT) {
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/*
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* Need to enable interrupts (and DMA!)
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* on this H/W for reselect to work.
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*/
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ncr_sc->sc_intr_on = si_vme_intr_on;
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ncr_sc->sc_intr_off = si_vme_intr_off;
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}
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bootpath_store(1, NULL);
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}
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static void
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sw_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct si_softc *sc = (struct si_softc *) self;
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struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc;
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volatile struct si_regs *regs;
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struct confargs *ca = args;
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struct romaux *ra = &ca->ca_ra;
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struct confargs *ca = aux;
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struct romaux *ra = &ca->ca_ra;
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struct bootpath *bp;
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/* Map the controller registers. */
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sc->sc_regs = (struct si_regs *)
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mapiodev(ra->ra_reg, 0, sizeof(struct si_regs));
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sc->sc_options = sw_options;
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sc->sc_adapter_type = ca->ca_bustype;
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reset_adapter = sw_reset_adapter;
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ncr_sc->sc_dma_setup = si_obio_dma_setup;
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ncr_sc->sc_dma_start = si_obio_dma_start;
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ncr_sc->sc_dma_eop = si_obio_dma_stop;
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ncr_sc->sc_dma_stop = si_obio_dma_stop;
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ncr_sc->sc_intr_on = si_obio_intr_on;
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ncr_sc->sc_intr_off = si_obio_intr_off;
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/* Establish the interrupt. */
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sc->sc_ih.ih_fun = si_intr;
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sc->sc_ih.ih_arg = sc;
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intr_establish(ra->ra_intr[0].int_pri, &sc->sc_ih);
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printf(" pri %d\n", ra->ra_intr[0].int_pri);
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/*
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* If the boot path is "sw" or "si" at the moment and it's me, then
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* walk out pointer to the sub-device, ready for the config
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* below.
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*/
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bp = ra->ra_bp;
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if (bp != NULL && strcmp(bp->name, ra->ra_name) == 0 &&
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bp->val[0] == -1 && bp->val[1] == ncr_sc->sc_dev.dv_unit)
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bootpath_store(1, bp + 1);
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si_attach_common(parent, sc);
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bootpath_store(1, NULL);
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}
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static void
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si_attach_common(parent, sc)
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struct device *parent;
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struct si_softc *sc;
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{
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struct ncr5380_softc *ncr_sc = (struct ncr5380_softc *)sc;
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volatile struct si_regs *regs;
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char bits[64];
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int i;
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@ -339,13 +436,8 @@ si_attach(parent, self, args)
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if ((ncr_sc->sc_dev.dv_cfdata->cf_flags & SI_OPTIONS_MASK) != 0)
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sc->sc_options =
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(ncr_sc->sc_dev.dv_cfdata->cf_flags & SI_OPTIONS_MASK);
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else
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sc->sc_options =
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(ca->ca_bustype == BUS_OBIO) ? sw_options : si_options;
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/* Map the controller registers. */
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regs = (struct si_regs *)
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mapiodev(ra->ra_reg, 0, sizeof(struct si_regs));
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regs = sc->sc_regs;
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/*
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* Fill in the prototype scsipi_link.
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@ -377,36 +469,6 @@ si_attach(parent, self, args)
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ncr_sc->sc_dma_free = si_dma_free;
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ncr_sc->sc_dma_poll = si_dma_poll;
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switch (ca->ca_bustype) {
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case BUS_VME16:
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ncr_sc->sc_dma_setup = si_vme_dma_setup;
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ncr_sc->sc_dma_start = si_vme_dma_start;
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ncr_sc->sc_dma_eop = si_vme_dma_stop;
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ncr_sc->sc_dma_stop = si_vme_dma_stop;
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if (sc->sc_options & SI_DO_RESELECT) {
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/*
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* Need to enable interrupts (and DMA!)
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* on this H/W for reselect to work.
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*/
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ncr_sc->sc_intr_on = si_vme_intr_on;
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ncr_sc->sc_intr_off = si_vme_intr_off;
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}
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break;
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case BUS_OBIO:
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ncr_sc->sc_dma_setup = si_obio_dma_setup;
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ncr_sc->sc_dma_start = si_obio_dma_start;
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ncr_sc->sc_dma_eop = si_obio_dma_stop;
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ncr_sc->sc_dma_stop = si_obio_dma_stop;
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ncr_sc->sc_intr_on = si_obio_intr_on;
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ncr_sc->sc_intr_off = si_obio_intr_off;
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break;
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default:
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panic("\nsi_attach: impossible bus type 0x%x", ca->ca_bustype);
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/* NOTREACHED */
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}
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ncr_sc->sc_flags = 0;
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if ((sc->sc_options & SI_DO_RESELECT) == 0)
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ncr_sc->sc_no_disconnect = 0xFF;
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@ -414,12 +476,6 @@ si_attach(parent, self, args)
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ncr_sc->sc_flags |= NCR5380_FORCE_POLLING;
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ncr_sc->sc_min_dma_len = MIN_DMA_LEN;
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/*
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* Initialize fields used only here in the MD code.
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*/
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sc->sc_regs = regs;
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sc->sc_adapter_type = ca->ca_bustype;
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/* sc_adapter_iv_am = (was set above) */
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/*
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* Allocate DMA handles.
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@ -431,36 +487,7 @@ si_attach(parent, self, args)
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for (i = 0; i < SCI_OPENINGS; i++)
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sc->sc_dma[i].dh_flags = 0;
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sc->sc_regs = regs;
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sc->sc_adapter_type = ca->ca_bustype;
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/* Establish the interrupt. */
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sc->sc_ih.ih_fun = si_intr;
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sc->sc_ih.ih_arg = sc;
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switch (ca->ca_bustype) {
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case BUS_OBIO:
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/*
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* This will be an "sw" controller.
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*/
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intr_establish(ra->ra_intr[0].int_pri, &sc->sc_ih);
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break;
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case BUS_VME16:
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/*
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* This will be an "si" controller.
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*/
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vmeintr_establish(ra->ra_intr[0].int_vec,
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ra->ra_intr[0].int_pri, &sc->sc_ih);
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sc->sc_adapter_iv_am =
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VME_SUPV_DATA_24 | (ra->ra_intr[0].int_vec & 0xFF);
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break;
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default:
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/* Impossible case handled above. */
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break;
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}
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printf(" pri %d\n", ra->ra_intr[0].int_pri);
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if (sc->sc_options) {
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printf("%s: options=%s\n", ncr_sc->sc_dev.dv_xname,
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bitmask_snprintf(sc->sc_options, SI_OPTIONS_BITS,
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@ -475,24 +502,12 @@ si_attach(parent, self, args)
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/*
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* Initialize si board itself.
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*/
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si_reset_adapter(ncr_sc);
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reset_adapter(ncr_sc);
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ncr5380_init(ncr_sc);
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ncr5380_reset_scsibus(ncr_sc);
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/*
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* If the boot path is "sw" or "si" at the moment and it's me, then
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* walk out pointer to the sub-device, ready for the config
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* below.
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*/
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bp = ra->ra_bp;
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if (bp != NULL && strcmp(bp->name, ra->ra_name) == 0 &&
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bp->val[0] == -1 && bp->val[1] == ncr_sc->sc_dev.dv_unit)
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bootpath_store(1, bp + 1);
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/* Configure sub-devices */
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config_found(self, &(ncr_sc->sc_link), scsiprint);
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bootpath_store(1, NULL);
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config_found(&ncr_sc->sc_dev, &ncr_sc->sc_link, scsiprint);
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}
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static void
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@ -580,31 +595,43 @@ si_reset_adapter(struct ncr5380_softc *ncr_sc)
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*
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* The reset bits in the CSR are active low.
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*/
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switch(sc->sc_adapter_type) {
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case BUS_VME16:
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si->si_csr = 0;
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delay(10);
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si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN;
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delay(10);
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si->fifo_count = 0;
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si->dma_addrh = 0;
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si->dma_addrl = 0;
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si->dma_counth = 0;
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si->dma_countl = 0;
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si->si_iv_am = sc->sc_adapter_iv_am;
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si->fifo_cnt_hi = 0;
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break;
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si->si_csr = 0;
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delay(10);
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si->si_csr = SI_CSR_FIFO_RES | SI_CSR_SCSI_RES | SI_CSR_INTR_EN;
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delay(10);
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si->fifo_count = 0;
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si->dma_addrh = 0;
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si->dma_addrl = 0;
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si->dma_counth = 0;
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si->dma_countl = 0;
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si->si_iv_am = sc->sc_adapter_iv_am;
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si->fifo_cnt_hi = 0;
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case BUS_OBIO:
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si->sw_csr = 0;
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delay(10);
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si->sw_csr = SI_CSR_SCSI_RES;
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si->dma_addr = 0;
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si->dma_count = 0;
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delay(10);
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si->sw_csr |= SI_CSR_INTR_EN;
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break;
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SCI_CLR_INTR(ncr_sc);
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}
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static void
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sw_reset_adapter(struct ncr5380_softc *ncr_sc)
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{
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struct si_softc *sc = (struct si_softc *)ncr_sc;
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volatile struct si_regs *si = sc->sc_regs;
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#ifdef DEBUG
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if (si_debug) {
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printf("sw_reset_adapter\n");
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}
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#endif
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/*
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* The reset bits in the CSR are active low.
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*/
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si->sw_csr = 0;
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delay(10);
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si->sw_csr = SI_CSR_SCSI_RES;
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si->dma_addr = 0;
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si->dma_count = 0;
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delay(10);
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si->sw_csr |= SI_CSR_INTR_EN;
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SCI_CLR_INTR(ncr_sc);
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}
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