fpu_emulate.h:

the fmovecr constant table has the internal format
  of the constants. So, when changing the mantissa size by a
  non-multiple of 32 bits, we'd have to change this table, too. As
  all other code changes just chopped of the least significand
  32bit word of the mantissa, we correct the mantissa size instead
  to (115 - 32 == 83) bits.
fpu_fmovecr.c:
  put a safety belt in, to catch the next person who doesn't know this.
fpu_int.c:
  in one place, the reduction of the mantissa size was overlooked.
fpu_log.c:
  as the most significand 32bit word of the mantissa was changed back to the
  old format, change back the table indexing code, too.

This should fix PR 11045.
This commit is contained in:
is 2000-09-22 19:47:58 +00:00
parent 89f53512af
commit 4e2cf3688b
4 changed files with 17 additions and 13 deletions

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@ -1,4 +1,4 @@
/* $NetBSD: fpu_emulate.h,v 1.6 2000/09/19 03:17:59 minoura Exp $ */
/* $NetBSD: fpu_emulate.h,v 1.7 2000/09/22 19:47:58 is Exp $ */
/*
* Copyright (c) 1995 Gordon Ross
@ -44,11 +44,11 @@
* or `unpacked' form consisting of:
* - sign
* - unbiased exponent
* - mantissa (`1.' + 63-bit fraction + guard + round)
* - mantissa (`1.' + 80-bit fraction + guard + round)
* - sticky bit
* Any implied `1' bit is inserted, giving a 64-bit mantissa that is
* Any implied `1' bit is inserted, giving a 81-bit mantissa that is
* always nonzero. Additional low-order `guard' and `round' bits are
* scrunched in, making the entire mantissa 66 bits long. This is divided
* scrunched in, making the entire mantissa 83 bits long. This is divided
* into three 32-bit words, with `spare' bits left over in the upper part
* of the top word (the high bits of fp_mant[0]). An internal `exploded'
* number is thus kept within the half-open interval [1.0,2.0) (but see
@ -76,10 +76,10 @@ struct fpn {
int fp_sign; /* 0 => positive, 1 => negative */
int fp_exp; /* exponent (unbiased) */
int fp_sticky; /* nonzero bits lost at right end */
u_int fp_mant[3]; /* 66-bit mantissa */
u_int fp_mant[3]; /* 83-bit mantissa */
};
#define FP_NMANT 67 /* total bits in mantissa (incl g,r) */
#define FP_NMANT 83 /* total bits in mantissa (incl g,r) */
#define FP_NG 2 /* number of low-order guard bits */
#define FP_LG ((FP_NMANT - 1) & 31) /* log2(1.0) for fp_mant[0] */
#define FP_QUIETBIT (1 << (FP_LG - 1)) /* Quiet bit in NaNs (0.5) */

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@ -1,4 +1,4 @@
/* $NetBSD: fpu_fmovecr.c,v 1.7 1999/05/30 20:17:48 briggs Exp $ */
/* $NetBSD: fpu_fmovecr.c,v 1.8 2000/09/22 19:47:59 is Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
@ -37,8 +37,13 @@
#include "fpu_emulate.h"
/* XXX: quick consistency check */
#if (FP_1 != 0x40000)
Error you have to change this table when changing the mantissa size
#endif
static struct fpn constrom[] = {
/* fp_class, fp_sign, fp_exp, fp_sticky, fp_mant[0] ... [3] */
/* fp_class, fp_sign, fp_exp, fp_sticky, fp_mant[0] ... [2] */
{ FPC_NUM, 0, 1, 0, { 0x6487e, 0xd5110b46, 0x11a80000 } },
{ FPC_NUM, 0, -2, 0, { 0x4d104, 0xd427de7f, 0xbcc00000 } },
{ FPC_NUM, 0, 1, 0, { 0x56fc2, 0xa2c515da, 0x54d00000 } },

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@ -1,4 +1,4 @@
/* $NetBSD: fpu_int.c,v 1.2 1999/05/30 20:17:48 briggs Exp $ */
/* $NetBSD: fpu_int.c,v 1.3 2000/09/22 19:47:59 is Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
@ -60,7 +60,7 @@ fpu_intrz(fe)
return x;
}
clr = 3 - sh / 32;
clr = 2 - sh / 32;
mask = (0xffffffff << (sh % 32));
for (i = 2; i > clr; i--) {

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@ -1,4 +1,4 @@
/* $NetBSD: fpu_log.c,v 1.6 1999/05/30 20:17:48 briggs Exp $ */
/* $NetBSD: fpu_log.c,v 1.7 2000/09/22 19:47:59 is Exp $ */
/*
* Copyright (c) 1995 Ken Nakata
@ -314,8 +314,7 @@ __fpu_logn(fe)
#endif
/* index to the table */
i = ((F.fp_mant[0] << (7 - FP_LG)) |
(F.fp_mant[1] >> (32 - (7 - FP_LG)))) & 0x7e;
i = (F.fp_mant[0] >> (FP_LG - 7)) & 0x7e;
#if FPE_DEBUG
printf("__fpu_logn: index to logtbl i=%d(%x)\n", i, i);