MI version of the Fujitsu MB89352 SCSI Protocol Controler (SPC) driver.
Based on experimental NetBSD/pc98 ISA/PISA version, which was derived from the MD /sys/arch/x68k/dev/spc.c.
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/* $NetBSD: mb89352reg.h,v 1.1 1999/02/13 17:33:14 minoura Exp $ */
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/* NecBSD: mb89352reg.h,v 1.3 1998/03/14 07:04:34 kmatsuda Exp */
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/*-
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* Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Copyright (c) 1990, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
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*
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* This code is derived from software contributed to Berkeley by
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* Van Jacobson of Lawrence Berkeley Laboratory.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)scsireg.h 8.1 (Berkeley) 6/10/93
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*/
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/*
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1996, 1997, 1998
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* NetBSD/pc98 porting staff. All rights reserved.
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* Copyright (c) 1996, 1997, 1998
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* Kouichi Matsuda. All rights reserved.
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*/
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/*
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* FUJITSU MB89352A SCSI Protocol Controler Hardware Description.
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*/
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/* Definitions, most of them has turned out to be unneccesary, but here they
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* are anyway.
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*/
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#define BDID 0x00 /* Bus Device ID (R/W) */
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#define SCTL 0x01 /* SPC Control register (R/W) */
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#define SCMD 0x02 /* Command Register (R/W) */
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#define TMOD 0x03 /* Transmit Mode Register (synch models) */
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#define INTS 0x04 /* Interrupt sense (R); Interrupt Reset (W) */
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#define PSNS 0x05 /* Phase Sence (R); SPC Diagnostic Control (W) */
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#define SSTS 0x06 /* SPC status (R/O) */
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#define SERR 0x07 /* SPC error status (R/O) */
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#define PCTL 0x08 /* Phase Control (R/W) */
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#define MBC 0x09 /* Modified Byte Counter (R/O) */
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#define DREG 0x0a /* Data Register (R/W) */
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#define TEMP 0x0b /* Temporary Register (R/W) */
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#define TCH 0x0c /* Transfer Counter High (R/W) */
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#define TCM 0x0d /* Transfer Counter Middle (R/W) */
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#define TCL 0x0e /* Transfer Counter Low (R/W) */
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#define EXBF 0x0f /* External Buffer (synch models) */
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/* What all the bits do */
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/* SCSI_BDID */
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/* SCSI selection/reselection ID (both target *and* initiator) */
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#define SELID7 0x80
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#define SELID6 0x40
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#define SELID5 0x20
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#define SELID4 0x10
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#define SELID3 0x08
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#define SELID2 0x04
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#define SELID1 0x02
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#define SELID0 0x01
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/* SCSI_SCTL */
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#define SCTL_DISABLE 0x80
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#define SCTL_CTRLRST 0x40
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#define SCTL_DIAG 0x20
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#define SCTL_ABRT_ENAB 0x10
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#define SCTL_PARITY_ENAB 0x08
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#define SCTL_SEL_ENAB 0x04
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#define SCTL_RESEL_ENAB 0x02
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#define SCTL_INTR_ENAB 0x01
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/* SCSI_SCMD */
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#define SCMD_RST 0x10
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#define SCMD_ICPT_XFR 0x08
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#define SCMD_PROG_XFR 0x04
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#define SCMD_PAD 0x01 /* if initiator */
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#define SCMD_PERR_STOP 0x01 /* if target */
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/* command codes */
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#define SCMD_BUS_REL 0x00
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#define SCMD_SELECT 0x20
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#define SCMD_RST_ATN 0x40
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#define SCMD_SET_ATN 0x60
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#define SCMD_XFR 0x80
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#define SCMD_XFR_PAUSE 0xa0
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#define SCMD_RST_ACK 0xc0
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#define SCMD_SET_ACK 0xe0
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/* SCSI_TMOD */
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#define TMOD_SYNC 0x80
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/* SCSI_INTS */
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#define INTS_SEL 0x80
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#define INTS_RESEL 0x40
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#define INTS_DISCON 0x20
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#define INTS_CMD_DONE 0x10
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#define INTS_SRV_REQ 0x08
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#define INTS_TIMEOUT 0x04
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#define INTS_HARD_ERR 0x02
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#define INTS_RST 0x01
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/* SCSI_PSNS */
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#define PSNS_REQ 0x80
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#define PSNS_ACK 0x40
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#define PSNS_ATN 0x20
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#define PSNS_SEL 0x10
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#define PSNS_BSY 0x08
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/* PSNS */
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#define REQI 0x80
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#define ACKI 0x40
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#define ATNI 0x20
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#define SELI 0x10
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#define BSYI 0x08
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#define MSGI 0x04
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#define CDI 0x02
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#define IOI 0x01
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/* Important! The 3 most significant bits of this register, in initiator mode,
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* represents the "expected" SCSI bus phase and can be used to trigger phase
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* mismatch and phase change interrupts. But more important: If there is a
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* phase mismatch the chip will not transfer any data! This is actually a nice
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* feature as it gives us a bit more control over what is happening when we are
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* bursting data (in) through the FIFOs and the phase suddenly changes from
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* DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the
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* proper phase to be set in this register instead of dumping the bits into the
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* FIFOs.
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*/
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#if 0
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#define REQO 0x80
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#define ACKO 0x40
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#define ATNO 0x20
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#define SELO 0x10
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#define BSYO 0x08
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#endif
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/* PCTL */
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#define MSGO 0x04
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#define CDO 0x02
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#define IOO 0x01
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/* Information transfer phases */
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#define PH_DATAOUT (0)
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#define PH_DATAIN (IOI)
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#define PH_CMD (CDI)
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#define PH_STAT (CDI | IOI)
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#define PH_MSGOUT (MSGI | CDI)
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#define PH_MSGIN (MSGI | CDI | IOI)
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#define PH_MASK (MSGI | CDI | IOI)
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#define PH_INVALID 0xff
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/* SCSI_SSTS */
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#define SSTS_INITIATOR 0x80
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#define SSTS_TARGET 0x40
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#define SSTS_BUSY 0x20
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#define SSTS_XFR 0x10
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#define SSTS_ACTIVE (SSTS_INITIATOR|SSTS_XFR)
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#define SSTS_RST 0x08
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#define SSTS_TCZERO 0x04
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#define SSTS_DREG_FULL 0x02
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#define SSTS_DREG_EMPTY 0x01
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/* SCSI_SERR */
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#define SERR_SCSI_PAR 0x80
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#define SERR_SPC_PAR 0x40
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#define SERR_TC_PAR 0x08
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#define SERR_PHASE_ERR 0x04
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#define SERR_SHORT_XFR 0x02
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#define SERR_OFFSET 0x01
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/* SCSI_PCTL */
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#define PCTL_BFINT_ENAB 0x80
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/* $NetBSD: mb89352var.h,v 1.1 1999/02/13 17:33:15 minoura Exp $ */
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/* NecBSD: mb89352var.h,v 1.4 1998/03/14 07:31:22 kmatsuda Exp */
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/*-
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* Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles M. Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* Copyright (c) 1994 Jarle Greipsland
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* [NetBSD for NEC PC-98 series]
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* Copyright (c) 1996, 1997, 1998
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* NetBSD/pc98 porting staff. All rights reserved.
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* Copyright (c) 1996, 1997, 1998
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* Kouich Matsuda. All rights reserved.
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*/
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#ifndef _MB89352VAR_H_
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#define _MB89352VAR_H_
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/*
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* ACB. Holds additional information for each SCSI command Comments: We
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* need a separate scsi command block because we may need to overwrite it
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* with a request sense command. Basicly, we refrain from fiddling with
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* the scsi_xfer struct (except do the expected updating of return values).
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* We'll generally update: xs->{flags,resid,error,sense,status} and
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* occasionally xs->retries.
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*/
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struct spc_acb {
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struct scsi_generic scsipi_cmd;
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int scsipi_cmd_length;
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u_char *data_addr; /* Saved data pointer */
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int data_length; /* Residue */
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u_char target_stat; /* SCSI status byte */
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#ifdef notdef
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struct spc_dma_seg dma[SPC_NSEG]; /* Physical addresses+len */
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#endif
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TAILQ_ENTRY(spc_acb) chain;
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struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */
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int flags;
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#define ACB_ALLOC 0x01
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#define ACB_NEXUS 0x02
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#define ACB_SENSE 0x04
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#define ACB_ABORT 0x40
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#define ACB_RESET 0x80
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int timeout;
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};
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/*
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* Some info about each (possible) target on the SCSI bus. This should
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* probably have been a "per target+lunit" structure, but we'll leave it at
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* this for now.
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*/
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struct spc_tinfo {
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int cmds; /* #commands processed */
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int dconns; /* #disconnects */
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int touts; /* #timeouts */
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int perrs; /* #parity errors */
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int senses; /* #request sense commands sent */
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ushort lubusy; /* What local units/subr. are busy? */
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u_char flags;
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#define DO_SYNC 0x01 /* (Re)Negotiate synchronous options */
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#define DO_WIDE 0x02 /* (Re)Negotiate wide options */
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u_char period; /* Period suggestion */
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u_char offset; /* Offset suggestion */
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u_char width; /* Width suggestion */
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} tinfo_t;
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struct spc_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_ioh;
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struct scsipi_link sc_link; /* prototype for subdevs */
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struct scsipi_adapter sc_adapter;
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TAILQ_HEAD(, spc_acb) free_list, ready_list, nexus_list;
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struct spc_acb *sc_nexus; /* current command */
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struct spc_acb sc_acb[8];
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struct spc_tinfo sc_tinfo[8];
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/* Data about the current nexus (updated for every cmd switch) */
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u_char *sc_dp; /* Current data pointer */
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size_t sc_dleft; /* Data bytes left to transfer */
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u_char *sc_cp; /* Current command pointer */
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size_t sc_cleft; /* Command bytes left to transfer */
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/* Adapter state */
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u_char sc_phase; /* Current bus phase */
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u_char sc_prevphase; /* Previous bus phase */
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u_char sc_state; /* State applicable to the adapter */
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#define SPC_INIT 0
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#define SPC_IDLE 1
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#define SPC_SELECTING 2 /* SCSI command is arbiting */
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#define SPC_RESELECTED 3 /* Has been reselected */
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#define SPC_CONNECTED 4 /* Actively using the SCSI bus */
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#define SPC_DISCONNECT 5 /* MSG_DISCONNECT received */
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#define SPC_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */
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#define SPC_CLEANING 7
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u_char sc_flags;
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#define SPC_DROP_MSGIN 0x01 /* Discard all msgs (parity err detected) */
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#define SPC_ABORTING 0x02 /* Bailing out */
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#define SPC_DOINGDMA 0x04 /* The FIFO data path is active! */
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#define SPC_INACTIVE 0x80 /* The FIFO data path is active! */
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u_char sc_selid; /* Reselection ID */
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/* Message stuff */
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u_char sc_msgpriq; /* Messages we want to send */
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u_char sc_msgoutq; /* Messages sent during last MESSAGE OUT */
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u_char sc_lastmsg; /* Message last transmitted */
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u_char sc_currmsg; /* Message currently ready to transmit */
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#define SEND_DEV_RESET 0x01
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#define SEND_PARITY_ERROR 0x02
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#define SEND_INIT_DET_ERR 0x04
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#define SEND_REJECT 0x08
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#define SEND_IDENTIFY 0x10
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#define SEND_ABORT 0x20
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#define SEND_SDTR 0x40
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#define SEND_WDTR 0x80
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#define SPC_MAX_MSG_LEN 8
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u_char sc_omess[SPC_MAX_MSG_LEN];
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u_char *sc_omp; /* Outgoing message pointer */
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u_char sc_imess[SPC_MAX_MSG_LEN];
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u_char *sc_imp; /* Incoming message pointer */
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/* Hardware stuff */
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int sc_initiator; /* Our scsi id */
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int sc_freq; /* Clock frequency in MHz */
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int sc_minsync; /* Minimum sync period / 4 */
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int sc_maxsync; /* Maximum sync period / 4 */
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};
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#if SPC_DEBUG
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#define SPC_SHOWACBS 0x01
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#define SPC_SHOWINTS 0x02
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#define SPC_SHOWCMDS 0x04
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#define SPC_SHOWMISC 0x08
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#define SPC_SHOWTRACE 0x10
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#define SPC_SHOWSTART 0x20
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#define SPC_DOBREAK 0x40
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extern int spc_debug; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
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#define SPC_PRINT(b, s) do {if ((spc_debug & (b)) != 0) printf s;} while (0)
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#define SPC_BREAK() do {if ((spc_debug & SPC_DOBREAK) != 0) Debugger();} while (0)
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#define SPC_ASSERT(x) do {if (x) {} else {printf("%s at line %d: assertion failed\n", sc->sc_dev.dv_xname, __LINE__); Debugger();}} while (0)
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#else
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#define SPC_PRINT(b, s)
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#define SPC_BREAK()
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#define SPC_ASSERT(x)
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#endif
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#define SPC_ACBS(s) SPC_PRINT(SPC_SHOWACBS, s)
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#define SPC_INTS(s) SPC_PRINT(SPC_SHOWINTS, s)
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#define SPC_CMDS(s) SPC_PRINT(SPC_SHOWCMDS, s)
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#define SPC_MISC(s) SPC_PRINT(SPC_SHOWMISC, s)
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#define SPC_TRACE(s) SPC_PRINT(SPC_SHOWTRACE, s)
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#define SPC_START(s) SPC_PRINT(SPC_SHOWSTART, s)
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void spcattach __P((struct spc_softc *));
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int spcintr __P((void *));
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int spc_find __P((bus_space_tag_t, bus_space_handle_t, int));
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void spc_init __P((struct spc_softc *));
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void spc_sched __P((struct spc_softc *));
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#endif /* _MB89352VAR_H_ */
|
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