MI version of the Fujitsu MB89352 SCSI Protocol Controler (SPC) driver.

Based on experimental NetBSD/pc98 ISA/PISA version, which was derived
from the MD /sys/arch/x68k/dev/spc.c.
This commit is contained in:
minoura 1999-02-13 17:33:14 +00:00
parent c13995b38f
commit 4d5a04afc4
3 changed files with 2587 additions and 0 deletions

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/* $NetBSD: mb89352reg.h,v 1.1 1999/02/13 17:33:14 minoura Exp $ */
/* NecBSD: mb89352reg.h,v 1.3 1998/03/14 07:04:34 kmatsuda Exp */
/*-
* Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
* All rights reserved.
*
* Copyright (c) 1990, 1993
* The Regents of the University of California. All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
*
* This code is derived from software contributed to Berkeley by
* Van Jacobson of Lawrence Berkeley Laboratory.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by the University of
* California, Berkeley and its contributors.
* 4. Neither the name of the University nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)scsireg.h 8.1 (Berkeley) 6/10/93
*/
/*
* [NetBSD for NEC PC-98 series]
* Copyright (c) 1996, 1997, 1998
* NetBSD/pc98 porting staff. All rights reserved.
* Copyright (c) 1996, 1997, 1998
* Kouichi Matsuda. All rights reserved.
*/
/*
* FUJITSU MB89352A SCSI Protocol Controler Hardware Description.
*/
/* Definitions, most of them has turned out to be unneccesary, but here they
* are anyway.
*/
#define BDID 0x00 /* Bus Device ID (R/W) */
#define SCTL 0x01 /* SPC Control register (R/W) */
#define SCMD 0x02 /* Command Register (R/W) */
#define TMOD 0x03 /* Transmit Mode Register (synch models) */
#define INTS 0x04 /* Interrupt sense (R); Interrupt Reset (W) */
#define PSNS 0x05 /* Phase Sence (R); SPC Diagnostic Control (W) */
#define SSTS 0x06 /* SPC status (R/O) */
#define SERR 0x07 /* SPC error status (R/O) */
#define PCTL 0x08 /* Phase Control (R/W) */
#define MBC 0x09 /* Modified Byte Counter (R/O) */
#define DREG 0x0a /* Data Register (R/W) */
#define TEMP 0x0b /* Temporary Register (R/W) */
#define TCH 0x0c /* Transfer Counter High (R/W) */
#define TCM 0x0d /* Transfer Counter Middle (R/W) */
#define TCL 0x0e /* Transfer Counter Low (R/W) */
#define EXBF 0x0f /* External Buffer (synch models) */
/* What all the bits do */
/* SCSI_BDID */
/* SCSI selection/reselection ID (both target *and* initiator) */
#define SELID7 0x80
#define SELID6 0x40
#define SELID5 0x20
#define SELID4 0x10
#define SELID3 0x08
#define SELID2 0x04
#define SELID1 0x02
#define SELID0 0x01
/* SCSI_SCTL */
#define SCTL_DISABLE 0x80
#define SCTL_CTRLRST 0x40
#define SCTL_DIAG 0x20
#define SCTL_ABRT_ENAB 0x10
#define SCTL_PARITY_ENAB 0x08
#define SCTL_SEL_ENAB 0x04
#define SCTL_RESEL_ENAB 0x02
#define SCTL_INTR_ENAB 0x01
/* SCSI_SCMD */
#define SCMD_RST 0x10
#define SCMD_ICPT_XFR 0x08
#define SCMD_PROG_XFR 0x04
#define SCMD_PAD 0x01 /* if initiator */
#define SCMD_PERR_STOP 0x01 /* if target */
/* command codes */
#define SCMD_BUS_REL 0x00
#define SCMD_SELECT 0x20
#define SCMD_RST_ATN 0x40
#define SCMD_SET_ATN 0x60
#define SCMD_XFR 0x80
#define SCMD_XFR_PAUSE 0xa0
#define SCMD_RST_ACK 0xc0
#define SCMD_SET_ACK 0xe0
/* SCSI_TMOD */
#define TMOD_SYNC 0x80
/* SCSI_INTS */
#define INTS_SEL 0x80
#define INTS_RESEL 0x40
#define INTS_DISCON 0x20
#define INTS_CMD_DONE 0x10
#define INTS_SRV_REQ 0x08
#define INTS_TIMEOUT 0x04
#define INTS_HARD_ERR 0x02
#define INTS_RST 0x01
/* SCSI_PSNS */
#define PSNS_REQ 0x80
#define PSNS_ACK 0x40
#define PSNS_ATN 0x20
#define PSNS_SEL 0x10
#define PSNS_BSY 0x08
/* PSNS */
#define REQI 0x80
#define ACKI 0x40
#define ATNI 0x20
#define SELI 0x10
#define BSYI 0x08
#define MSGI 0x04
#define CDI 0x02
#define IOI 0x01
/* Important! The 3 most significant bits of this register, in initiator mode,
* represents the "expected" SCSI bus phase and can be used to trigger phase
* mismatch and phase change interrupts. But more important: If there is a
* phase mismatch the chip will not transfer any data! This is actually a nice
* feature as it gives us a bit more control over what is happening when we are
* bursting data (in) through the FIFOs and the phase suddenly changes from
* DATA IN to STATUS or MESSAGE IN. The transfer will stop and wait for the
* proper phase to be set in this register instead of dumping the bits into the
* FIFOs.
*/
#if 0
#define REQO 0x80
#define ACKO 0x40
#define ATNO 0x20
#define SELO 0x10
#define BSYO 0x08
#endif
/* PCTL */
#define MSGO 0x04
#define CDO 0x02
#define IOO 0x01
/* Information transfer phases */
#define PH_DATAOUT (0)
#define PH_DATAIN (IOI)
#define PH_CMD (CDI)
#define PH_STAT (CDI | IOI)
#define PH_MSGOUT (MSGI | CDI)
#define PH_MSGIN (MSGI | CDI | IOI)
#define PH_MASK (MSGI | CDI | IOI)
#define PH_INVALID 0xff
/* SCSI_SSTS */
#define SSTS_INITIATOR 0x80
#define SSTS_TARGET 0x40
#define SSTS_BUSY 0x20
#define SSTS_XFR 0x10
#define SSTS_ACTIVE (SSTS_INITIATOR|SSTS_XFR)
#define SSTS_RST 0x08
#define SSTS_TCZERO 0x04
#define SSTS_DREG_FULL 0x02
#define SSTS_DREG_EMPTY 0x01
/* SCSI_SERR */
#define SERR_SCSI_PAR 0x80
#define SERR_SPC_PAR 0x40
#define SERR_TC_PAR 0x08
#define SERR_PHASE_ERR 0x04
#define SERR_SHORT_XFR 0x02
#define SERR_OFFSET 0x01
/* SCSI_PCTL */
#define PCTL_BFINT_ENAB 0x80

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/* $NetBSD: mb89352var.h,v 1.1 1999/02/13 17:33:15 minoura Exp $ */
/* NecBSD: mb89352var.h,v 1.4 1998/03/14 07:31:22 kmatsuda Exp */
/*-
* Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. All advertising materials mentioning features or use of this software
* must display the following acknowledgement:
* This product includes software developed by Charles M. Hannum.
* 4. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* Copyright (c) 1994 Jarle Greipsland
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
/*
* [NetBSD for NEC PC-98 series]
* Copyright (c) 1996, 1997, 1998
* NetBSD/pc98 porting staff. All rights reserved.
* Copyright (c) 1996, 1997, 1998
* Kouich Matsuda. All rights reserved.
*/
#ifndef _MB89352VAR_H_
#define _MB89352VAR_H_
/*
* ACB. Holds additional information for each SCSI command Comments: We
* need a separate scsi command block because we may need to overwrite it
* with a request sense command. Basicly, we refrain from fiddling with
* the scsi_xfer struct (except do the expected updating of return values).
* We'll generally update: xs->{flags,resid,error,sense,status} and
* occasionally xs->retries.
*/
struct spc_acb {
struct scsi_generic scsipi_cmd;
int scsipi_cmd_length;
u_char *data_addr; /* Saved data pointer */
int data_length; /* Residue */
u_char target_stat; /* SCSI status byte */
#ifdef notdef
struct spc_dma_seg dma[SPC_NSEG]; /* Physical addresses+len */
#endif
TAILQ_ENTRY(spc_acb) chain;
struct scsipi_xfer *xs; /* SCSI xfer ctrl block from above */
int flags;
#define ACB_ALLOC 0x01
#define ACB_NEXUS 0x02
#define ACB_SENSE 0x04
#define ACB_ABORT 0x40
#define ACB_RESET 0x80
int timeout;
};
/*
* Some info about each (possible) target on the SCSI bus. This should
* probably have been a "per target+lunit" structure, but we'll leave it at
* this for now.
*/
struct spc_tinfo {
int cmds; /* #commands processed */
int dconns; /* #disconnects */
int touts; /* #timeouts */
int perrs; /* #parity errors */
int senses; /* #request sense commands sent */
ushort lubusy; /* What local units/subr. are busy? */
u_char flags;
#define DO_SYNC 0x01 /* (Re)Negotiate synchronous options */
#define DO_WIDE 0x02 /* (Re)Negotiate wide options */
u_char period; /* Period suggestion */
u_char offset; /* Offset suggestion */
u_char width; /* Width suggestion */
} tinfo_t;
struct spc_softc {
struct device sc_dev;
bus_space_tag_t sc_iot;
bus_space_handle_t sc_ioh;
struct scsipi_link sc_link; /* prototype for subdevs */
struct scsipi_adapter sc_adapter;
TAILQ_HEAD(, spc_acb) free_list, ready_list, nexus_list;
struct spc_acb *sc_nexus; /* current command */
struct spc_acb sc_acb[8];
struct spc_tinfo sc_tinfo[8];
/* Data about the current nexus (updated for every cmd switch) */
u_char *sc_dp; /* Current data pointer */
size_t sc_dleft; /* Data bytes left to transfer */
u_char *sc_cp; /* Current command pointer */
size_t sc_cleft; /* Command bytes left to transfer */
/* Adapter state */
u_char sc_phase; /* Current bus phase */
u_char sc_prevphase; /* Previous bus phase */
u_char sc_state; /* State applicable to the adapter */
#define SPC_INIT 0
#define SPC_IDLE 1
#define SPC_SELECTING 2 /* SCSI command is arbiting */
#define SPC_RESELECTED 3 /* Has been reselected */
#define SPC_CONNECTED 4 /* Actively using the SCSI bus */
#define SPC_DISCONNECT 5 /* MSG_DISCONNECT received */
#define SPC_CMDCOMPLETE 6 /* MSG_CMDCOMPLETE received */
#define SPC_CLEANING 7
u_char sc_flags;
#define SPC_DROP_MSGIN 0x01 /* Discard all msgs (parity err detected) */
#define SPC_ABORTING 0x02 /* Bailing out */
#define SPC_DOINGDMA 0x04 /* The FIFO data path is active! */
#define SPC_INACTIVE 0x80 /* The FIFO data path is active! */
u_char sc_selid; /* Reselection ID */
/* Message stuff */
u_char sc_msgpriq; /* Messages we want to send */
u_char sc_msgoutq; /* Messages sent during last MESSAGE OUT */
u_char sc_lastmsg; /* Message last transmitted */
u_char sc_currmsg; /* Message currently ready to transmit */
#define SEND_DEV_RESET 0x01
#define SEND_PARITY_ERROR 0x02
#define SEND_INIT_DET_ERR 0x04
#define SEND_REJECT 0x08
#define SEND_IDENTIFY 0x10
#define SEND_ABORT 0x20
#define SEND_SDTR 0x40
#define SEND_WDTR 0x80
#define SPC_MAX_MSG_LEN 8
u_char sc_omess[SPC_MAX_MSG_LEN];
u_char *sc_omp; /* Outgoing message pointer */
u_char sc_imess[SPC_MAX_MSG_LEN];
u_char *sc_imp; /* Incoming message pointer */
/* Hardware stuff */
int sc_initiator; /* Our scsi id */
int sc_freq; /* Clock frequency in MHz */
int sc_minsync; /* Minimum sync period / 4 */
int sc_maxsync; /* Maximum sync period / 4 */
};
#if SPC_DEBUG
#define SPC_SHOWACBS 0x01
#define SPC_SHOWINTS 0x02
#define SPC_SHOWCMDS 0x04
#define SPC_SHOWMISC 0x08
#define SPC_SHOWTRACE 0x10
#define SPC_SHOWSTART 0x20
#define SPC_DOBREAK 0x40
extern int spc_debug; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
#define SPC_PRINT(b, s) do {if ((spc_debug & (b)) != 0) printf s;} while (0)
#define SPC_BREAK() do {if ((spc_debug & SPC_DOBREAK) != 0) Debugger();} while (0)
#define SPC_ASSERT(x) do {if (x) {} else {printf("%s at line %d: assertion failed\n", sc->sc_dev.dv_xname, __LINE__); Debugger();}} while (0)
#else
#define SPC_PRINT(b, s)
#define SPC_BREAK()
#define SPC_ASSERT(x)
#endif
#define SPC_ACBS(s) SPC_PRINT(SPC_SHOWACBS, s)
#define SPC_INTS(s) SPC_PRINT(SPC_SHOWINTS, s)
#define SPC_CMDS(s) SPC_PRINT(SPC_SHOWCMDS, s)
#define SPC_MISC(s) SPC_PRINT(SPC_SHOWMISC, s)
#define SPC_TRACE(s) SPC_PRINT(SPC_SHOWTRACE, s)
#define SPC_START(s) SPC_PRINT(SPC_SHOWSTART, s)
void spcattach __P((struct spc_softc *));
int spcintr __P((void *));
int spc_find __P((bus_space_tag_t, bus_space_handle_t, int));
void spc_init __P((struct spc_softc *));
void spc_sched __P((struct spc_softc *));
#endif /* _MB89352VAR_H_ */