Updated from libc.
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@ -1,4 +1,4 @@
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/* $NetBSD: bzero.S,v 1.2 2001/11/30 02:25:50 mjl Exp $ */
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/* $NetBSD: bzero.S,v 1.3 2002/03/13 00:59:29 eeh Exp $ */
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/*-
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* Copyright (C) 2001 Martin J. Laubach <mjl@netbsd.org>
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@ -72,18 +72,19 @@ cb_memset:
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bl _GLOBAL_OFFSET_TABLE_@local-4
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mflr r10
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mtlr r9
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lwz r5,cache_size@got(r10)
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lwz r5,cache_info@got(r10)
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#else
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lis r5,cache_size@h
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ori r5,r5,cache_size@l
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lis r5,cache_info@h
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ori r5,r5,cache_info@l
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#endif
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lwz r6, 0(r5)
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lwz r6, 4(r5)
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cmpwi r6, -1
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bne+ cb_cacheline_known
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/*----------------------------------------------------------------------*/
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#define CTL_MACHDEP 7
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#define CPU_CACHELINE 1
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#define CPU_CACHEINFO 5
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#define STKFRAME_SZ 48
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#define MIB 8
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@ -102,6 +103,29 @@ cb_memset:
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stw r4, R4_SAVE(r1)
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stw r0, R0_SAVE(r1)
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li r0, CTL_MACHDEP /* Construct MIB */
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stw r0, MIB(r1)
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li r0, CPU_CACHEINFO
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stw r0, MIB+4(r1)
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li r0, 4*4 /* Oldlenp := 4*4 */
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stw r0, OLDPLEN(r1)
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addi r3, r1, MIB
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li r4, 2 /* namelen */
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/* r5 already contains &cache_info */
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addi r6, r1, OLDPLEN
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li r7, 0
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li r8, 0
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bl PIC_PLT(_C_LABEL(sysctl))
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cmpwi r3, 0 /* Check result */
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beq 1f
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/* Failure, try older sysctl */
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li r0, CTL_MACHDEP /* Construct MIB */
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stw r0, MIB(r1)
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li r0, CPU_CACHELINE
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@ -112,12 +136,22 @@ cb_memset:
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addi r3, r1, MIB
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li r4, 2 /* namelen */
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/* r5 already contains &cache_size */
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#ifdef PIC
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mflr r9
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bl _GLOBAL_OFFSET_TABLE_@local-4
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mflr r10
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mtlr r9
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lwz r5,cache_info@got(r10)
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addi r5, r5, 4
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#else
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lis r5,cache_info+4@h
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ori r5,r5,cache_info+4@l
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#endif
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addi r6, r1, OLDPLEN
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li r7, 0
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li r8, 0
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bl PIC_PLT(_C_LABEL(sysctl))
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1:
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lwz r8, R8_SAVE(r1)
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lwz r3, R3_SAVE(r1)
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lwz r4, R4_SAVE(r1)
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@ -126,11 +160,11 @@ cb_memset:
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#ifdef PIC
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bl _GLOBAL_OFFSET_TABLE_@local-4
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mflr r10
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lwz r9, cache_size@got(r10)
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lwz r9, 0(r9)
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lwz r9, cache_info@got(r10)
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lwz r9, 4(r9)
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#else
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lis r5, cache_size@ha
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lwz r9, cache_size@l(r5)
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lis r5, cache_info+4@ha
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lwz r9, cache_info+4@l(r5)
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#endif
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la r1, STKFRAME_SZ(r1)
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lwz r5, 4(r1)
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@ -151,25 +185,28 @@ cb_memset:
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/* Okay, we know the cache line size (r9) and shift value (r10) */
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cb_cacheline_known:
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#ifdef PIC
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lwz r5, cache_size@got(r10)
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lwz r9, 0(r5)
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lwz r5, cache_info@got(r10)
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lwz r9, 4(r5)
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lwz r5, cache_sh@got(r10)
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lwz r10, 0(r5)
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#else
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lis r9, cache_size@ha
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lwz r9, cache_size@l(r9)
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lis r9, cache_info+4@ha
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lwz r9, cache_info+4@l(r9)
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lis r10, cache_sh@ha
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lwz r10, cache_sh@l(r10)
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#endif
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#else /* _KERNEL */
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li r9, CACHELINESIZE
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#if CACHELINESIZE == 32
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#define CACHELINESHIFT 5
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#ifdef MULTIPROCESSOR
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mfspr r10, 0 /* Get cpu_info pointer */
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#else
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#error Define CACHELINESHIFT for your CACHELINESIZE
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lis r10, cpu_info_store@ha
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addi r10, r10, cpu_info_store@l
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#endif
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li r10, CACHELINESHIFT
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lwz r9, CPU_CI+4(r10) /* Load D$ line size */
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cntlzw r10, r9 /* Calculate shift.. */
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li r6, 31
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subf r10, r10, r6
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#endif /* _KERNEL */
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/* Back in memory filling business */
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@ -328,7 +365,7 @@ sf_bytewise:
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/*----------------------------------------------------------------------*/
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#ifndef _KERNEL
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.data
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cache_size: .long -1
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cache_info: .long -1, -1, -1, -1
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cache_sh: .long 0
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#endif
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@ -1,4 +1,4 @@
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/* $NetBSD: syncicache.c,v 1.4 2001/08/22 21:19:58 matt Exp $ */
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/* $NetBSD: syncicache.c,v 1.5 2002/03/13 00:59:29 eeh Exp $ */
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/*
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* Copyright (C) 1995-1997, 1999 Wolfgang Solfrank.
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@ -40,54 +40,89 @@
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#include <machine/cpu.h>
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#if defined(_KERNEL) || defined(_STANDALONE)
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#if defined(_STANDALONE)
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#ifndef CACHELINESIZE
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#error "Must know the size of a cache line"
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#endif
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static struct _cache_info {
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CACHELINESIZE,
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CACHELINESIZE,
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CACHELINESIZE,
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CACHELINESIZE
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};
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#define CACHEINFO _cache_info
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#elif defined(_KERNEL)
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#define CACHEINFO (curcpu()->ci_ci)
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#else
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static void getcachelinesize __P((void));
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static void getcachelinesize (void);
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static int _cachelinesize;
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#define CACHELINESIZE _cachelinesize
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static int _cachelinesize = 0;
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static struct cache_info _cache_info;
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#define CACHEINFO _cache_info
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static void
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getcachelinesize()
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getcachelinesize(void)
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{
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static int cachemib[] = { CTL_MACHDEP, CPU_CACHELINE };
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int clen = sizeof(_cachelinesize);
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static int cacheinfomib[] = { CTL_MACHDEP, CPU_CACHEINFO };
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size_t clen = sizeof(_cache_info);
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if (sysctl(cacheinfomib, sizeof(cacheinfomib) / sizeof(cacheinfomib[0]),
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&_cache_info, &clen, NULL, 0) == 0) {
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_cachelinesize = _cache_info.dcache_line_size;
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return;
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}
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/* Try older deprecated sysctl */
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clen = sizeof(_cachelinesize);
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if (sysctl(cachemib, sizeof(cachemib) / sizeof(cachemib[0]),
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&_cachelinesize, &clen, NULL, 0) < 0
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|| !_cachelinesize)
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abort();
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_cache_info.dcache_size = _cachelinesize;
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_cache_info.dcache_line_size = _cachelinesize;
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_cache_info.icache_size = _cachelinesize;
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_cache_info.icache_line_size = _cachelinesize;
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/* If there is no cache, indicate we have issued the sysctl. */
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if (!_cachelinesize) _cachelinesize = 1;
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}
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#endif
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void
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__syncicache(from, len)
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void *from;
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int len;
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__syncicache(void *from, int len)
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{
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int l, off;
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char *p;
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int linesz;
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#if !defined(_KERNEL) && !defined(_STANDALONE)
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if (!_cachelinesize)
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getcachelinesize();
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#endif
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off = (u_int)from & (CACHELINESIZE - 1);
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l = len += off;
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p = (char *)from - off;
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do {
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__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
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p += CACHELINESIZE;
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} while ((l -= CACHELINESIZE) > 0);
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if (CACHEINFO.dcache_size > 0) {
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linesz = CACHEINFO.dcache_line_size;
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off = (u_int)from & (linesz - 1);
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l = len += off;
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p = (char *)from - off;
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do {
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__asm__ __volatile ("dcbst 0,%0" :: "r"(p));
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p += linesz;
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} while ((l -= linesz) > 0);
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}
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__asm__ __volatile ("sync");
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p = (char *)from - off;
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do {
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__asm__ __volatile ("icbi 0,%0" :: "r"(p));
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p += CACHELINESIZE;
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} while ((len -= CACHELINESIZE) > 0);
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__asm__ __volatile ("sync"); /* required on 7450 */
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if (CACHEINFO.icache_size > 0 ) {
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linesz = CACHEINFO.icache_line_size;
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off = (u_int)from & (linesz - 1);
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p = (char *)from - off;
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do {
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__asm__ __volatile ("icbi 0,%0" :: "r"(p));
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p += linesz;
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} while ((len -= linesz) > 0);
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}
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__asm__ __volatile ("isync");
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}
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