- #define the physical start of RAM.
- Set up a Panic Stack, - Don't pre-map the sysfpga at this time. - Calculate the CPU speed only if SH5_CPU_SPEED isn't defined. - On a related note, make the CPU speed probing code more accurate. - Print the CPU speed at startup. - Force RB_SINGLE for now, at least until I get a bootloader written.
This commit is contained in:
parent
e94347123e
commit
4b8905020d
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@ -1,4 +1,4 @@
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/* $NetBSD: machdep.c,v 1.3 2002/08/25 20:21:36 thorpej Exp $ */
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/* $NetBSD: machdep.c,v 1.4 2002/09/04 15:14:46 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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@ -35,6 +35,8 @@
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "opt_sh5_debug.h"
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#include "opt_sh5_cpu.h"
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#include "dtfcons.h"
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#include <sys/param.h>
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@ -67,8 +69,10 @@
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#include <evbsh5/evbsh5/machdep.h>
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#ifndef SH5_CPU_SPEED
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static void compute_ctc_tick_per_us(void);
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#endif
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struct boot_params evbsh5_bootparams;
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struct vm_map *exec_map;
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@ -79,6 +83,8 @@ char machine[] = MACHINE;
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char cpu_model[128];
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#define EVBSH5_RAM_START_PHYS 0x80000000
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/*
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* Physical addresses of important devices on the Cayman board
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* which need to be mapped early on during bootstrap to gain
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@ -106,7 +112,7 @@ evbsh5_memory_init(vaddr_t endkernel, struct mem_region *mr)
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ksize = endkernel - SH5_KSEG0_BASE;
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mr[0].mr_start = 0x80000000 + ksize;
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mr[0].mr_start = EVBSH5_RAM_START_PHYS + ksize;
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mr[0].mr_kvastart = SH5_KSEG0_BASE + ksize;
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mr[0].mr_size = sh5_trunc_page(evbsh5_bootparams.bp_physramsize)- ksize;
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mr[1].mr_start = 0;
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@ -118,6 +124,7 @@ evbsh5_memory_init(vaddr_t endkernel, struct mem_region *mr)
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void
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evbsh5_init(void)
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{
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extern char sh5_panic_stack[];
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#if NDTFCONS > 0
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extern char *_dtf_buffer;
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extern void _dtf_trap_frob(void);
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@ -125,6 +132,11 @@ evbsh5_init(void)
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paddr_t frob_p;
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#endif
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/* XXX: Will need to be revisited for SMP */
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curcpu()->ci_panicstkphys = EVBSH5_RAM_START_PHYS +
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(((uintptr_t)&sh5_panic_stack[0]) - SH5_KSEG0_BASE) +
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(USPACE - sizeof(struct trapframe));
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/*
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* Fix up the cpu-specific TLB/cache manipulation functions
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*/
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@ -138,10 +150,11 @@ evbsh5_init(void)
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#if NDTFCONS > 0
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dtfbuf = (vaddr_t) &_dtf_buffer;
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frob_p = (paddr_t) (uintptr_t) _dtf_trap_frob;
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frob_p = 0x80000000 + (frob_p - SH5_KSEG0_BASE);
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frob_p = EVBSH5_RAM_START_PHYS + (frob_p - SH5_KSEG0_BASE);
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dtf_init(0xc100018, frob_p,
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(paddr_t)(0x80000000 + (dtfbuf - SH5_KSEG0_BASE)), dtfbuf);
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(paddr_t)(EVBSH5_RAM_START_PHYS + (dtfbuf - SH5_KSEG0_BASE)),
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dtfbuf);
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#endif
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/*
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@ -150,20 +163,22 @@ evbsh5_init(void)
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bus_space_map(&_sh5_bus_space_tag, EVBSH5_PBRIDGE_PHYS_ADDR,
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EVBSH5_PBRIDGE_LEN, 0, &_evbsh5_bh_pbridge);
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#ifdef notyet
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/*
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* Map the system FPGA/Super IO area
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*/
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bus_space_map(&_sh5_bus_space_tag, EVBSH5_SYSFPGA_PHYS_ADDR,
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EVBSH5_SYSFPGA_LEN, 0, &_evbsh5_bh_sysfpga);
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#endif
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/*
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* Figure out how fast the CPU is
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*
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* XXX: Should just read the relevant system FPGA bits ...
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*/
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#ifndef SH5_CPU_SPEED
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compute_ctc_tick_per_us();
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#else
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_sh5_ctc_ticks_per_us = SH5_CPU_SPEED;
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#endif
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}
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#ifndef SH5_CPU_SPEED
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static void
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compute_ctc_tick_per_us(void)
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{
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@ -193,10 +208,14 @@ compute_ctc_tick_per_us(void)
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* Fetch the current value of the 128Hz RTC counter and
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* add 16 so we can time the loop to pretty much exactly 125mS
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*/
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r64cnt = (rtc_read_r64cnt(bt, bh) + 16) & RTC_R64CNT_MASK;
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r64cnt = rtc_read_r64cnt(bt, bh);
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while (r64cnt == rtc_read_r64cnt(bt, bh))
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;
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__asm __volatile("putcon %0, ctc" :: "r"(ctcstart));
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r64cnt = (r64cnt + 17) & RTC_R64CNT_MASK;
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/*
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* Wait 125mS
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*/
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@ -213,6 +232,7 @@ compute_ctc_tick_per_us(void)
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bus_space_unmap(bt, bh, RTC_REG_SIZE);
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}
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#endif
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void
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cpu_startup(void)
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vsize_t size;
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char pbuf[16];
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strcpy(cpu_model, "SuperH SH-5 STB1");
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boothowto = RB_SINGLE;
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/*
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* Find out how much space we need, allocate it,
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nmbclusters * mclbytes, VM_MAP_INTRSAFE,
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FALSE, NULL);
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printf("%s%s\n", version, cpu_model);
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strcpy(cpu_model, "SuperH SH5");
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printf("%s%s running at %dMHz\n", version, cpu_model,
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(u_int)_sh5_ctc_ticks_per_us);
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format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
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printf("total memory = %s\n", pbuf);
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format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
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