-add 2 subclasses new in rev. 3.0 of the spec, and fix a pasto in another
-get power management rev printing right
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05a790f438
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@ -1,4 +1,4 @@
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/* $NetBSD: pci_subr.c,v 1.63 2005/12/11 12:22:50 christos Exp $ */
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/* $NetBSD: pci_subr.c,v 1.64 2006/05/31 10:01:18 drochner Exp $ */
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/*
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* Copyright (c) 1997 Zubin D. Dittia. All rights reserved.
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@ -40,7 +40,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.63 2005/12/11 12:22:50 christos Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.64 2006/05/31 10:01:18 drochner Exp $");
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#ifdef _KERNEL_OPT
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#include "opt_pci.h"
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@ -90,6 +90,7 @@ static const struct pci_class pci_subclass_mass_storage[] = {
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{ "RAID", PCI_SUBCLASS_MASS_STORAGE_RAID, },
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{ "ATA", PCI_SUBCLASS_MASS_STORAGE_ATA, },
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{ "SATA", PCI_SUBCLASS_MASS_STORAGE_SATA, },
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{ "SAS", PCI_SUBCLASS_MASS_STORAGE_SAS, },
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{ "miscellaneous", PCI_SUBCLASS_MASS_STORAGE_MISC, },
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{ 0 },
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};
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@ -161,7 +162,8 @@ static const struct pci_class pci_subclass_system[] = {
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{ "8237 DMA", PCI_SUBCLASS_SYSTEM_DMA, },
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{ "8254 timer", PCI_SUBCLASS_SYSTEM_TIMER, },
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{ "RTC", PCI_SUBCLASS_SYSTEM_RTC, },
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{ "PCI Hot-Plug", PCI_SUBCLASS_SYSTEM_RTC, },
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{ "PCI Hot-Plug", PCI_SUBCLASS_SYSTEM_PCIHOTPLUG, },
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{ "SD Host Controller", PCI_SUBCLASS_SYSTEM_SDHC, },
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{ "miscellaneous", PCI_SUBCLASS_SYSTEM_MISC, },
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{ 0 },
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};
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@ -780,6 +782,10 @@ pci_conf_print_caplist(
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#endif
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const pcireg_t *regs, int capoff)
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{
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static const char unk[] = "unknown";
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static const char *pmrev[8] = {
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unk, "1.0", "1.1", "1.2", unk, unk, unk, unk
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};
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int off;
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pcireg_t rval;
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@ -795,8 +801,8 @@ pci_conf_print_caplist(
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printf("reserved");
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break;
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case PCI_CAP_PWRMGMT:
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printf("Power Management, rev. %d.0",
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(rval >> 0) & 0x07); /* XXX not clear */
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printf("Power Management, rev. %s",
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pmrev[(rval >> 0) & 0x07]);
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break;
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case PCI_CAP_AGP:
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printf("AGP, rev. %d.%d",
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@ -1,4 +1,4 @@
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/* $NetBSD: pcireg.h,v 1.49 2006/03/01 18:53:40 gdamore Exp $ */
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/* $NetBSD: pcireg.h,v 1.50 2006/05/31 10:01:18 drochner Exp $ */
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/*
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* Copyright (c) 1995, 1996, 1999, 2000
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@ -169,6 +169,7 @@ typedef u_int8_t pci_revision_t;
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#define PCI_SUBCLASS_MASS_STORAGE_RAID 0x04
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#define PCI_SUBCLASS_MASS_STORAGE_ATA 0x05
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#define PCI_SUBCLASS_MASS_STORAGE_SATA 0x06
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#define PCI_SUBCLASS_MASS_STORAGE_SAS 0x07
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#define PCI_SUBCLASS_MASS_STORAGE_MISC 0x80
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/* 0x02 network subclasses */
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@ -227,6 +228,7 @@ typedef u_int8_t pci_revision_t;
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#define PCI_SUBCLASS_SYSTEM_TIMER 0x02
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#define PCI_SUBCLASS_SYSTEM_RTC 0x03
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#define PCI_SUBCLASS_SYSTEM_PCIHOTPLUG 0x04
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#define PCI_SUBCLASS_SYSTEM_SDHC 0x05
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#define PCI_SUBCLASS_SYSTEM_MISC 0x80
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/* 0x09 input subclasses */
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