From 4ada7c5071c8e87a40147f062f3da288321fc61f Mon Sep 17 00:00:00 2001 From: dyoung Date: Fri, 1 Jul 2011 17:28:55 +0000 Subject: [PATCH] Add new files involved in the bus.h->bus_defs.h/bus_funcs.h split. --- sys/arch/mips/include/bus_dma_defs.h | 295 +++++++++++++++++++ sys/arch/mips/include/bus_dma_funcs.h | 146 ++++++++++ sys/arch/mips/include/bus_space_defs.h | 331 ++++++++++++++++++++++ sys/arch/mips/include/bus_space_funcs.h | 313 ++++++++++++++++++++ sys/arch/powerpc/include/ofw_bus_defs.h | 46 +++ sys/arch/powerpc/include/ofw_bus_funcs.h | 47 +++ sys/arch/powerpc/include/prep_bus_defs.h | 51 ++++ sys/arch/powerpc/include/prep_bus_funcs.h | 48 ++++ 8 files changed, 1277 insertions(+) create mode 100644 sys/arch/mips/include/bus_dma_defs.h create mode 100644 sys/arch/mips/include/bus_dma_funcs.h create mode 100644 sys/arch/mips/include/bus_space_defs.h create mode 100644 sys/arch/mips/include/bus_space_funcs.h create mode 100644 sys/arch/powerpc/include/ofw_bus_defs.h create mode 100644 sys/arch/powerpc/include/ofw_bus_funcs.h create mode 100644 sys/arch/powerpc/include/prep_bus_defs.h create mode 100644 sys/arch/powerpc/include/prep_bus_funcs.h diff --git a/sys/arch/mips/include/bus_dma_defs.h b/sys/arch/mips/include/bus_dma_defs.h new file mode 100644 index 000000000000..23ffe368dc0c --- /dev/null +++ b/sys/arch/mips/include/bus_dma_defs.h @@ -0,0 +1,295 @@ +/* $NetBSD: bus_dma_defs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $ */ + +/*- + * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (c) 1996 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#ifndef _MIPS_BUS_DMA_DEFS_H_ +#define _MIPS_BUS_DMA_DEFS_H_ + +#include + +#ifdef _KERNEL +/* + * Bus DMA methods. + */ + +/* + * Flags used in various bus DMA methods. + */ +#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ +#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ +#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ +#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ +#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ +#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ +#define BUS_DMA_BUS2 0x020 +#define BUS_DMA_BUS3 0x040 +#define BUS_DMA_BUS4 0x080 +#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ +#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ +#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ + +/* + * Private flags stored in the DMA map. + */ +#define _BUS_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ + +/* Forwards needed by prototypes below. */ +struct mbuf; +struct uio; + +/* + * Operations performed by bus_dmamap_sync(). + */ +#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ +#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ +#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ +#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ + +typedef struct mips_bus_dma_tag *bus_dma_tag_t; +typedef struct mips_bus_dmamap *bus_dmamap_t; + +/* + * bus_dma_segment_t + * + * Describes a single contiguous DMA transaction. Values + * are suitable for programming into DMA registers. + */ +struct mips_bus_dma_segment { + bus_addr_t ds_addr; /* DMA address */ + bus_size_t ds_len; /* length of transfer */ + bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */ +}; +typedef struct mips_bus_dma_segment bus_dma_segment_t; + +/* + * DMA mapping methods. + */ +struct mips_bus_dmamap_ops { + int (*dmamap_create)(bus_dma_tag_t, bus_size_t, int, + bus_size_t, bus_size_t, int, bus_dmamap_t *); + void (*dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); + int (*dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, + bus_size_t, struct proc *, int); + int (*dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, + struct mbuf *, int); + int (*dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, + struct uio *, int); + int (*dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, + bus_dma_segment_t *, int, bus_size_t, int); + void (*dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); + void (*dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, + bus_addr_t, bus_size_t, int); +}; + +/* + * DMA memory utility functions. + */ +struct mips_bus_dmamem_ops { + int (*dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, + bus_size_t, bus_dma_segment_t *, int, int *, int); + void (*dmamem_free)(bus_dma_tag_t, + bus_dma_segment_t *, int); + int (*dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, + int, size_t, void **, int); + void (*dmamem_unmap)(bus_dma_tag_t, void *, size_t); + paddr_t (*dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, + int, off_t, int, int); +}; + +/* + * DMA tag utility functions. + */ +struct mips_bus_dmatag_ops { + int (*dmatag_subregion)(bus_dma_tag_t, bus_addr_t, bus_addr_t, + bus_dma_tag_t *, int); + void (*dmatag_destroy)(bus_dma_tag_t); +}; + +/* + * bus_dma_tag_t + * + * A machine-dependent opaque type describing the implementation of + * DMA for a given bus. + */ +struct mips_bus_dma_tag { + void *_cookie; /* cookie used in the guts */ + + bus_addr_t _wbase; /* DMA window base */ + int _tag_needs_free; /* number of references (maybe 0) */ + bus_addr_t _bounce_thresh; + bus_addr_t _bounce_alloc_lo; /* physical base of the window */ + bus_addr_t _bounce_alloc_hi; /* physical limit of the windows */ + int (*_may_bounce)(bus_dma_tag_t, bus_dmamap_t, int, int *); + + struct mips_bus_dmamap_ops _dmamap_ops; + struct mips_bus_dmamem_ops _dmamem_ops; + struct mips_bus_dmatag_ops _dmatag_ops; +}; + +/* + * bus_dmamap_t + * + * Describes a DMA mapping. + */ +struct mips_bus_dmamap { + /* + * PRIVATE MEMBERS: not for use my machine-independent code. + */ + bus_size_t _dm_size; /* largest DMA transfer mappable */ + int _dm_segcnt; /* number of segs this map can map */ + bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ + bus_size_t _dm_boundary; /* don't cross this */ + bus_addr_t _dm_bounce_thresh; /* bounce threshold; see tag */ + int _dm_flags; /* misc. flags */ + struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ + + /* + * Private cookie to be used by the DMA back-end. + */ + void *_dm_cookie; + + /* + * PUBLIC MEMBERS: these are used by machine-independent code. + */ + bus_size_t dm_maxsegsz; /* largest possible segment */ + bus_size_t dm_mapsize; /* size of the mapping */ + int dm_nsegs; /* # valid segments in mapping */ + bus_dma_segment_t dm_segs[1]; /* segments; variable length */ +}; + +#ifdef _MIPS_BUS_DMA_PRIVATE +#define _BUS_AVAIL_END mips_avail_end +/* + * Cookie used for bounce buffers. A pointer to one of these it stashed in + * the DMA map. + */ +struct mips_bus_dma_cookie { + int id_flags; /* flags; see below */ + + /* + * Information about the original buffer used during + * DMA map syncs. Note that origibuflen is only used + * for ID_BUFTYPE_LINEAR. + */ + union { + void *un_origbuf; /* pointer to orig buffer if + bouncing */ + char *un_linearbuf; + struct mbuf *un_mbuf; + struct uio *un_uio; + } id_origbuf_un; +#define id_origbuf id_origbuf_un.un_origbuf +#define id_origlinearbuf id_origbuf_un.un_linearbuf +#define id_origmbuf id_origbuf_un.un_mbuf +#define id_origuio id_origbuf_un.un_uio + bus_size_t id_origbuflen; /* ...and size */ + int id_buftype; /* type of buffer */ + + void *id_bouncebuf; /* pointer to the bounce buffer */ + bus_size_t id_bouncebuflen; /* ...and size */ + int id_nbouncesegs; /* number of valid bounce segs */ + bus_dma_segment_t id_bouncesegs[0]; /* array of bounce buffer + physical memory segments */ +}; + +/* id_flags */ +#endif /* _MIPS_BUS_DMA_PRIVATE */ +#define _BUS_DMA_MIGHT_NEED_BOUNCE 0x01 /* may need bounce buffers */ +#ifdef _MIPS_BUS_DMA_PRIVATE +#define _BUS_DMA_HAS_BOUNCE 0x02 /* has bounce buffers */ +#define _BUS_DMA_IS_BOUNCING 0x04 /* is bouncing current xfer */ + +/* id_buftype */ +#define _BUS_DMA_BUFTYPE_INVALID 0 +#define _BUS_DMA_BUFTYPE_LINEAR 1 +#define _BUS_DMA_BUFTYPE_MBUF 2 +#define _BUS_DMA_BUFTYPE_UIO 3 +#define _BUS_DMA_BUFTYPE_RAW 4 + +extern const struct mips_bus_dmamap_ops mips_bus_dmamap_ops; +extern const struct mips_bus_dmamem_ops mips_bus_dmamem_ops; +extern const struct mips_bus_dmatag_ops mips_bus_dmatag_ops; + +#define _BUS_DMAMAP_OPS_INITIALIZER { \ + .dmamap_create = _bus_dmamap_create, \ + .dmamap_destroy = _bus_dmamap_destroy, \ + .dmamap_load = _bus_dmamap_load, \ + .dmamap_load_mbuf = _bus_dmamap_load_mbuf, \ + .dmamap_load_uio = _bus_dmamap_load_uio, \ + .dmamap_load_raw = _bus_dmamap_load_raw, \ + .dmamap_unload = _bus_dmamap_unload, \ + .dmamap_sync = _bus_dmamap_sync, \ + } + +#define _BUS_DMAMEM_OPS_INITIALIZER { \ + .dmamem_alloc = _bus_dmamem_alloc, \ + .dmamem_free = _bus_dmamem_free, \ + .dmamem_map = _bus_dmamem_map, \ + .dmamem_unmap = _bus_dmamem_unmap, \ + .dmamem_mmap = _bus_dmamem_mmap, \ + } + +#define _BUS_DMATAG_OPS_INITIALIZER { \ + .dmatag_subregion = _bus_dmatag_subregion, \ + .dmatag_destroy = _bus_dmatag_destroy, \ + } +#endif /* _MIPS_BUS_DMA_PRIVATE */ + +#endif /* _KERNEL */ + +#endif /* _MIPS_BUS_DMA_DEFS_H_ */ diff --git a/sys/arch/mips/include/bus_dma_funcs.h b/sys/arch/mips/include/bus_dma_funcs.h new file mode 100644 index 000000000000..862e627ca28f --- /dev/null +++ b/sys/arch/mips/include/bus_dma_funcs.h @@ -0,0 +1,146 @@ +/* $NetBSD: bus_dma_funcs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $ */ + +/*- + * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (c) 1996 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#ifndef _MIPS_BUS_DMA_FUNCS_H_ +#define _MIPS_BUS_DMA_FUNCS_H_ + +#ifdef _KERNEL +/* + * Bus DMA methods. + */ + +/* Forwards needed by prototypes below. */ +struct mbuf; +struct uio; + +#define bus_dmamap_create(t, s, n, m, b, f, p) \ + (*(t)->_dmamap_ops.dmamap_create)((t), (s), (n), (m), (b), (f), (p)) +#define bus_dmamap_destroy(t, p) \ + (*(t)->_dmamap_ops.dmamap_destroy)((t), (p)) +#define bus_dmamap_load(t, m, b, s, p, f) \ + (*(t)->_dmamap_ops.dmamap_load)((t), (m), (b), (s), (p), (f)) +#define bus_dmamap_load_mbuf(t, m, b, f) \ + (*(t)->_dmamap_ops.dmamap_load_mbuf)((t), (m), (b), (f)) +#define bus_dmamap_load_uio(t, m, u, f) \ + (*(t)->_dmamap_ops.dmamap_load_uio)((t), (m), (u), (f)) +#define bus_dmamap_load_raw(t, m, sg, n, s, f) \ + (*(t)->_dmamap_ops.dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) +#define bus_dmamap_unload(t, p) \ + (*(t)->_dmamap_ops.dmamap_unload)((t), (p)) +#define bus_dmamap_sync(t, p, o, l, ops) \ + (*(t)->_dmamap_ops.dmamap_sync)((t), (p), (o), (l), (ops)) + +#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ + (*(t)->_dmamem_ops.dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) +#define bus_dmamem_free(t, sg, n) \ + (*(t)->_dmamem_ops.dmamem_free)((t), (sg), (n)) +#define bus_dmamem_map(t, sg, n, s, k, f) \ + (*(t)->_dmamem_ops.dmamem_map)((t), (sg), (n), (s), (k), (f)) +#define bus_dmamem_unmap(t, k, s) \ + (*(t)->_dmamem_ops.dmamem_unmap)((t), (k), (s)) +#define bus_dmamem_mmap(t, sg, n, o, p, f) \ + (*(t)->_dmamem_ops.dmamem_mmap)((t), (sg), (n), (o), (p), (f)) + +#define bus_dmatag_subregion(t, mna, mxa, nt, f) \ + (*(t)->_dmatag_ops.dmatag_subregion)((t), (mna), (mxa), (nt), (f)) +#define bus_dmatag_destroy(t) \ + (*(t)->_dmatag_ops.dmatag_destroy)((t)) + +#ifdef _MIPS_BUS_DMA_PRIVATE + +int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, + bus_size_t, int, bus_dmamap_t *); +void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); + +int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *, bus_size_t, + struct proc *, int); +int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t, struct mbuf *, int); +int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t, struct uio *, int); +int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t, bus_dma_segment_t *, + int, bus_size_t, int); + +void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); +void _bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, bus_size_t, + int); + +int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, + bus_size_t alignment, bus_size_t boundary, + bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); +int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size, + bus_size_t alignment, bus_size_t boundary, + bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags, + paddr_t low, paddr_t high); +void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, + int nsegs); +int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, + int nsegs, size_t size, void **kvap, int flags); +void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, + size_t size); +paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, + int nsegs, off_t off, int prot, int flags); + +int _bus_dmatag_subregion(bus_dma_tag_t, bus_addr_t, bus_addr_t, + bus_dma_tag_t *, int); +void _bus_dmatag_destroy(bus_dma_tag_t); + +#endif /* _MIPS_BUS_DMA_PRIVATE */ + +#endif /* _KERNEL */ + +#endif /* _MIPS_BUS_DMA_FUNCS_H_ */ diff --git a/sys/arch/mips/include/bus_space_defs.h b/sys/arch/mips/include/bus_space_defs.h new file mode 100644 index 000000000000..a480b89c51c9 --- /dev/null +++ b/sys/arch/mips/include/bus_space_defs.h @@ -0,0 +1,331 @@ +/* $NetBSD: bus_space_defs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $ */ + +/*- + * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (c) 1996 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#ifndef _MIPS_BUS_SPACE_DEFS_H_ +#define _MIPS_BUS_SPACE_DEFS_H_ + +#include + +#ifdef _KERNEL + +#define __BUS_SPACE_HAS_STREAM_METHODS 1 + +/* + * Turn on BUS_SPACE_DEBUG if the global DEBUG option is enabled. + */ +#if defined(DEBUG) && !defined(BUS_SPACE_DEBUG) +#define BUS_SPACE_DEBUG +#endif + +#ifdef BUS_SPACE_DEBUG +#include /* for printf() prototype */ +/* + * Macros for checking the aligned-ness of pointers passed to bus + * space ops. Strict alignment is required by the MIPS architecture, + * and a trap will occur if unaligned access is performed. These + * may aid in the debugging of a broken device driver by displaying + * useful information about the problem. + */ +#define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ + ((((u_long)(p)) & (sizeof(t)-1)) == 0) + +#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ +({ \ + if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ + printf("%s 0x%lx not aligned to %lu bytes %s:%d\n", \ + d, (u_long)(p), (u_long)sizeof(t), \ + __FILE__, __LINE__); \ + } \ + (void) 0; \ +}) + +#define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) +#else +#define __BUS_SPACE_ADDRESS_SANITY(p, t, d) (void) 0 +#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) +#endif /* BUS_SPACE_DEBUG */ +#endif /* _KERNEL */ + +struct mips_bus_space_translation; + +/* + * Addresses (in bus space). + */ +typedef paddr_t bus_addr_t; +typedef psize_t bus_size_t; +#define PRIxBUSADDR PRIxPADDR +#define PRIxBUSSIZE PRIxPSIZE + +/* + * Access methods for bus space. + */ +typedef struct mips_bus_space *bus_space_tag_t; +typedef intptr_t bus_space_handle_t; +#define PRIxBSH PRIxPTR + +struct mips_bus_space { + /* cookie */ + void *bs_cookie; + + /* mapping/unmapping */ + int (*bs_map)(void *, bus_addr_t, bus_size_t, int, + bus_space_handle_t *, int); + void (*bs_unmap)(void *, bus_space_handle_t, bus_size_t, + int); + int (*bs_subregion)(void *, bus_space_handle_t, bus_size_t, + bus_size_t, bus_space_handle_t *); + + /* MIPS SPECIFIC MAPPING METHOD */ + int (*bs_translate)(void *, bus_addr_t, bus_size_t, int, + struct mips_bus_space_translation *); + int (*bs_get_window)(void *, int, + struct mips_bus_space_translation *); + + /* allocation/deallocation */ + int (*bs_alloc)(void *, bus_addr_t, bus_addr_t, + bus_size_t, bus_size_t, bus_size_t, int, + bus_addr_t *, bus_space_handle_t *); + void (*bs_free)(void *, bus_space_handle_t, bus_size_t); + + /* get kernel virtual address */ + void * (*bs_vaddr)(void *, bus_space_handle_t); + + /* mmap for user */ + paddr_t (*bs_mmap)(void *, bus_addr_t, off_t, int, int); + + /* barrier */ + void (*bs_barrier)(void *, bus_space_handle_t, + bus_size_t, bus_size_t, int); + + /* read (single) */ + uint8_t (*bs_r_1)(void *, bus_space_handle_t, bus_size_t); + uint16_t (*bs_r_2)(void *, bus_space_handle_t, bus_size_t); + uint32_t (*bs_r_4)(void *, bus_space_handle_t, bus_size_t); + uint64_t (*bs_r_8)(void *, bus_space_handle_t, bus_size_t); + + /* read multiple */ + void (*bs_rm_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t *, bus_size_t); + void (*bs_rm_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t *, bus_size_t); + void (*bs_rm_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t *, bus_size_t); + void (*bs_rm_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t *, bus_size_t); + + /* read region */ + void (*bs_rr_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t *, bus_size_t); + void (*bs_rr_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t *, bus_size_t); + void (*bs_rr_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t *, bus_size_t); + void (*bs_rr_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t *, bus_size_t); + + /* write (single) */ + void (*bs_w_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t); + void (*bs_w_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t); + void (*bs_w_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t); + void (*bs_w_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t); + + /* write multiple */ + void (*bs_wm_1)(void *, bus_space_handle_t, bus_size_t, + const uint8_t *, bus_size_t); + void (*bs_wm_2)(void *, bus_space_handle_t, bus_size_t, + const uint16_t *, bus_size_t); + void (*bs_wm_4)(void *, bus_space_handle_t, bus_size_t, + const uint32_t *, bus_size_t); + void (*bs_wm_8)(void *, bus_space_handle_t, bus_size_t, + const uint64_t *, bus_size_t); + + /* write region */ + void (*bs_wr_1)(void *, bus_space_handle_t, bus_size_t, + const uint8_t *, bus_size_t); + void (*bs_wr_2)(void *, bus_space_handle_t, bus_size_t, + const uint16_t *, bus_size_t); + void (*bs_wr_4)(void *, bus_space_handle_t, bus_size_t, + const uint32_t *, bus_size_t); + void (*bs_wr_8)(void *, bus_space_handle_t, bus_size_t, + const uint64_t *, bus_size_t); + + /* read (single) stream */ + uint8_t (*bs_rs_1)(void *, bus_space_handle_t, bus_size_t); + uint16_t (*bs_rs_2)(void *, bus_space_handle_t, bus_size_t); + uint32_t (*bs_rs_4)(void *, bus_space_handle_t, bus_size_t); + uint64_t (*bs_rs_8)(void *, bus_space_handle_t, bus_size_t); + + /* read multiple stream */ + void (*bs_rms_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t *, bus_size_t); + void (*bs_rms_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t *, bus_size_t); + void (*bs_rms_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t *, bus_size_t); + void (*bs_rms_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t *, bus_size_t); + + /* read region stream */ + void (*bs_rrs_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t *, bus_size_t); + void (*bs_rrs_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t *, bus_size_t); + void (*bs_rrs_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t *, bus_size_t); + void (*bs_rrs_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t *, bus_size_t); + + /* write (single) stream */ + void (*bs_ws_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t); + void (*bs_ws_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t); + void (*bs_ws_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t); + void (*bs_ws_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t); + + /* write multiple stream */ + void (*bs_wms_1)(void *, bus_space_handle_t, bus_size_t, + const uint8_t *, bus_size_t); + void (*bs_wms_2)(void *, bus_space_handle_t, bus_size_t, + const uint16_t *, bus_size_t); + void (*bs_wms_4)(void *, bus_space_handle_t, bus_size_t, + const uint32_t *, bus_size_t); + void (*bs_wms_8)(void *, bus_space_handle_t, bus_size_t, + const uint64_t *, bus_size_t); + + /* write region stream */ + void (*bs_wrs_1)(void *, bus_space_handle_t, bus_size_t, + const uint8_t *, bus_size_t); + void (*bs_wrs_2)(void *, bus_space_handle_t, bus_size_t, + const uint16_t *, bus_size_t); + void (*bs_wrs_4)(void *, bus_space_handle_t, bus_size_t, + const uint32_t *, bus_size_t); + void (*bs_wrs_8)(void *, bus_space_handle_t, bus_size_t, + const uint64_t *, bus_size_t); + + /* set multiple */ + void (*bs_sm_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t, bus_size_t); + void (*bs_sm_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t, bus_size_t); + void (*bs_sm_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t, bus_size_t); + void (*bs_sm_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t, bus_size_t); + + /* set region */ + void (*bs_sr_1)(void *, bus_space_handle_t, bus_size_t, + uint8_t, bus_size_t); + void (*bs_sr_2)(void *, bus_space_handle_t, bus_size_t, + uint16_t, bus_size_t); + void (*bs_sr_4)(void *, bus_space_handle_t, bus_size_t, + uint32_t, bus_size_t); + void (*bs_sr_8)(void *, bus_space_handle_t, bus_size_t, + uint64_t, bus_size_t); + + /* copy */ + void (*bs_c_1)(void *, bus_space_handle_t, bus_size_t, + bus_space_handle_t, bus_size_t, bus_size_t); + void (*bs_c_2)(void *, bus_space_handle_t, bus_size_t, + bus_space_handle_t, bus_size_t, bus_size_t); + void (*bs_c_4)(void *, bus_space_handle_t, bus_size_t, + bus_space_handle_t, bus_size_t, bus_size_t); + void (*bs_c_8)(void *, bus_space_handle_t, bus_size_t, + bus_space_handle_t, bus_size_t, bus_size_t); +}; + +/* + * Translation of an MIPS bus address; INTERNAL USE ONLY. + */ +struct mips_bus_space_translation { + bus_addr_t mbst_bus_start; /* start of bus window */ + bus_addr_t mbst_bus_end; /* end of bus window */ + paddr_t mbst_sys_start; /* start of sysBus window */ + paddr_t mbst_sys_end; /* end of sysBus window */ + int mbst_align_stride;/* alignment stride */ + int mbst_flags; /* flags; see below */ +}; + +#define BUS_SPACE_MAP_CACHEABLE 0x01 +#define BUS_SPACE_MAP_LINEAR 0x02 +#define BUS_SPACE_MAP_PREFETCHABLE 0x04 + +#ifdef _KERNEL + +#define BUS_SPACE_BARRIER_READ 0x01 +#define BUS_SPACE_BARRIER_WRITE 0x02 + +/* + * New style. + */ +#define BUS_SPACE_BARRIER_SYNC 0x03 +#define BUS_SPACE_BARRIER_READ_BEFORE_READ BUS_SPACE_BARRIER_READ +#define BUS_SPACE_BARRIER_READ_BEFORE_WRITE BUS_SPACE_BARRIER_READ +#define BUS_SPACE_BARRIER_WRITE_BEFORE_READ BUS_SPACE_BARRIER_WRITE +#define BUS_SPACE_BARRIER_WRITE_BEFORE_WRITE BUS_SPACE_BARRIER_WRITE + +#endif /* _KERNEL */ + +#endif /* _MIPS_BUS_SPACE_DEFS_H_ */ diff --git a/sys/arch/mips/include/bus_space_funcs.h b/sys/arch/mips/include/bus_space_funcs.h new file mode 100644 index 000000000000..15b8bcff09ba --- /dev/null +++ b/sys/arch/mips/include/bus_space_funcs.h @@ -0,0 +1,313 @@ +/* $NetBSD: bus_space_funcs.h,v 1.1 2011/07/01 17:28:55 dyoung Exp $ */ + +/*- + * Copyright (c) 1997, 1998, 2000, 2001 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, + * NASA Ames Research Center. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/* + * Copyright (c) 1996 Carnegie-Mellon University. + * All rights reserved. + * + * Author: Chris G. Demetriou + * + * Permission to use, copy, modify and distribute this software and + * its documentation is hereby granted, provided that both the copyright + * notice and this permission notice appear in all copies of the + * software, derivative works or modified versions, and any portions + * thereof, and that both notices appear in supporting documentation. + * + * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" + * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND + * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. + * + * Carnegie Mellon requests users of this software to return to + * + * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU + * School of Computer Science + * Carnegie Mellon University + * Pittsburgh PA 15213-3890 + * + * any improvements or extensions that they make and grant Carnegie the + * rights to redistribute these changes. + */ + +#ifndef _MIPS_BUS_SPACE_FUNCS_H_ +#define _MIPS_BUS_SPACE_FUNCS_H_ + +#ifdef _KERNEL +/* + * Utility macros; INTERNAL USE ONLY. + */ +#define __bs_c(a,b) __CONCAT(a,b) +#define __bs_opname(op,size) __bs_c(__bs_c(__bs_c(bs_,op),_),size) + +#define __bs_r(type, sz, tn, t, h, o) \ + (__BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"), \ + (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o)) + +#define __bs_w(type, sz, tn, t, h, o, v) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ + (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v); \ +} while (0) + +#define __bs_nonsingle(type, sz, tn, t, h, o, a, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((a), tn, "buffer"); \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ + (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, a, c); \ +} while (0) + +#define __bs_set(type, sz, tn, t, h, o, v, c) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h) + (o), tn, "bus addr"); \ + (*(t)->__bs_opname(type,sz))((t)->bs_cookie, h, o, v, c); \ +} while (0) + +#define __bs_copy(sz, tn, t, h1, o1, h2, o2, cnt) \ +do { \ + __BUS_SPACE_ADDRESS_SANITY((h1) + (o1), tn, "bus addr 1"); \ + __BUS_SPACE_ADDRESS_SANITY((h2) + (o2), tn, "bus addr 2"); \ + (*(t)->__bs_opname(c,sz))((t)->bs_cookie, h1, o1, h2, o2, cnt); \ +} while (0) + + +/* + * Mapping and unmapping operations. + */ +#define bus_space_map(t, a, s, f, hp) \ + (*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp), 1) +#define mips_bus_space_map_noacct(t, a, s, f, hp) \ + (*(t)->bs_map)((t)->bs_cookie, (a), (s), (f), (hp), 0) +#define bus_space_unmap(t, h, s) \ + (*(t)->bs_unmap)((t)->bs_cookie, (h), (s), 1) +#define mips_bus_space_unmap_noacct(t, h, s) \ + (*(t)->bs_unmap)((t)->bs_cookie, (h), (s), 0) +#define bus_space_subregion(t, h, o, s, hp) \ + (*(t)->bs_subregion)((t)->bs_cookie, (h), (o), (s), (hp)) + +#define mips_bus_space_translate(t, a, s, f, bst) \ + (*(t)->bs_translate)((t)->bs_cookie, (a), (s), (f), (bst)) +#define mips_bus_space_get_window(t, w, bst) \ + (*(t)->bs_get_window)((t)->bs_cookie, (w), (bst)) + +/* + * Allocation and deallocation operations. + */ +#define bus_space_alloc(t, rs, re, s, a, b, f, ap, hp) \ + (*(t)->bs_alloc)((t)->bs_cookie, (rs), (re), (s), (a), (b), \ + (f), (ap), (hp)) +#define bus_space_free(t, h, s) \ + (*(t)->bs_free)((t)->bs_cookie, (h), (s)) + +/* + * Get kernel virtual address for ranges mapped BUS_SPACE_MAP_LINEAR. + */ +#define bus_space_vaddr(t, h) \ + (*(t)->bs_vaddr)((t)->bs_cookie, (h)) + +/* + * Mmap bus space for a user application. + */ +#define bus_space_mmap(t, a, o, p, f) \ + (*(t)->bs_mmap)((t)->bs_cookie, (a), (o), (p), (f)) + +/* + * Bus barrier operations. + */ +#define bus_space_barrier(t, h, o, l, f) \ + (*(t)->bs_barrier)((t)->bs_cookie, (h), (o), (l), (f)) + +/* + * Bus read (single) operations. + */ +#define bus_space_read_1(t, h, o) \ + __bs_r(r,1,uint8_t,(t),(h),(o)) +#define bus_space_read_2(t, h, o) \ + __bs_r(r,2,uint16_t,(t),(h),(o)) +#define bus_space_read_4(t, h, o) \ + __bs_r(r,4,uint32_t,(t),(h),(o)) +#define bus_space_read_8(t, h, o) \ + __bs_r(r,8,uint64_t,(t),(h),(o)) +#define bus_space_read_stream_1(t, h, o) \ + __bs_r(rs,1,uint8_t,(t),(h),(o)) +#define bus_space_read_stream_2(t, h, o) \ + __bs_r(rs,2,uint16_t,(t),(h),(o)) +#define bus_space_read_stream_4(t, h, o) \ + __bs_r(rs,4,uint32_t,(t),(h),(o)) +#define bus_space_read_stream_8(t, h, o) \ + __bs_r(rs,8,uint64_t,(t),(h),(o)) + + +/* + * Bus read multiple operations. + */ +#define bus_space_read_multi_1(t, h, o, a, c) \ + __bs_nonsingle(rm,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_2(t, h, o, a, c) \ + __bs_nonsingle(rm,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_4(t, h, o, a, c) \ + __bs_nonsingle(rm,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_8(t, h, o, a, c) \ + __bs_nonsingle(rm,8,uint64_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_stream_1(t, h, o, a, c) \ + __bs_nonsingle(rms,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_stream_2(t, h, o, a, c) \ + __bs_nonsingle(rms,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_stream_4(t, h, o, a, c) \ + __bs_nonsingle(rms,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_read_multi_stream_8(t, h, o, a, c) \ + __bs_nonsingle(rms,8,uint64_t,(t),(h),(o),(a),(c)) + + +/* + * Bus read region operations. + */ +#define bus_space_read_region_1(t, h, o, a, c) \ + __bs_nonsingle(rr,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_2(t, h, o, a, c) \ + __bs_nonsingle(rr,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_4(t, h, o, a, c) \ + __bs_nonsingle(rr,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_8(t, h, o, a, c) \ + __bs_nonsingle(rr,8,uint64_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_stream_1(t, h, o, a, c) \ + __bs_nonsingle(rrs,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_stream_2(t, h, o, a, c) \ + __bs_nonsingle(rrs,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_stream_4(t, h, o, a, c) \ + __bs_nonsingle(rrs,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_read_region_stream_8(t, h, o, a, c) \ + __bs_nonsingle(rrs,8,uint64_t,(t),(h),(o),(a),(c)) + + +/* + * Bus write (single) operations. + */ +#define bus_space_write_1(t, h, o, v) \ + __bs_w(w,1,uint8_t,(t),(h),(o),(v)) +#define bus_space_write_2(t, h, o, v) \ + __bs_w(w,2,uint16_t,(t),(h),(o),(v)) +#define bus_space_write_4(t, h, o, v) \ + __bs_w(w,4,uint32_t,(t),(h),(o),(v)) +#define bus_space_write_8(t, h, o, v) \ + __bs_w(w,8,uint64_t,(t),(h),(o),(v)) +#define bus_space_write_stream_1(t, h, o, v) \ + __bs_w(ws,1,uint8_t,(t),(h),(o),(v)) +#define bus_space_write_stream_2(t, h, o, v) \ + __bs_w(ws,2,uint16_t,(t),(h),(o),(v)) +#define bus_space_write_stream_4(t, h, o, v) \ + __bs_w(ws,4,uint32_t,(t),(h),(o),(v)) +#define bus_space_write_stream_8(t, h, o, v) \ + __bs_w(ws,8,uint64_t,(t),(h),(o),(v)) + + +/* + * Bus write multiple operations. + */ +#define bus_space_write_multi_1(t, h, o, a, c) \ + __bs_nonsingle(wm,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_2(t, h, o, a, c) \ + __bs_nonsingle(wm,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_4(t, h, o, a, c) \ + __bs_nonsingle(wm,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_8(t, h, o, a, c) \ + __bs_nonsingle(wm,8,uint64_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_stream_1(t, h, o, a, c) \ + __bs_nonsingle(wms,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_stream_2(t, h, o, a, c) \ + __bs_nonsingle(wms,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_stream_4(t, h, o, a, c) \ + __bs_nonsingle(wms,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_write_multi_stream_8(t, h, o, a, c) \ + __bs_nonsingle(wms,8,uint64_t,(t),(h),(o),(a),(c)) + + +/* + * Bus write region operations. + */ +#define bus_space_write_region_1(t, h, o, a, c) \ + __bs_nonsingle(wr,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_2(t, h, o, a, c) \ + __bs_nonsingle(wr,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_4(t, h, o, a, c) \ + __bs_nonsingle(wr,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_8(t, h, o, a, c) \ + __bs_nonsingle(wr,8,uint64_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_stream_1(t, h, o, a, c) \ + __bs_nonsingle(wrs,1,uint8_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_stream_2(t, h, o, a, c) \ + __bs_nonsingle(wrs,2,uint16_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_stream_4(t, h, o, a, c) \ + __bs_nonsingle(wrs,4,uint32_t,(t),(h),(o),(a),(c)) +#define bus_space_write_region_stream_8(t, h, o, a, c) \ + __bs_nonsingle(wrs,8,uint64_t,(t),(h),(o),(a),(c)) + + +/* + * Set multiple operations. + */ +#define bus_space_set_multi_1(t, h, o, v, c) \ + __bs_set(sm,1,uint8_t,(t),(h),(o),(v),(c)) +#define bus_space_set_multi_2(t, h, o, v, c) \ + __bs_set(sm,2,uint16_t,(t),(h),(o),(v),(c)) +#define bus_space_set_multi_4(t, h, o, v, c) \ + __bs_set(sm,4,uint32_t,(t),(h),(o),(v),(c)) +#define bus_space_set_multi_8(t, h, o, v, c) \ + __bs_set(sm,8,uint64_t,(t),(h),(o),(v),(c)) + + +/* + * Set region operations. + */ +#define bus_space_set_region_1(t, h, o, v, c) \ + __bs_set(sr,1,uint8_t,(t),(h),(o),(v),(c)) +#define bus_space_set_region_2(t, h, o, v, c) \ + __bs_set(sr,2,uint16_t,(t),(h),(o),(v),(c)) +#define bus_space_set_region_4(t, h, o, v, c) \ + __bs_set(sr,4,uint32_t,(t),(h),(o),(v),(c)) +#define bus_space_set_region_8(t, h, o, v, c) \ + __bs_set(sr,8,uint64_t,(t),(h),(o),(v),(c)) + + +/* + * Copy region operations. + */ +#define bus_space_copy_region_1(t, h1, o1, h2, o2, c) \ + __bs_copy(1, uint8_t, (t), (h1), (o1), (h2), (o2), (c)) +#define bus_space_copy_region_2(t, h1, o1, h2, o2, c) \ + __bs_copy(2, uint16_t, (t), (h1), (o1), (h2), (o2), (c)) +#define bus_space_copy_region_4(t, h1, o1, h2, o2, c) \ + __bs_copy(4, uint32_t, (t), (h1), (o1), (h2), (o2), (c)) +#define bus_space_copy_region_8(t, h1, o1, h2, o2, c) \ + __bs_copy(8, uint64_t, (t), (h1), (o1), (h2), (o2), (c)) + +#endif /* _KERNEL */ + +#endif /* _MIPS_BUS_SPACE_FUNCS_H_ */ diff --git a/sys/arch/powerpc/include/ofw_bus_defs.h b/sys/arch/powerpc/include/ofw_bus_defs.h new file mode 100644 index 000000000000..756817a346ad --- /dev/null +++ b/sys/arch/powerpc/include/ofw_bus_defs.h @@ -0,0 +1,46 @@ +/* $NetBSD: ofw_bus_defs.h,v 1.1 2011/07/01 17:29:39 dyoung Exp $ */ + +/*- + * Copyright (c) 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Tim Rightnour + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_OFW_BUS_DEFS_H_ +#define _POWERPC_OFW_BUS_DEFS_H_ + +#define RANGE_TYPE_PCI 1 +#define RANGE_TYPE_ISA 2 +#define RANGE_TYPE_MACIO 3 +#define RANGE_TYPE_FIRSTPCI 4 +#define RANGE_IO 1 +#define RANGE_MEM 2 + +#ifndef EXSTORAGE_MAX +#define EXSTORAGE_MAX 12 +#endif + +#endif /* _POWERPC_OFW_BUS_DEFS_H_ */ diff --git a/sys/arch/powerpc/include/ofw_bus_funcs.h b/sys/arch/powerpc/include/ofw_bus_funcs.h new file mode 100644 index 000000000000..532842b7120f --- /dev/null +++ b/sys/arch/powerpc/include/ofw_bus_funcs.h @@ -0,0 +1,47 @@ +/* $NetBSD: ofw_bus_funcs.h,v 1.1 2011/07/01 17:29:39 dyoung Exp $ */ + +/*- + * Copyright (c) 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Tim Rightnour + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_OFW_BUS_FUNCS_H_ +#define _POWERPC_OFW_BUS_FUNCS_H_ + +#ifdef _KERNEL +extern struct powerpc_bus_space genppc_isa_io_space_tag; +extern struct powerpc_bus_space genppc_isa_mem_space_tag; + +#include + +void ofwoea_bus_space_init(void); +void ofwoea_initppc(u_int, u_int, char *); +void ofwoea_batinit(void); +int ofwoea_map_space(int, int, int, struct powerpc_bus_space *, const char *); +#endif + +#endif /* _POWERPC_OFW_BUS_FUNCS_H_ */ diff --git a/sys/arch/powerpc/include/prep_bus_defs.h b/sys/arch/powerpc/include/prep_bus_defs.h new file mode 100644 index 000000000000..81e1fc8a5cbf --- /dev/null +++ b/sys/arch/powerpc/include/prep_bus_defs.h @@ -0,0 +1,51 @@ +/* $NetBSD: prep_bus_defs.h,v 1.1 2011/07/01 17:29:39 dyoung Exp $ */ + +/*- + * Copyright (c) 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Tim Rightnour + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_PREP_BUS_DEFS_H_ +#define _POWERPC_PREP_BUS_DEFS_H_ + +#define PREP_BUS_SPACE_IO 0x80000000 +#define PREP_BUS_SPACE_MEM 0xC0000000 + +#define PHYS_TO_BUS_MEM(t,x) ((x) | PREP_BUS_SPACE_IO) +#define BUS_MEM_TO_PHYS(t,x) ((x) & ~PREP_BUS_SPACE_IO) + +#define PREP_PHYS_SIZE_IO 0x3f800000 +#define PREP_PHYS_SIZE_MEM 0x3f000000 +#define PREP_ISA_SIZE_IO 0x00010000 +#define PREP_ISA_SIZE_MEM 0x01000000 +#define PREP_EISA_SIZE_IO 0x0000f000 +#define PREP_EISA_SIZE_MEM 0x3f000000 + +#define PREP_PHYS_RESVD_START_IO 0x10000 +#define PREP_PHYS_RESVD_SIZE_IO 0x7F0000 + +#endif /* _POWERPC_PREP_BUS_DEFS_H_ */ diff --git a/sys/arch/powerpc/include/prep_bus_funcs.h b/sys/arch/powerpc/include/prep_bus_funcs.h new file mode 100644 index 000000000000..fd3e5b97959f --- /dev/null +++ b/sys/arch/powerpc/include/prep_bus_funcs.h @@ -0,0 +1,48 @@ +/* $NetBSD: prep_bus_funcs.h,v 1.1 2011/07/01 17:29:39 dyoung Exp $ */ + +/*- + * Copyright (c) 2007 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Tim Rightnour + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _POWERPC_PREP_BUS_FUNCS_H_ +#define _POWERPC_PREP_BUS_FUNCS_H_ + +#ifdef _KERNEL +extern struct powerpc_bus_space prep_io_space_tag; +extern struct powerpc_bus_space genppc_isa_io_space_tag; +extern struct powerpc_bus_space prep_mem_space_tag; +extern struct powerpc_bus_space genppc_isa_mem_space_tag; + +#include + +void prep_bus_space_init(void); +void prep_initppc(u_long, u_long, u_int); +void mem_regions(struct mem_region **, struct mem_region **); +#endif + +#endif /* _POWERPC_PREP_BUS_FUNCS_H_ */