sp_tlb_flush - consistent whitespace in inline asm.
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@ -1,4 +1,4 @@
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/* $NetBSD: pmap.c,v 1.373 2021/01/24 07:36:54 mrg Exp $ */
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/* $NetBSD: pmap.c,v 1.374 2021/08/07 19:23:03 uwe Exp $ */
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/*
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* Copyright (c) 1996
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@ -56,7 +56,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.373 2021/01/24 07:36:54 mrg Exp $");
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__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.374 2021/08/07 19:23:03 uwe Exp $");
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#include "opt_ddb.h"
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#include "opt_kgdb.h"
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@ -663,13 +663,13 @@ sp_tlb_flush(int va, int ctx, int lvl)
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opsr = getpsr(); /* KDASSERT(opsr & PSR_ET); */
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__asm volatile ("wr %0, %1, %%psr"
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:: "r"(opsr), "n"(PSR_ET) : "memory");
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__asm volatile ("nop; nop;nop");
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__asm volatile ("nop; nop; nop");
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octx = getcontext4m(); /* save context */
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/* Do the TLB flush in "ctx" */
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setcontext4m(ctx);
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__asm volatile("sta %%g0, [%0]%1" :: "r"(va), "n"(ASI_SRMMUFP));
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__asm volatile ("sta %%g0, [%0]%1" :: "r"(va), "n"(ASI_SRMMUFP));
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setcontext4m(octx); /* restore context */
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setpsr(opsr); /* turn traps on again */
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