Speed up sigreturn() checking.
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)machdep.c 7.4 (Berkeley) 6/3/91
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* $Id: machdep.c,v 1.87 1994/02/24 05:03:03 mycroft Exp $
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* $Id: machdep.c,v 1.88 1994/02/25 21:11:50 mycroft Exp $
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*/
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#include <stddef.h>
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@ -468,6 +468,15 @@ sendsig(catcher, sig, mask, code)
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tf->tf_ss = _udatasel;
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}
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static __inline int
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verr(u_short sel)
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{
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int eflags;
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__asm __volatile("verr %1\n\tlahf" : "=a" (eflags) : "g" (sel));
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return (eflags & (PSL_Z << 8));
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}
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/*
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* System call to cleanup state after a signal
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* has been taken. Reset signal mask and
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@ -516,31 +525,27 @@ sigreturn(p, uap, retval)
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return(EINVAL);
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/*
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* Sanity check the user's selectors and error if they
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* are suspect.
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* Sanity check the user's selectors and error if they are suspect.
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* We assume that swtch() has loaded the correct LDT descriptor, so
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* we can just use the `verr' instruction. We further assume that
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* none of the segments we wish to protect are conforming. (If they
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* were, this check wouldn't help much anyway.)
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*/
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#define max_ldt_sel(pcb) \
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((pcb)->pcb_ldt ? (pcb)->pcb_ldt_len : (sizeof(ldt) / sizeof(ldt[0])))
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#define valid_ldt_sel(sel) \
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(ISLDT(sel) && ISPL(sel) == SEL_UPL && \
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IDXSEL(sel) < max_ldt_sel(&p->p_addr->u_pcb))
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#define valid_sel(sel) \
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(ISPL(sel) == SEL_UPL && verr(sel))
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#define null_sel(sel) \
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(!ISLDT(sel) && IDXSEL(sel) == 0)
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if ((context.sc_cs&0xffff != _ucodesel && !valid_ldt_sel(context.sc_cs)) ||
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(context.sc_ss&0xffff != _udatasel && !valid_ldt_sel(context.sc_ss)) ||
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(context.sc_ds&0xffff != _udatasel && !valid_ldt_sel(context.sc_ds) &&
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!null_sel(context.sc_ds)) ||
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(context.sc_es&0xffff != _udatasel && !valid_ldt_sel(context.sc_es) &&
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!null_sel(context.sc_es))) {
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if (!valid_sel(context.sc_cs) ||
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!valid_sel(context.sc_ss) ||
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(!valid_sel(context.sc_ds) && !null_sel(context.sc_ds)) ||
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(!valid_sel(context.sc_es) && !null_sel(context.sc_es))) {
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trapsignal(p, SIGBUS, T_PROTFLT);
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return(EINVAL);
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}
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#undef max_ldt_sel
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#undef valid_ldt_sel
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#undef valid_ldt
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#undef null_sel
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p->p_sigacts->ps_onstack = context.sc_onstack & 01;
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