Remove (the now non-compiling) support for 128bit FP emulation, which
isn't needed for PowerPC anyway.
This commit is contained in:
simonb
parent
354075932d
commit
499ef1c1bb
@ -1,4 +1,4 @@
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/* $NetBSD: fpu_explode.c,v 1.3 2003/08/07 16:29:18 agc Exp $ */
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/* $NetBSD: fpu_explode.c,v 1.4 2003/10/27 04:32:02 simonb Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -46,7 +46,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.3 2003/08/07 16:29:18 agc Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu_explode.c,v 1.4 2003/10/27 04:32:02 simonb Exp $");
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#include <sys/types.h>
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#include <sys/systm.h>
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@ -199,29 +199,6 @@ fpu_dtof(struct fpn *fp, u_int i, u_int j)
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FP_TOF(exp, DBL_EXP_BIAS, frac, f0, f1, f2, 0);
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}
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/*
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* 128-bit extended -> fpn.
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*/
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int
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fpu_qtof(struct fpn *fp, u_int i, u_int j, u_int k, u_int l)
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{
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int exp;
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u_int frac, f0, f1, f2, f3;
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#define EXT_SHIFT (-(EXT_FRACBITS - 3 * 32 - FP_LG)) /* left shift! */
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/*
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* Note that ext and fpn `line up', hence no shifting needed.
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*/
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exp = (i >> (32 - 1 - EXT_EXPBITS)) & mask(EXT_EXPBITS);
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frac = i & mask(EXT_FRACBITS - 3 * 32);
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f0 = (frac << EXT_SHIFT) | (j >> (32 - EXT_SHIFT));
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f1 = (j << EXT_SHIFT) | (k >> (32 - EXT_SHIFT));
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f2 = (k << EXT_SHIFT) | (l >> (32 - EXT_SHIFT));
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f3 = l << EXT_SHIFT;
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frac |= j | k | l;
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FP_TOF(exp, EXT_EXP_BIAS, frac, f0, f1, f2, f3);
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}
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/*
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* Explode the contents of a register / regpair / regquad.
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* If the input is a signalling NaN, an NV (invalid) exception
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@ -258,12 +235,8 @@ fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg)
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s = fpu_dtof(fp, s, space[1]);
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break;
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case FTYPE_EXT:
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s = fpu_qtof(fp, s, space[1], space[2], space[3]);
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break;
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default:
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panic("fpu_explode");
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panic("fpu_explode: invalid type %d", type);
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}
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if (s == FPC_QNAN && (fp->fp_mant[0] & FP_QUIETBIT) == 0) {
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@ -282,8 +255,7 @@ fpu_explode(struct fpemu *fe, struct fpn *fp, int type, int reg)
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DPRINTF(FPE_REG, ("fpu_explode: %%%c%d => ", (type == FTYPE_LNG) ? 'x' :
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((type == FTYPE_INT) ? 'i' :
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((type == FTYPE_SNG) ? 's' :
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((type == FTYPE_DBL) ? 'd' :
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((type == FTYPE_EXT) ? 'q' : '?')))),
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((type == FTYPE_DBL) ? 'd' : ?))),
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reg));
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DUMPFPN(FPE_REG, fp);
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DPRINTF(FPE_REG, ("\n"));
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_extern.h,v 1.1 2001/06/13 06:01:47 simonb Exp $ */
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/* $NetBSD: fpu_extern.h,v 1.2 2003/10/27 04:32:02 simonb Exp $ */
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/*-
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* Copyright (c) 1995 The NetBSD Foundation, Inc.
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@ -61,7 +61,6 @@ int fpu_itof(struct fpn *, u_int);
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int fpu_xtof(struct fpn *, u_int64_t);
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int fpu_stof(struct fpn *, u_int);
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int fpu_dtof(struct fpn *, u_int, u_int);
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int fpu_qtof(struct fpn *, u_int, u_int , u_int , u_int);
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void fpu_explode(struct fpemu *, struct fpn *, int, int);
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/* fpu_implode.c */
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@ -69,7 +68,6 @@ u_int fpu_ftoi(struct fpemu *, struct fpn *);
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u_int fpu_ftox(struct fpemu *, struct fpn *, u_int *);
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u_int fpu_ftos(struct fpemu *, struct fpn *);
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u_int fpu_ftod(struct fpemu *, struct fpn *, u_int *);
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u_int fpu_ftoq(struct fpemu *, struct fpn *, u_int *);
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void fpu_implode(struct fpemu *, struct fpn *, int, u_int *);
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/* fpu_mul.c */
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@ -1,4 +1,4 @@
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/* $NetBSD: fpu_implode.c,v 1.3 2003/08/07 16:29:18 agc Exp $ */
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/* $NetBSD: fpu_implode.c,v 1.4 2003/10/27 04:32:02 simonb Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -46,7 +46,7 @@
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.3 2003/08/07 16:29:18 agc Exp $");
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__KERNEL_RCSID(0, "$NetBSD: fpu_implode.c,v 1.4 2003/10/27 04:32:02 simonb Exp $");
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#include <sys/types.h>
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#include <sys/systm.h>
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@ -420,66 +420,6 @@ done:
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return (sign | DBL_EXP(exp) | (fp->fp_mant[2] & DBL_MASK));
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}
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/*
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* fpn -> extended (32 bit high-order result returned; low-order fraction
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* words left in res[1]..res[3]). Like ftod, which is like ftos ... but
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* our internal format *is* extended precision, plus 2 bits for guard/round,
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* so we can avoid a small bit of work.
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*/
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u_int
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fpu_ftoq(struct fpemu *fe, struct fpn *fp, u_int *res)
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{
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u_int sign = fp->fp_sign << 31;
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int exp;
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#define EXT_EXP(e) ((e) << (EXT_FRACBITS & 31))
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#define EXT_MASK (EXT_EXP(1) - 1)
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if (ISNAN(fp)) {
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(void) fpu_shr(fp, 2); /* since we are not rounding */
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exp = EXT_EXP_INFNAN;
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goto done;
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}
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if (ISINF(fp)) {
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sign |= EXT_EXP(EXT_EXP_INFNAN);
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goto zero;
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}
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if (ISZERO(fp)) {
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zero: res[1] = res[2] = res[3] = 0;
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return (sign);
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}
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if ((exp = fp->fp_exp + EXT_EXP_BIAS) <= 0) {
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(void) fpu_shr(fp, FP_NMANT - FP_NG - EXT_FRACBITS - exp);
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if (round(fe, fp) && fp->fp_mant[0] == EXT_EXP(1)) {
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res[1] = res[2] = res[3] = 0;
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return (sign | EXT_EXP(1) | 0);
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}
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if ((fe->fe_cx & FPSCR_FI) ||
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(fe->fe_fpscr & FPSCR_UX))
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fe->fe_cx |= FPSCR_UX;
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exp = 0;
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goto done;
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}
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/* Since internal == extended, no need to shift here. */
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if (round(fe, fp) && fp->fp_mant[0] == EXT_EXP(2))
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exp++;
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if (exp >= EXT_EXP_INFNAN) {
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fe->fe_cx |= FPSCR_OX | FPSCR_UX;
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if (toinf(fe, sign)) {
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res[1] = res[2] = res[3] = 0;
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return (sign | EXT_EXP(EXT_EXP_INFNAN) | 0);
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}
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res[1] = res[2] = res[3] = ~0;
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return (sign | EXT_EXP(EXT_EXP_INFNAN) | EXT_MASK);
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}
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done:
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res[1] = fp->fp_mant[1];
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res[2] = fp->fp_mant[2];
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res[3] = fp->fp_mant[3];
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return (sign | EXT_EXP(exp) | (fp->fp_mant[0] & EXT_MASK));
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}
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/*
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* Implode an fpn, writing the result into the given space.
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*/
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@ -514,13 +454,6 @@ fpu_implode(struct fpemu *fe, struct fpn *fp, int type, u_int *space)
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space[0], space[1]));
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break; break;
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case FTYPE_EXT:
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/* funky rounding precision options ?? */
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space[0] = fpu_ftoq(fe, fp, space);
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DPRINTF(FPE_REG, ("fpu_implode: long double %x %x %x %x\n",
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space[0], space[1], space[2], space[3]));
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break; break;
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default:
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panic("fpu_implode: invalid type %d", type);
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}
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@ -1,4 +1,4 @@
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/* $NetBSD: instr.h,v 1.2 2003/08/07 16:29:18 agc Exp $ */
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/* $NetBSD: instr.h,v 1.3 2003/10/27 04:32:02 simonb Exp $ */
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/*
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* Copyright (c) 1992, 1993
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@ -383,7 +383,6 @@ union instr {
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#define FTYPE_INT 0 /* data = 32-bit signed integer */
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#define FTYPE_SNG 1 /* data = 32-bit float */
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#define FTYPE_DBL 2 /* data = 64-bit double */
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#define FTYPE_EXT 3 /* data = 128-bit extended (quad-prec) */
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/*
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* FPCSR rounding modes.
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